TWI842855B - 半導體裝置 - Google Patents

半導體裝置 Download PDF

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Publication number
TWI842855B
TWI842855B TW109108242A TW109108242A TWI842855B TW I842855 B TWI842855 B TW I842855B TW 109108242 A TW109108242 A TW 109108242A TW 109108242 A TW109108242 A TW 109108242A TW I842855 B TWI842855 B TW I842855B
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TW
Taiwan
Prior art keywords
transistor
oxide
insulator
bit line
conductor
Prior art date
Application number
TW109108242A
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English (en)
Chinese (zh)
Other versions
TW202101468A (zh
Inventor
齋藤聖矢
八窪裕人
大貫達也
長塚修平
Original Assignee
日商半導體能源研究所股份有限公司
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Publication of TW202101468A publication Critical patent/TW202101468A/zh
Application granted granted Critical
Publication of TWI842855B publication Critical patent/TWI842855B/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW109108242A 2019-03-29 2020-03-12 半導體裝置 TWI842855B (zh)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP2019-065475 2019-03-29
JP2019065473 2019-03-29
JP2019065475 2019-03-29
JP2019-065473 2019-03-29
JP2019073992 2019-04-09
JP2019-073992 2019-04-09
JP2019102753 2019-05-31
JP2019-102753 2019-05-31

Publications (2)

Publication Number Publication Date
TW202101468A TW202101468A (zh) 2021-01-01
TWI842855B true TWI842855B (zh) 2024-05-21

Family

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Family Applications (2)

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TW113115235A TW202431270A (zh) 2019-03-29 2020-03-12 半導體裝置
TW109108242A TWI842855B (zh) 2019-03-29 2020-03-12 半導體裝置

Family Applications Before (1)

Application Number Title Priority Date Filing Date
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Country Status (6)

Country Link
US (2) US11948626B2 (enExample)
JP (3) JP7429686B2 (enExample)
KR (1) KR20210142695A (enExample)
CN (1) CN113646839A (enExample)
TW (2) TW202431270A (enExample)
WO (1) WO2020201865A1 (enExample)

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Publication number Priority date Publication date Assignee Title
TW202431270A (zh) * 2019-03-29 2024-08-01 日商半導體能源研究所股份有限公司 半導體裝置
WO2022168160A1 (ja) * 2021-02-02 2022-08-11 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体メモリ装置
US11749623B2 (en) * 2021-03-31 2023-09-05 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor memory devices and methods of manufacturing thereof
TWI769789B (zh) 2021-04-21 2022-07-01 財團法人工業技術研究院 陣列開關電路及系統晶片封裝結構
WO2023152586A1 (ja) * 2022-02-10 2023-08-17 株式会社半導体エネルギー研究所 半導体装置、及び半導体装置の作製方法
KR20240152314A (ko) * 2022-02-18 2024-10-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
JPWO2023166374A1 (enExample) * 2022-03-04 2023-09-07
US11984165B2 (en) * 2022-05-24 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device with reduced area
US20250359018A1 (en) * 2022-09-01 2025-11-20 Semiconductor Energy Laboratory Co., Ltd. Memory device
US20240312492A1 (en) * 2023-03-16 2024-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit device, memory cell and method
JP2024137039A (ja) * 2023-03-24 2024-10-04 キオクシア株式会社 磁気記憶装置

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US5117113A (en) * 1990-07-06 1992-05-26 Thompson And Nielson Electronics Ltd. Direct reading dosimeter
US6088286A (en) * 1998-01-08 2000-07-11 Mitsubishi Denki Kabushiki Kaisha Word line non-boosted dynamic semiconductor memory device
TWI244653B (en) * 2002-12-16 2005-12-01 Renesas Tech Corp Semiconductor memory device
US20120063208A1 (en) * 2010-09-13 2012-03-15 Semiconductor Energy Laboratory Co., Ltd. Memory device
TW201805947A (zh) * 2016-08-08 2018-02-16 美光科技公司 包含多階記憶體單元之裝置及操作該裝置之方法

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KR100746292B1 (ko) * 2006-07-04 2007-08-03 삼성전자주식회사 비휘발성 메모리 장치
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TW202431270A (zh) * 2019-03-29 2024-08-01 日商半導體能源研究所股份有限公司 半導體裝置
JP7457006B2 (ja) * 2019-04-26 2024-03-27 株式会社半導体エネルギー研究所 半導体装置、及び半導体装置の動作方法
JPWO2020245688A1 (enExample) * 2019-06-04 2020-12-10
JP7629914B2 (ja) * 2020-05-22 2025-02-14 株式会社半導体エネルギー研究所 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5117113A (en) * 1990-07-06 1992-05-26 Thompson And Nielson Electronics Ltd. Direct reading dosimeter
US6088286A (en) * 1998-01-08 2000-07-11 Mitsubishi Denki Kabushiki Kaisha Word line non-boosted dynamic semiconductor memory device
TWI244653B (en) * 2002-12-16 2005-12-01 Renesas Tech Corp Semiconductor memory device
US20120063208A1 (en) * 2010-09-13 2012-03-15 Semiconductor Energy Laboratory Co., Ltd. Memory device
TW201805947A (zh) * 2016-08-08 2018-02-16 美光科技公司 包含多階記憶體單元之裝置及操作該裝置之方法

Also Published As

Publication number Publication date
TW202101468A (zh) 2021-01-01
WO2020201865A1 (ja) 2020-10-08
CN113646839A (zh) 2021-11-12
JPWO2020201865A1 (enExample) 2020-10-08
US11948626B2 (en) 2024-04-02
JP7429686B2 (ja) 2024-02-08
JP7615370B2 (ja) 2025-01-16
TW202431270A (zh) 2024-08-01
JP2025063098A (ja) 2025-04-15
US20220180920A1 (en) 2022-06-09
JP2024046762A (ja) 2024-04-04
KR20210142695A (ko) 2021-11-25
US20240194252A1 (en) 2024-06-13
JP7762286B2 (ja) 2025-10-29

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