TWI800833B - 半導體記憶裝置 - Google Patents
半導體記憶裝置 Download PDFInfo
- Publication number
- TWI800833B TWI800833B TW110117861A TW110117861A TWI800833B TW I800833 B TWI800833 B TW I800833B TW 110117861 A TW110117861 A TW 110117861A TW 110117861 A TW110117861 A TW 110117861A TW I800833 B TWI800833 B TW I800833B
- Authority
- TW
- Taiwan
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020141080A JP2022036723A (ja) | 2020-08-24 | 2020-08-24 | 半導体記憶装置 |
JP2020-141080 | 2020-08-24 | ||
US17/191,206 | 2021-03-03 | ||
US17/191,206 US20220059557A1 (en) | 2020-08-24 | 2021-03-03 | Semiconductor storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202209647A TW202209647A (zh) | 2022-03-01 |
TWI800833B true TWI800833B (zh) | 2023-05-01 |
Family
ID=80269875
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW110117861A TWI800833B (zh) | 2020-08-24 | 2021-05-18 | 半導體記憶裝置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20220059557A1 (zh) |
JP (1) | JP2022036723A (zh) |
CN (1) | CN114093883A (zh) |
TW (1) | TWI800833B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11791260B2 (en) * | 2021-02-02 | 2023-10-17 | Micron Technology, Inc. | Contacts for twisted conductive lines within memory arrays |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140239376A1 (en) * | 2013-02-26 | 2014-08-28 | Gang Zhang | Vertical memory devices and methods of manufacturing the same |
TW201939676A (zh) * | 2018-03-15 | 2019-10-01 | 日商東芝記憶體股份有限公司 | 半導體記憶裝置 |
TW202013689A (zh) * | 2018-09-20 | 2020-04-01 | 日商東芝記憶體股份有限公司 | 半導體記憶裝置 |
TW202015216A (zh) * | 2018-10-09 | 2020-04-16 | 大陸商長江存儲科技有限責任公司 | 三維記憶元件中的堆疊間插塞及其形成方法 |
US10700090B1 (en) * | 2019-02-18 | 2020-06-30 | Sandisk Technologies Llc | Three-dimensional flat NAND memory device having curved memory elements and methods of making the same |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9478558B2 (en) * | 2015-01-20 | 2016-10-25 | Sandisk Technologies Llc | Semiconductor structure with concave blocking dielectric sidewall and method of making thereof by isotropically etching the blocking dielectric layer |
US10985171B2 (en) * | 2018-09-26 | 2021-04-20 | Sandisk Technologies Llc | Three-dimensional flat NAND memory device including wavy word lines and method of making the same |
US11018151B2 (en) * | 2018-09-26 | 2021-05-25 | Sandisk Technologies Llc | Three-dimensional flat NAND memory device including wavy word lines and method of making the same |
-
2020
- 2020-08-24 JP JP2020141080A patent/JP2022036723A/ja active Pending
-
2021
- 2021-03-03 US US17/191,206 patent/US20220059557A1/en not_active Abandoned
- 2021-05-18 TW TW110117861A patent/TWI800833B/zh active
- 2021-06-30 CN CN202110732688.2A patent/CN114093883A/zh not_active Withdrawn
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140239376A1 (en) * | 2013-02-26 | 2014-08-28 | Gang Zhang | Vertical memory devices and methods of manufacturing the same |
TW201939676A (zh) * | 2018-03-15 | 2019-10-01 | 日商東芝記憶體股份有限公司 | 半導體記憶裝置 |
TW202013689A (zh) * | 2018-09-20 | 2020-04-01 | 日商東芝記憶體股份有限公司 | 半導體記憶裝置 |
TW202015216A (zh) * | 2018-10-09 | 2020-04-16 | 大陸商長江存儲科技有限責任公司 | 三維記憶元件中的堆疊間插塞及其形成方法 |
US10700090B1 (en) * | 2019-02-18 | 2020-06-30 | Sandisk Technologies Llc | Three-dimensional flat NAND memory device having curved memory elements and methods of making the same |
Also Published As
Publication number | Publication date |
---|---|
TW202209647A (zh) | 2022-03-01 |
US20220059557A1 (en) | 2022-02-24 |
CN114093883A (zh) | 2022-02-25 |
JP2022036723A (ja) | 2022-03-08 |
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