TWI798290B - 用於形成完全自對準介層窗的選擇性沉積方法 - Google Patents

用於形成完全自對準介層窗的選擇性沉積方法 Download PDF

Info

Publication number
TWI798290B
TWI798290B TW107141020A TW107141020A TWI798290B TW I798290 B TWI798290 B TW I798290B TW 107141020 A TW107141020 A TW 107141020A TW 107141020 A TW107141020 A TW 107141020A TW I798290 B TWI798290 B TW I798290B
Authority
TW
Taiwan
Prior art keywords
substrate
metal
layer
gas
silanol
Prior art date
Application number
TW107141020A
Other languages
English (en)
Other versions
TW201930626A (zh
Inventor
坎達巴拉 N 泰伯利
Original Assignee
日商東京威力科創股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商東京威力科創股份有限公司 filed Critical 日商東京威力科創股份有限公司
Publication of TW201930626A publication Critical patent/TW201930626A/zh
Application granted granted Critical
Publication of TWI798290B publication Critical patent/TWI798290B/zh

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • C23C16/0236Pretreatment of the material to be coated by cleaning or etching by etching with a reactive gas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C23C16/0281Deposition of sub-layers, e.g. to promote the adhesion of the main coating of metallic sub-layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04Coating on selected surface areas, e.g. using masks
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • C23C16/402Silicon dioxide
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4584Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally the substrate being rotated
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02074Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02189Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02277Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition the reactions being activated by other means than plasma or thermal, e.g. photo-CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02301Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67196Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the transfer chamber
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67201Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the load-lock chamber
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67742Mechanical parts of transfer devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883Post-treatment or after-treatment of the conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68764Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Robotics (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

提供用以選擇性薄膜沉積之方法。一種方法包含:提供一基板,該基板包含一介電材料及一金屬層,而該金屬層具有一氧化金屬層於其上;以一含金屬催化劑層塗覆該基板;將該基板用醇類溶液處理以將該氧化金屬層連同位於其上的含金屬催化劑層從金屬層上移除;及將該基板暴露於含矽烷醇氣體之製程氣體中一段時間,以在位於該介電材料上的含金屬催化劑層上選擇性沉積一SiO2 薄膜。

Description

用於形成完全自對準介層窗的選擇性沉積方法
相關申請案的交互參照:本申請案涉及並請求主張以下申請案的優先權:於2017年11月20日提交之美國臨時申請專利申請案第62/588,855號,其全部內容通過引用結合於此。本申請案涉及並主張請求以下申請案的優先權:於2018年6月15日提交之美國臨時專利申請專利案第62/685,847號,其全部內容通過引用結合於此。
此發明與半導體製程及半導體元件相關,並且更特別相關於用以使用表面預處理的選擇性沉積薄膜之方法。
隨著元件尺寸日趨變小,半導體元件製造的複雜度也隨之提高。製造半導體元件的成本也隨之上升,因此需要具有成本效益的的解決方案與創新。隨著製造更小的電晶體,圖案化特徵部的臨界尺寸(CD)或解析度的生產也變得愈加有挑戰性。在高度微縮的技術節點中,薄膜的選擇性沉積是圖案化的關鍵步驟。需要在不同材質表面上提供選擇性薄膜沉積的新沉積方式。
本發明的具體實施例提供以一表面預處理用以選擇性沉積薄膜之方法。
根據一具體實施例,該方法包含:提供一基板,其中該基板包含一介電材料及一金屬層,而該金屬層具有氧化金屬層於其上;以一含金屬催化劑層塗覆該基板;將該基板用醇類溶液處理以將該氧化金屬層連同位於其上的含金屬催化劑層從金屬層上移除;及將該基板暴露於一含矽烷醇氣體之製程氣體中一段時間,以在位於該介電材料上的含金屬催化劑層上選擇性沉積一SiO2 薄膜。
根據另一本發明的具體實施例,該方法包含:提供一基板,其中該基板包含一介電材料及一金屬層,而該金屬層具有氧化金屬層於其上;將該基板暴露於一反應氣體中,該反應氣體包含在基板上形成自組裝單分子層(SAMs)之分子;及藉由將基板暴露於一沉積氣體,相對於該氧化金屬層而選擇性沉積金屬氧化物膜於介電材料上;及將該基板暴露於一含矽烷醇氣體之製程氣體中一段時間,以在該金屬氧化物膜上選擇性沉積氧化矽(SiO2 )薄膜。
根據另一具體實施例,該方法包含:提供一基板,其中該基板包含一介電材料及一金屬層,而該金屬層具有氧化金屬層於其上;將該基板暴露於經電漿源激發之氫氣中;藉由將基板暴露於一沉積氣體,選擇性沉積一金屬氧化物膜於該介電材料上;及將該基板暴露於一含矽烷醇氣體之製程氣體中一段時間,以在該金屬氧化物膜上選擇性沉積一SiO2 薄膜。
發明的具體實施例提供有效的表面預處理方法,用以相對於金屬層在介電材料上選擇性沉積二氧化矽膜以及介電疊層膜。
圖1A至圖1D透過示意性剖面圖顯示出根據一本發明具體實施例之選擇性沉積一SiO2 薄膜於一基板上的方法。在圖1A中,該已經過圖案化的基板1包含一介電材料100、在介電材料100上的一介電材料101、鑲嵌於介電材料100中的一金屬層104、在金屬層104上的氧化金屬層107、以及將該金屬層104與該介電材料100分隔開的一擴散障蔽層102。舉例而言,該金屬層104可包含銅(Cu)、釕(Ru)、鈷(Co)或鎢(W)。舉例而言,該氧化金屬層107可包含氧化的銅、氧化的釕、氧化的鈷或氧化的鎢。舉例而言,該介電材料100可包含一低k介電材料、SiO2 或一含金屬介電材料。舉例而言,該含金屬介電材料可包含金屬氧化物、金屬氮化物或金屬氮氧化物。在某些例子中,該擴散障蔽層102可包含TaN、TiN、TaSiN或TiSiN。該介電材料101,如圖1A中所描繪,可在用以平坦化基板1之化學機械平坦化(CMP)製程中用以作為一蝕刻停止層。該介電材料101可包含SiCN或SiOC。在一個例子中,該介電材料101可包含與介電材料100相同之材料。該氧化金屬層107可藉由將金屬層104在基板製程期間暴露於含氧氣體中而形成,包含暴露於製程系統中的背景氣體或製程氣體中的O2 及H2 O。在一例子中,該氧化金屬層107可能在CMP製程期間或之後形成。在一例子中,該氧化金屬層107可能具有開口區域而不完整,該開口區域露出金屬層104。
根據一本發明的具體實施例,提供一方法用以相對於該氧化金屬層107或該金屬層104在介電材料101上選擇性沉積一SiO2 薄膜。該氧化金屬層107可透過減少該沉積選擇性的方式影響該選擇性SiO2 薄膜的沉積。因此提供一基板預處理以有效地將該氧化金屬層107從該金屬層104移除,其中該基板預處理可整合進一選擇性SiO2 薄膜沉積方法以形成完全自對準介層窗以及其他凹陷特徵部。
根據一具體實施例,該於圖1A中之基板1被塗覆以一含金屬催化劑層105。如示意圖1B所示意,該含金屬催化劑層105(圖中「X」形的部分)的面密度在該氧化金屬層107上可能比在該介電材料100上低。依據一些本發明的具體實施例,該含金屬催化劑層105可包含鋁(Al)、鈦(Ti)、或鋁及鈦兩者。該含金屬催化劑層105可選自由Al、Al2 O3 、AlN、AlON、一含鋁前驅物、一含鋁合金、CuAl、TiAlN、TaAlN、Ti、TiAlC、TiO2 、TiON、TiN、一含鈦前驅物、一含鈦合金以及其組合所組成之群組。該含金屬催化劑層105可經由暴露該基板1於一含金屬前驅物蒸氣及選用性的一含氧氣體以及/或者一含氮氣體中而形成。此暴露步驟可進行如下:透過將基板1暴露於一含金屬氣體脈衝,該含金屬氣體脈衝可使約一單分子層厚的含金屬催化劑層105吸附。在一例子中,該含金屬催化劑層105可包含一層吸附的含金屬前驅物,例如AlMe3
本發明具體實施例可利用廣泛類型的含鋁前驅物。例如許多鋁前驅物具有以下化學式: AlL1 L2 L3 Dx 其中L1 、L2 、L3 為個別陰離子配位基,而D為一中性予體配位基,其中x可以為0、1或2。每個L1 、L2 、L3 配位基可個別選自烷氧化物(alkoxides)、鹵化物(halides)、芳氧化物(aryloxides)、醯胺化物(amides)、環戊二烯基(cyclopentadienyls)、烷基(alkyls)、矽基(silyls)、脒化物(amidinates)、β二酮基(β-diketonates)、酮亞胺化物(ketoiminates)、矽烷化物(silanoates)及羧酸鹽類(carboxylates)之群組。D配位基可選自由醚(ethers)、呋喃(furans)、吡啶(pyridines)、吡咯類(pyrroles)、吡咯啶類(pyrrolidines)、胺類(amines)、冠醚類(crown ethers)、乙二醇醚類(glymes)及腈類(nitriles)之群組。
其他鋁前驅物的例子包含:AlMe3 、AlEt3 、AlMe2 H、[Al(Os Bu)3 ]4 、Al(CH3 COCHCOCH3 )3 、AlCl3 、AlBr3 、AlI3 、Al(Oi Pr)3 、[Al(NMe2 )3 ]2 、Al(i Bu)2 Cl、Al(i Bu)3 、Al(i Bu)2 H、AlEt2 Cl、Et3 Al2 (Os Bu)3 ,以及 Al(THD)3
本發明具體實施例可利用廣泛類型的含鈦前驅物。例子包含具有「Ti-N」分子內鍵結的含鈦前驅物,包含Ti(NEt2 )4 (TDEAT)、Ti(NMeEt)4 (TEMAT)、Ti(NMe2 )4 (TDMAT)。其他含鈦前驅物的例子包含具有「Ti-C」分子內鍵結的含鈦前驅物,包含Ti(COCH3 )(η5 -C5 H5 )2 Cl、Ti(η5 -C5 H5 )Cl2 、Ti(η5 -C5 H5 )Cl3 、Ti(η5 -C5 H5 )2 Cl2 、Ti(η5 -C5 (CH3 )5 )Cl3 、Ti(CH3 )(η5 -C5 H5 )2 Cl、Ti(η5 -C9 H7 )2 Cl2 、Ti((η5 -C5 (CH3 )5 )2 Cl、Ti((η5 -C5 (CH3 )5 )2 Cl2 、Ti(η5 -C5 H5 )2 (μ-Cl)2 、Ti(η5 -C5 H5 )2 (CO)2 、Ti(CH3 )35 -C5 H5 ) 、Ti(CH3 )25 -C5 H5 )2 、Ti(CH3 )4 、Ti(η5 -C5 H5 )(η7 -C7 H7 ) 、Ti(η5 -C5 H5 )(η8 -C8 H8 ) 、Ti(C5 H5 )25 -C5 H5 )2 、Ti((C5 H5 )2 )2 (η-H)2 、Ti(η5 - C5 (CH3 )5 )2 、Ti(η5 - C5 (CH3 )5 )2 (H)2 以及Ti(CH3 )25 - C5 (CH3 )5 )2 。而TiCl4 則為具有「鈦-鹵」鍵結的鹵化鈦前驅物之例子。
此製程方法更包含以醇類(alcohol)溶液處理圖1B中的該基板1,該醇類溶液將該氧化金屬層107以及該含金屬催化劑層105從該金屬層104移除。上述內容示意於圖1C中,其中該含金屬催化劑層105只留存在該介電材料101上。本案發明者發現,將醇類溶液與該基板1接觸,能有效地在不再次氧化下方金屬層104的情況下剝離該氧化金屬層107,並且,由於該含金屬催化劑層105與該受移除的氧化金屬層107相連接,在該剝離過程中更移除了該含金屬催化劑層105。在一個例子中,該醇類溶液可在室溫下與該基板1接觸。該醇類溶液可由一或多種醇類組成,或者,該醇類溶液可由一或多種醇類及一非氧化溶劑組成。該醇類溶液可含有任何具有化學式「R-OH」的醇類。一種醇類為一級醇,其中甲醇及乙醇為最簡單的成員。另一種醇類為二級醇,例如異丙醇(IPA)。
此製程方法更包含將基板1暴露於一含矽烷醇(silanol)氣體之製程氣體中一段時間,使得在該介電材料101但並不在該金屬層104上將SiO2 薄膜106以一個自我限制的方式選擇性地沉積於含金屬催化劑層105上。上述內容示意顯示於圖1D中。
該含金屬催化劑層105催化來自矽烷醇氣體的該SiO2 薄膜106的選擇性沉積,且能觀察到此催化效果直到該沉積的SiO2 薄膜106厚度至約15 nm厚或更少,且隨後當基板1上沒剩下任何催化位置時該SiO2 沉積自動停止。該暴露於製程氣體之步驟可進行達不會導致在該金屬層104上有顯著的SiO2 沉積的一段時間。根據本發明的具體實施例,在不存在任何氧化劑和水解劑的情況下,該基板1暴露於含矽烷醇氣體之製程氣體中。在一例子中,該矽烷醇氣體可選自由參(三級戊氧)矽烷醇(TPSOL, tris(tert-pentoxy) silanol)、參(三級丁氧)矽烷醇(tris(tert-butoxy) silanol)、及雙(三級丁氧)(異丙氧)矽烷醇(bis(tert-butoxy)(isopropoxy) silanol)組成之群組。
該製程氣體可更包含一惰性氣體如氬氣。在一例子中,該製程氣體可由矽烷醇氣體與一惰性氣體所組成。在該暴露步驟期間該基板溫度可為約150 °C或更低。在另一具體實施例中,該基板溫度可為約120 °C或更低。在又另外一具體實施例中,該基板溫度可為約100 °C或更低。
根據本發明具體實施例,以含金屬催化劑層105塗覆該基板1、用醇類溶液處理該基板1以將該含金屬催化劑層105從該金屬層104上移除、以及將基板1暴露於含矽烷醇氣體之製程氣體中的步驟,可重複一或多次以增加該SiO2 薄膜106的厚度。如在圖1D中所見,該SiO2 薄膜106形成完全自對準介層窗112於該金屬層104之上。該完全自對準介層窗112亦可被稱作為空孔(holes)或溝槽(trenches)。
圖2A-2E透過示意性剖面圖顯示根據一本發明的具體實施例,選擇性沉積一介電疊層膜於一基板上的一方法。圖1A中的基板1已被再現成為圖2A中的基板2。根據一具體實施例,該圖2A中的基板2透過暴露於一反應氣體而加以預處理,該反應氣體包含可形成自組裝單分子層(SAMs, self-assembled monolayers)於基板2上之分子。 圖2B中示意該氧化金屬層107上之SAMs 109(圖中「Y」形的部分)。SAMs 為一種分子組裝,其透過吸附而自發性形成於基板表面之上且組織成為大致上巨大的規則區域。該SAMs 可包含一分子,該分子具有一頭部基(head group)、一尾部基(tail group)以及一官能端基(functional end group),且SAMs是藉由以下方式所形成:在室溫或高於室溫下從氣相化學吸附頭部基至基板上,隨後再進行尾部基緩慢組織。起初,在表面上分子密度小的情況下,被吸附的分子無論是形成一不規則分子質量或形成一規則二維的「平躺相(lying down phase)」,且以更高的分子覆蓋率經過一段數分鐘至數小時的時間開始形成三維結晶或半晶質結構於該基板表面上。該頭部基在基板上組裝在一起,而該尾部基則在遠離基板處組裝。
根據一具體實施例,該形成SAMs的分子之頭部基可包含硫醇基(thiol)、矽烷基(silane)或磷酸根(phosphonate)。矽烷基的例子包含具有C、H、Cl、F及Si原子或具有C、H、Cl以及Si原子的分子。該分子的非限制性實例包含全氟癸基三氯矽烷(perfluorodecyltrichlorosilane, (CF3 (CF2 )7 CH2 CH2 SiCl3 ))、全氟癸烷硫醇(perfluorodecanethiol, (CF3 (CF2 )7 CH2 CH2 SH))、氯癸基二甲基矽烷(chlorodecyldimethylsilane, (CH3 (CH2 )8 CH2 Si(CH3 )2 Cl))以及三級丁(氯基)二甲基矽烷(tertbutyl(chloro)dimethylsilane, ((CH3 )3 CSi(CH3 )2 Cl))。
形成該SAMs 109於一基板2上之預處理可用於允許相對於金屬層表面或氧化金屬層表面在介電材料表面上後續之金屬氧化物的選擇性沉積。該選擇性沉積提供一方法,用於選擇性地沉積金屬氧化物膜於介電材料表面上同時預防或減少金屬氧化物沉積於金屬層表面及氧化金屬層表面上。吾人推測,可能是由於該分子在該氧化金屬層107上的最初較高規律性,該SAM 密度在該氧化金屬層107上的密度相較於在該介電材料101上而言較高。
在該預處理之後,藉由將基板2暴露於一沉積氣體中,將一金屬氧化物膜111相對於氧化金屬層107選擇性地沉積在介電材料101之上。上述內容示意於圖2C中。在一個例子中,該金屬氧化物膜111可包含HfO2 、ZrO2 、或 Al2 O3 。舉例而言,該金屬氧化物膜111可透過原子層沉積(ALD)或電漿輔助原子層沉積(PEALD, Plasma-enhanced ALD)方式沉積。在一些例子中,該金屬氧化物膜111可透過使用一含金屬前驅物及氧化劑(例如H2 O、H2 O2 、電漿激發的 O­2 或O3 )的交替暴露操作之ALD而加以沉積。
該製程方法更包含將基板2暴露於一含矽烷醇氣體之製程氣體中一段時間,使得一SiO2 薄膜113選擇性沉積在該金屬氧化物膜111上。上述內容示意於圖2D中。在一個例子中,包含該金屬氧化物膜111與該SiO2 薄膜113的疊層之有效介電常數小於約7疊層。
根據本發明的具體實施例,該金屬氧化物膜111從矽烷醇氣體催化一SiO2 薄膜113的選擇性沉積,且能觀察到該催化效果直到該沉積的SiO2 薄膜113厚度至約15 nm厚或更少,且隨後該SiO2 沉積自動停止。此暴露於製程氣體之步驟可進行達不會導致在該氧化金屬層107上有顯著的SiO2 沉積的一段時間。根據本發明的具體實施例,在不存在任何氧化劑和水解劑的情況下,將該基板2暴露於含矽烷醇氣體之製程氣體中。該矽烷醇氣體可選自由參(三級戊氧)矽烷醇(TPSOL, tris(tert-pentoxy) silanol)、參(三級丁氧)矽烷醇(tris(tert-butoxy) silanol)及雙(三級丁氧)(異丙氧)矽烷醇(bis(tert-butoxy)(isopropoxy) silanol)組成之群組。
在某些例子中,該製程氣體可更包含一惰性氣體,如氬氣。在一具體實施例中,該製程氣體可由矽烷醇氣體與一惰性氣體所組成。再者,根據一具體實施例,在該暴露步驟期間,該基板溫度可為約150 °C或更低。在另外一具體實施例中,該基板溫度可為約120 °C或更低。在又另外一具體實施例中,該基板溫度可為約100 °C或更低。
隨後,該SAMs 109可藉由超過約300°C溫度的熱處理、藉由暴露於被電漿源激發之氫氣(H2 )、藉由暴露於被電漿源激發之氧氣(O2 )或上述組合之環境下,,從基板2上移除。如圖2E中所見,該SiO2 薄膜113 以及該金屬氧化物膜111形成完全自對準介層窗114於該金屬層104之上。該完全自對準介層窗114亦可被稱作為空孔或溝槽。
根據另外一具體實施例,該SAM預處理可被暴露於被電漿源激發之氫氣(H2 )以在該氧化金屬層107或該金屬層104上形成-H終端(圖中「Y」形的部分)的步驟代替。上述內容示意於圖2B中。根據一具體實施例,一化學氧化物去除(COR, Chemical Oxide Removal)製程可在暴露於氫氣中的步驟前執行,以將氧化金屬層107從基板2上去除。該COR製程包含將基板2暴露於HF氣體以及NH3 氣體中並執行一熱處理步驟。在COR製程之後,該暴露於氫氣的步驟在該金屬層104上形成-H終端。在該氧化金屬層107或該金屬層104上的該-H終端可提供長的孕核期,其中在這些層上最初很少或沒有薄膜沉積能被觀察到。相反地,在介電材料101的具有氫氧基(-OH)終端的表面上,觀察到以很少或沒有孕核期的薄膜沉積。
在該暴露於被電漿源激發之氫氣(H2 )的步驟之後,該基板2可如以上參照圖2C-2D所述方式進一步處理,以形成一疊層,該疊層含有在金屬氧化物膜111上的SiO2 薄膜113。在一個例子中,該金屬氧化物膜111可透過一ALD製程沉積,該ALD製程週期性地以暴露於被電漿源激發之氫氣(H2 )的步驟間斷,以提高該在介電材料101上之金屬氧化物膜111的沉積選擇性。
圖3為一電漿處理系統示意圖,根據本發明的一具體實施例,該電漿處理系統包含一RLSATM 電漿系統用來以H2 氣體預處理一基板。如圖中所示,電漿處理系統10 包含一電漿處理腔室20(真空腔室)、一天線單元57以及一基板座21。該電漿處理腔室20內部粗略分段為:一電漿產生區域R1,其位於一電漿氣體供應單元30下方;以及在該基板座21之側的電漿擴散區域R2。於該電漿產生區域R1中產生的電漿,可具有幾電子伏(eV)之電子溫度。當該電漿擴散進入該電漿擴散區域R2(薄膜形成製程於此執行),靠近基板座21的電漿的電子溫度降至低於約2eV的數值。該基板座21位於該電漿處理腔室20的底部中央,並且作為一安裝單元用以裝設一基板W。在基板座21中,設有一絕緣構件21a、一冷卻夾套21b以及用以控制基板溫度之溫度控制單元(未示於此圖中)。
該電漿處理腔室20的頂部為開端式。該電漿氣體供應單元30係與基板座21相對而配置,並且藉由未示於此圖中之密封構件(例如O型環)與該電漿處理腔室20的頂部一起加以密封。該電漿氣體供應單元30,其亦可作為一介電窗口使用,係由如氧化鋁或石英的材料製成,並且,具有一實質盤形的其平面表面係面向該基板座21。多個氣體供應孔31係與基板座21相對而設置在該電漿氣體供應單元30的平面表面上。該多個氣體供應孔31透過一氣流通道32與一電漿氣體供應端口33連接。電漿氣體供應源34、45、46、47提供電漿氣體(如H2 氣體以及氬氣)進入該電漿氣體供應端口33。該電漿氣體接著透過該多個氣體供應孔31均勻地供應進該電漿產生區域R1。
該電漿處理系統10更包含一製程氣體供應單元40,該製程氣體供應單元40基本上位於該電漿處理腔室20的中心,在電漿產生區域R1與電漿擴散區域R2之間。該製程氣體供應單元40是由導電材料所製成,如含鎂(Mg)的鋁合金或不鏽鋼。如同該電漿氣體供應單元30,多個氣體供應孔41提供在製程氣體供應單元40之一平面表面上。該製程氣體供應單元40之平面表面位於相對於該基板座21的位置且具有盤形。
該電漿處理腔室20更包含連結到該電漿處理腔室20底部的排氣管26、一將排氣管連結至一氣壓控制閥28和一真空泵29的真空管線27。該壓力控制閥28可用以使該電漿處理腔室20內達到一需求的氣壓。
該製程氣體供應單元40的平面圖示於圖4中。如圖中所示,一網格狀的氣流通道42,亦稱為一噴淋板,在該製程氣體供應單元40中形成。該網格狀的氣流通道42與呈垂直方向形成之該多個氣體供應孔41的一上端相連接。該多個氣體供應孔41下端為面對該基板座21的開口。該多個氣體供應孔41透過該網格狀的氣流通道42與一製程氣體供應端口43相連接。
再者,多個開口44形成在該製程氣體供應單元40上,使得該多個開口44在垂直方向上貫穿該製程氣體供應單元40。該多個開口44使例如H2 氣體以及選用性的氬氣之電漿氣體通過而進入位於該基板座21之側的電漿擴散區域R2。如圖4所示,該多個開口44形成於相鄰的氣流通道42之間。舉例而言,該製程氣體由分別的製程氣體供應源45與46供應至製程氣體供應端口43。根據一些具體實施例,任何組合的H2 與Ar可流經該製程氣體供應單元40以及/或者流經該電漿氣體供應端口33。再者,舉例而言,該多個開口44可在製程氣體供應單元40上佔有一區域,該區域擴展超過基板W的外圍邊緣。
該製程氣體流經該網格狀的氣流通道42並且透過該多個氣體供應孔41均勻地供應進該電漿擴散區域R2。該電漿處理系統10更包含四個閥(V1-V4)以及四個流量控制器(MFC1-MFC4)用以分別控制進入電漿處理腔室20的氣體供應。
一外部微波信號發生器55透過一同軸波導54提供在一預定頻率(例如2.45Hz)下的一微波信號(或微波能量)至該天線單元57。該同軸波導54可包含一內部導體54B與一外部導體54A。從該微波信號發生器55而來的微波在該電漿產生區域R1中在該電漿氣體供應單元30正下方產生電場,這接著造成在電漿處理腔室20之中該製程氣體的激發。
圖5顯示該天線單元57的一局部剖面圖。如圖中所示,該天線單元57可包含一扁平天線主體51、一輻射線槽孔板52以及一介電板53以縮短該微波波長。該扁平天線主體51有一具開端式底面的圓形形狀。該輻射線槽孔板52係形成為用以關閉該扁平天線主體51的開端式底面。該扁平天線主體51以及該輻射線槽孔板52係以具有一扁平中空圓形形狀波導的導電材料製成。
多個槽孔56提供於該輻射線槽孔板52之上以產生一圓形極化波。該多個槽孔56以其間具有微小間隙的一基本上為T形的型態加以配置,呈沿一圓周方向的一同心圓圖案或一螺旋狀的圖案。由於該槽孔56a與56b互相垂直,包含二正交極化分量的一圓形極化波,呈平面波從該輻射線槽孔板52輻射出。
該介電板53是由例如氧化鋁(Al2 O3 )或氮化矽(Si3 N4 )的一低損耗介電材料所製成,其設置在介於該輻射線槽孔板52與該扁平天線主體51之間的位置。該輻射線槽孔板52使用密封構件(未示於圖上)安裝於該電漿處理腔室20之上,使得該輻射線槽孔板52與一蓋板23緊密接觸。該蓋板23位於該電漿氣體供應單元30之上表面上且是由如氧化鋁(Al2 O3 )的微波透射介電材料所形成。
一外部高頻電力供應源22透過一匹配網路25加以電連結至該基板座21。該外部高頻電力供應源22產生一預定頻率(如13.56MHz 之RF偏功率,以控制引導到基板W的離子能量。該電力供應源22更配置為可選擇性提供RF偏功率脈衝,其脈衝頻率可大於1Hz,例如2 Hz、4 Hz、6 Hz、8 Hz、10 Hz、20 Hz、30 Hz、50 Hz或更高。 該電力供應源22被配置用以提供RF偏功率,該RF偏功率可為從0W至100W之間、100W至200W之間、200W至300W之間、300W至400W之間或是400W至500W之間。值得注意的是,精於本項技術者會了解該電力供應源22的功率位準與被處理基板的尺寸相關。舉例而言,在製程過程中,一300 mm的Si晶圓需要的電力消耗大於一200 mm的晶圓。該電漿處理系統10更包含直流電壓產生器35,該直流電壓產生器35能提供在大約-5kV及大約+5kV之間的直流電壓偏壓於基板座21上。
在暴露於電漿期間,該電漿氣體,例如H2氣體以及選擇性的Ar氣體,可使用該電漿氣體供應單元30引入該電漿處理腔室20。另外一方面,該製程氣體可使用該製程氣體供應單元40引入該電漿處理腔室20。
以表面預處理選擇性沉積薄膜之方法已揭露於各種具體實施例中。前述本發明的具體實施例的內容已出於說明與描述的目的而發表。此內容並非旨在全面詳述或限制本發明於所揭露內容之精確形式。此描述與後續申請專利範圍中包含之用語僅供描述性目的而不應解釋為其限制。與此發明相關之所屬領域中具有通常知識者可了解,鑒於上述教示,許多調整與改變是可行的。此發之所屬領域中具有通常知識者將辨認出所示圖中各種元件的各種等效組合及替換。因此,上述旨在說明本發明的範圍不受細節描述所限,而是受隨附在此處之申請專利範圍所限。
1‧‧‧基板 2‧‧‧基板 10‧‧‧電漿處理系統 20‧‧‧電漿處理腔室 21‧‧‧基板座 21a‧‧‧絕緣構件 21b‧‧‧冷卻夾套 22‧‧‧電力供應源 23‧‧‧蓋板 25‧‧‧匹配網路 26‧‧‧排氣管 27‧‧‧真空管線 28‧‧‧氣壓控制閥 29‧‧‧真空泵 30‧‧‧電漿氣體供應單元 31‧‧‧氣體供應孔 32‧‧‧氣流通道 33‧‧‧電漿氣體供應端口 34‧‧‧電漿氣體供應源 35‧‧‧直流電壓產生器 40‧‧‧製程氣體供應單元 41‧‧‧氣體供應孔 42‧‧‧網格狀的氣流通道 43‧‧‧製程氣體供應端口 44‧‧‧開口 45‧‧‧電漿氣體供應源 46‧‧‧電漿氣體供應源 47‧‧‧電漿氣體供應源 51‧‧‧扁平天線主體 52‧‧‧輻射線槽孔板 53‧‧‧介電板 54‧‧‧同軸波導 54A‧‧‧外部導體 54B‧‧‧內部導體 55‧‧‧微波信號發生器 56‧‧‧槽孔 56a‧‧‧槽孔 56b‧‧‧槽孔 57‧‧‧天線單元 100‧‧‧介電材料 101‧‧‧介電材料 102‧‧‧擴散障蔽層 104‧‧‧金屬層 105‧‧‧含金屬催化劑層 106‧‧‧SiO2薄膜 107‧‧‧氧化金屬層 109‧‧‧自組裝單分子層(SAMs) 111‧‧‧金屬氧化物膜 112‧‧‧完全自對準介層窗 113‧‧‧SiO2薄膜 114‧‧‧完全自對準介層窗 R1‧‧‧電漿產生區域 R2‧‧‧電漿擴散區域 W‧‧‧基板
參考後續詳細說明,特別是實施方式章節以及結合隨附圖式考慮時,將能更完整了解本發明的具體實施例且許多其伴隨的優點也變得顯而易見,其中:
圖1A–1D透過示意性剖面圖顯示一根據本發明的一具體實施例之選擇性沉積一SiO2 薄膜於一基板上之方法;
圖2A–2E透過示意性剖面圖顯示一根據本發明的一具體實施例之選擇性沉積一介電疊層膜於一基板上之方法;以及
圖3-5為根據本發明的一具體實施例之一電漿處理系統示意圖,該電漿處理系統包含RLSATM 電漿系統,用來以H2 氣體預處理一基板。
1‧‧‧基板
100‧‧‧介電材料
101‧‧‧介電材料
102‧‧‧擴散障蔽層
104‧‧‧金屬層
106‧‧‧SiO2薄膜
112‧‧‧介層窗

Claims (6)

  1. 一種基板製程方法,包含:提供一基板,該基板包含一介電材料、一金屬層、及在該金屬層上的氧化金屬層;以一含金屬催化劑層塗覆該基板;將該基板用醇類溶液處理,該醇類溶液從該金屬層移除該氧化金屬層以及該氧化金屬層上的該含金屬催化劑層;以及將該基板暴露於含矽烷醇氣體之製程氣體達一段時間,以選擇性沉積一SiO2薄膜於該介電材料上的該含金屬催化劑層之上。
  2. 如申請專利範圍第1項之基板製程方法,其中該金屬層包含銅(Cu)、釕(Ru)、鈷(Co)或鎢(W),以及該氧化金屬層包含氧化銅、氧化釕、氧化鈷或氧化鎢。
  3. 如申請專利範圍第1項之基板製程方法,其中該含金屬催化劑層包含鋁(Al)、鈦(Ti)、或鋁及鈦二者。
  4. 如申請專利範圍第1項之基板製程方法,其中將該基板暴露於含矽烷醇氣體之該製程氣體中之該步驟,係於不存在任何氧化劑和水解劑的情況下,執行於約為150℃或更低的基板溫度下。
  5. 如申請專利範圍第1項之基板製程方法,其中該矽烷醇氣體選自由參(三級戊氧)矽烷醇、參(三級丁氧)矽烷醇以及雙(三級丁氧)(異丙氧)矽烷醇組成之群組。
  6. 如申請專利範圍第1項之基板製程方法,更包含:將塗覆該基板的該步驟、以醇類溶液處理該基板的該步驟、以及將該基板暴露於含矽烷醇氣體之製程氣體中的該步驟重複至少一遍,以增加在該介電材料上之該SiO2薄膜的厚度。
TW107141020A 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性沉積方法 TWI798290B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762588855P 2017-11-20 2017-11-20
US62/588,855 2017-11-20
US201862685847P 2018-06-15 2018-06-15
US62/685,847 2018-06-15

Publications (2)

Publication Number Publication Date
TW201930626A TW201930626A (zh) 2019-08-01
TWI798290B true TWI798290B (zh) 2023-04-11

Family

ID=66533236

Family Applications (3)

Application Number Title Priority Date Filing Date
TW112109475A TW202328473A (zh) 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性沉積方法
TW107141017A TWI788463B (zh) 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性膜沉積方法
TW107141020A TWI798290B (zh) 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性沉積方法

Family Applications Before (2)

Application Number Title Priority Date Filing Date
TW112109475A TW202328473A (zh) 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性沉積方法
TW107141017A TWI788463B (zh) 2017-11-20 2018-11-19 用於形成完全自對準介層窗的選擇性膜沉積方法

Country Status (4)

Country Link
US (3) US10586734B2 (zh)
JP (2) JP7287770B2 (zh)
KR (3) KR102523731B1 (zh)
TW (3) TW202328473A (zh)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9112003B2 (en) 2011-12-09 2015-08-18 Asm International N.V. Selective formation of metallic films on metallic surfaces
US9895715B2 (en) 2014-02-04 2018-02-20 Asm Ip Holding B.V. Selective deposition of metals, metal oxides, and dielectrics
US10047435B2 (en) 2014-04-16 2018-08-14 Asm Ip Holding B.V. Dual selective deposition
US9490145B2 (en) 2015-02-23 2016-11-08 Asm Ip Holding B.V. Removal of surface passivation
US10428421B2 (en) 2015-08-03 2019-10-01 Asm Ip Holding B.V. Selective deposition on metal or metallic surfaces relative to dielectric surfaces
US10695794B2 (en) 2015-10-09 2020-06-30 Asm Ip Holding B.V. Vapor phase deposition of organic films
US11081342B2 (en) 2016-05-05 2021-08-03 Asm Ip Holding B.V. Selective deposition using hydrophobic precursors
US10453701B2 (en) 2016-06-01 2019-10-22 Asm Ip Holding B.V. Deposition of organic films
US10373820B2 (en) 2016-06-01 2019-08-06 Asm Ip Holding B.V. Deposition of organic films
US11430656B2 (en) 2016-11-29 2022-08-30 Asm Ip Holding B.V. Deposition of oxide thin films
JP7169072B2 (ja) 2017-02-14 2022-11-10 エーエスエム アイピー ホールディング ビー.ブイ. 選択的パッシベーションおよび選択的堆積
US11501965B2 (en) * 2017-05-05 2022-11-15 Asm Ip Holding B.V. Plasma enhanced deposition processes for controlled formation of metal oxide thin films
CN115233183A (zh) 2017-05-16 2022-10-25 Asm Ip 控股有限公司 电介质上氧化物的选择性peald
US10586734B2 (en) 2017-11-20 2020-03-10 Tokyo Electron Limited Method of selective film deposition for forming fully self-aligned vias
WO2019210234A1 (en) * 2018-04-27 2019-10-31 Tokyo Electron Limited Area selective deposition for cap layer formation in advanced contacts
JP2020056104A (ja) 2018-10-02 2020-04-09 エーエスエム アイピー ホールディング ビー.ブイ. 選択的パッシベーションおよび選択的堆積
US11965238B2 (en) 2019-04-12 2024-04-23 Asm Ip Holding B.V. Selective deposition of metal oxides on metal surfaces
WO2020251927A1 (en) * 2019-06-12 2020-12-17 Tokyo Electron Limited Planarization of semiconductor devices
KR20220034785A (ko) * 2019-07-18 2022-03-18 도쿄엘렉트론가부시키가이샤 영역 선택적 증착에서 측면 필름 성장의 완화 방법
JP2021052069A (ja) * 2019-09-24 2021-04-01 東京エレクトロン株式会社 成膜方法
JP2021057563A (ja) * 2019-09-24 2021-04-08 東京エレクトロン株式会社 成膜方法
JP7262354B2 (ja) * 2019-09-24 2023-04-21 東京エレクトロン株式会社 成膜方法
US11139163B2 (en) 2019-10-31 2021-10-05 Asm Ip Holding B.V. Selective deposition of SiOC thin films
US20210134669A1 (en) * 2019-10-31 2021-05-06 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structure for metal interconnect
JP2023505992A (ja) 2019-12-10 2023-02-14 東京エレクトロン株式会社 犠牲キャッピング層としての自己組織化単分子層
JP7227122B2 (ja) * 2019-12-27 2023-02-21 株式会社Kokusai Electric 基板処理方法、半導体装置の製造方法、基板処理装置、およびプログラム
JP7365898B2 (ja) * 2019-12-27 2023-10-20 東京エレクトロン株式会社 成膜方法及び成膜装置
JP7353200B2 (ja) * 2020-02-06 2023-09-29 東京エレクトロン株式会社 成膜方法
JP7072012B2 (ja) 2020-02-27 2022-05-19 株式会社Kokusai Electric 基板処理方法、半導体装置の製造方法、基板処理装置、及びプログラム
TW202140833A (zh) 2020-03-30 2021-11-01 荷蘭商Asm Ip私人控股有限公司 相對於金屬表面在介電表面上之氧化矽的選擇性沉積
TW202204658A (zh) 2020-03-30 2022-02-01 荷蘭商Asm Ip私人控股有限公司 在兩不同表面上同時選擇性沉積兩不同材料
TW202140832A (zh) 2020-03-30 2021-11-01 荷蘭商Asm Ip私人控股有限公司 氧化矽在金屬表面上之選擇性沉積
US11542597B2 (en) 2020-04-08 2023-01-03 Applied Materials, Inc. Selective deposition of metal oxide by pulsed chemical vapor deposition
KR20230024298A (ko) * 2020-06-17 2023-02-20 도쿄엘렉트론가부시키가이샤 표면 세정 공정을 이용한 영역 선택적 증착 방법
JP2022050198A (ja) * 2020-09-17 2022-03-30 東京エレクトロン株式会社 成膜方法及び成膜装置
US20220238323A1 (en) * 2021-01-28 2022-07-28 Tokyo Electron Limited Method for selective deposition of dielectric on dielectric
CN116802773A (zh) * 2021-02-08 2023-09-22 东京毅力科创株式会社 液相保形氧化硅旋涂沉积
WO2022210351A1 (ja) * 2021-03-31 2022-10-06 東京エレクトロン株式会社 膜形成方法及び基板処理装置
JP2023182324A (ja) * 2022-06-14 2023-12-26 東京エレクトロン株式会社 成膜方法及び成膜装置
JP2024019774A (ja) * 2022-08-01 2024-02-14 東京エレクトロン株式会社 成膜方法および成膜装置
CN115418629B (zh) * 2022-08-17 2024-01-12 杭州富芯半导体有限公司 薄膜沉积的方法
JP2024049188A (ja) * 2022-09-28 2024-04-09 東京エレクトロン株式会社 膜形成方法及び基板処理装置
JP2024081396A (ja) * 2022-12-06 2024-06-18 東京エレクトロン株式会社 成膜方法及び成膜装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150004806A1 (en) * 2006-11-01 2015-01-01 Lam Research Corporation Low-k oxide deposition by hydrolysis and condensation
KR20150092022A (ko) * 2014-02-04 2015-08-12 에이에스엠 아이피 홀딩 비.브이. 금속들, 금속 산화물들, 및 유전체들의 선택적 퇴적
US20160064284A1 (en) * 2014-08-27 2016-03-03 International Business Machines Corporation Method for fabricating a semiconductor structure
WO2016138284A1 (en) * 2015-02-26 2016-09-01 Applied Materials, Inc. Methods for selective dielectric deposition using self-assembled monolayers
US20170259298A1 (en) * 2016-03-08 2017-09-14 Asm Ip Holding B.V. Selective formation of metal silicides

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3469251B2 (ja) * 1990-02-14 2003-11-25 株式会社東芝 半導体装置の製造方法
JP4448356B2 (ja) * 2004-03-26 2010-04-07 富士通株式会社 半導体装置およびその製造方法
WO2006002305A2 (en) * 2004-06-22 2006-01-05 Sunnen Products Company Servo stroking apparatus and system
US20060073276A1 (en) 2004-10-04 2006-04-06 Eric Antonissen Multi-zone atomic layer deposition apparatus and method
US20080032064A1 (en) 2006-07-10 2008-02-07 President And Fellows Of Harvard College Selective sealing of porous dielectric materials
KR20090084847A (ko) * 2006-10-10 2009-08-05 셀로노바 바이오사이언시즈, 인코포레이티드 실리콘 및 특정 폴리포스파젠을 포함하는 조성물 및 장치
JP2010010686A (ja) 2008-06-27 2010-01-14 Asm America Inc 高成長率の二酸化ケイ素の堆積
JP2010041038A (ja) 2008-06-27 2010-02-18 Asm America Inc 重要な用途のための二酸化ケイ素の低温熱でのald
JP5310283B2 (ja) * 2008-06-27 2013-10-09 東京エレクトロン株式会社 成膜方法、成膜装置、基板処理装置及び記憶媒体
US8907881B2 (en) * 2010-04-09 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and method for driving the same
US8758584B2 (en) * 2010-12-16 2014-06-24 Sensor Innovations, Inc. Electrochemical sensors
WO2015057581A1 (en) 2013-10-15 2015-04-23 Veeco Ald Inc. Fast atomic layer deposition process using seed precursor
JP6213278B2 (ja) * 2014-02-07 2017-10-18 ウシオ電機株式会社 パターン形成体の製造方法
US20160064275A1 (en) 2014-08-27 2016-03-03 Applied Materials, Inc. Selective Deposition With Alcohol Selective Reduction And Protection
US10062564B2 (en) * 2014-12-15 2018-08-28 Tokyo Electron Limited Method of selective gas phase film deposition on a substrate by modifying the surface using hydrogen plasma
US9508545B2 (en) * 2015-02-09 2016-11-29 Applied Materials, Inc. Selectively lateral growth of silicon oxide thin film
US20170029948A1 (en) * 2015-07-28 2017-02-02 Asm Ip Holding B.V. Methods and apparatuses for temperature-indexed thin film deposition
US20170092533A1 (en) * 2015-09-29 2017-03-30 Applied Materials, Inc. Selective silicon dioxide deposition using phosphonic acid self assembled monolayers as nucleation inhibitor
US10316406B2 (en) * 2015-10-21 2019-06-11 Ultratech, Inc. Methods of forming an ALD-inhibiting layer using a self-assembled monolayer
US10049913B2 (en) 2016-04-12 2018-08-14 Tokyo Electron Limited Methods for SiO2 filling of fine recessed features and selective SiO2 deposition on catalytic surfaces
US10068764B2 (en) 2016-09-13 2018-09-04 Tokyo Electron Limited Selective metal oxide deposition using a self-assembled monolayer surface pretreatment
US10453749B2 (en) 2017-02-14 2019-10-22 Tokyo Electron Limited Method of forming a self-aligned contact using selective SiO2 deposition
US10586734B2 (en) 2017-11-20 2020-03-10 Tokyo Electron Limited Method of selective film deposition for forming fully self-aligned vias
US10468585B1 (en) * 2018-05-31 2019-11-05 International Business Machines Corporation Dual function magnetic tunnel junction pillar encapsulation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150004806A1 (en) * 2006-11-01 2015-01-01 Lam Research Corporation Low-k oxide deposition by hydrolysis and condensation
KR20150092022A (ko) * 2014-02-04 2015-08-12 에이에스엠 아이피 홀딩 비.브이. 금속들, 금속 산화물들, 및 유전체들의 선택적 퇴적
US20160064284A1 (en) * 2014-08-27 2016-03-03 International Business Machines Corporation Method for fabricating a semiconductor structure
WO2016138284A1 (en) * 2015-02-26 2016-09-01 Applied Materials, Inc. Methods for selective dielectric deposition using self-assembled monolayers
US20170259298A1 (en) * 2016-03-08 2017-09-14 Asm Ip Holding B.V. Selective formation of metal silicides

Also Published As

Publication number Publication date
US20190164749A1 (en) 2019-05-30
JP2019096877A (ja) 2019-06-20
KR20190058343A (ko) 2019-05-29
KR102549289B1 (ko) 2023-06-29
TWI788463B (zh) 2023-01-01
US20190157149A1 (en) 2019-05-23
KR102523731B1 (ko) 2023-04-19
JP7193990B2 (ja) 2022-12-21
US10847363B2 (en) 2020-11-24
JP7287770B2 (ja) 2023-06-06
TW201930626A (zh) 2019-08-01
KR20220132493A (ko) 2022-09-30
KR102491746B1 (ko) 2023-01-25
TW201930625A (zh) 2019-08-01
US11658068B2 (en) 2023-05-23
TW202328473A (zh) 2023-07-16
JP2019096881A (ja) 2019-06-20
KR20190058342A (ko) 2019-05-29
US10586734B2 (en) 2020-03-10
US20210074584A1 (en) 2021-03-11

Similar Documents

Publication Publication Date Title
TWI798290B (zh) 用於形成完全自對準介層窗的選擇性沉積方法
US11908684B2 (en) Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US10465294B2 (en) Oxide and metal removal
Shwartz Handbook of semiconductor interconnection technology
US7332426B2 (en) Substrate processing method and fabrication process of a semiconductor device
TW202111148A (zh) 包括介電層之結構、其形成方法及執行形成方法的反應器系統
KR101921336B1 (ko) 융기 특징부 상에 고도의 형상적응 비정질 카본 필름의 증착 방법
KR20170017779A (ko) 알루미늄 및 질소 함유 물질의 선택적 퇴적
TW201947641A (zh) 用於基板上形成摻雜金屬碳化物薄膜之方法及相關半導體元件結構
US9748093B2 (en) Pulsed nitride encapsulation
TW201820419A (zh) 金屬表面上之氧化鋁的選擇性沉積
KR102018432B1 (ko) 성막 방법
JP6025735B2 (ja) マイクロ波プラズマを用いる誘電膜堆積方法
US20080260967A1 (en) Apparatus and method for integrated surface treatment and film deposition
TW498456B (en) A method of improving the adhesion of copper
KR102597990B1 (ko) 알루미늄 및 질소를 포함하는 물질의 선택적 증착 방법
TW202407758A (zh) 使用體積膨脹的大面積間隙填充