TWI796626B - 半導體封裝 - Google Patents

半導體封裝 Download PDF

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Publication number
TWI796626B
TWI796626B TW110100971A TW110100971A TWI796626B TW I796626 B TWI796626 B TW I796626B TW 110100971 A TW110100971 A TW 110100971A TW 110100971 A TW110100971 A TW 110100971A TW I796626 B TWI796626 B TW I796626B
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Taiwan
Prior art keywords
substrate
component
conductive layer
passive
electronic component
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TW110100971A
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English (en)
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TW202143430A (zh
Inventor
呂添裕
胡楚威
蕭欣欣
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聯發科技股份有限公司
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Publication of TW202143430A publication Critical patent/TW202143430A/zh
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Abstract

本發明公開一種半導體封裝，包括：第一基板；第二基板；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開間隔；電子部件，設置在該間隔內；以及無源部件，設置在該間隔內。

Description

半導體封裝
本發明涉及半導體技術領域，尤其涉及一種半導體封裝。
無源部件是不產生電力，但消耗電力、存儲和/或釋放電的電力。無源元件包括電阻器、電容器和電感器。在大多數電路中，無源部件連接到有源部件，有源部件通常是半導體器件，例如放大器和邏輯晶片。
因此，如何與半導體器件連接以提高傳送速率已成為工業上的重要任務。
有鑑於此，本發明提供一種半導體封裝，以解決上述問題。
根據本發明的第一方面，公開一種半導體封裝，包括：第一基板；第二基板；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開間隔；電子部件，設置在該間隔內；以及無源部件，設置在該間隔內。
根據本發明的第二方面，公開一種半導體封裝，包括：第一基板，包括第一最外側導電層；第二基板，包括第二最外側導電層；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開一定間隔；電子部件，設置在該間隔內；以及有無源部件，設置在該間隔內，其中該無源部件透過穿過該第一最外層導電層、該導電部件和該第二最外層導電層的導電路徑與該電子部件電連接。
本發明的半導體封裝由於具有：第一基板；第二基板；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開間隔。電子部件，設置在該間隔內；以及無源部件，設置在該間隔內。採用這種方式，電子部件與無源部件之間的導電路徑較短，可以縮短兩者的連接路徑，訊號的傳遞更快。
100,200,300,400:半導體封裝
110:第一基板
111,121:介電層
112,122:導電層
112’:第一最外部導電層
113,123:導電通孔
120:第二基板
122’:第二最外部導電層
140:電子部件
140a:有源表面
140s:第一背面
150:無源部件
150s:第二背面
151:第一電極
152:第二電極
160:電子設備
T1,T2,T3:厚度
H1,H2:間隔
透過閱讀後續的詳細描述和實施例可以更全面地理解本發明，本實施例參照附圖給出，其中：圖1示出了根據本發明實施例的半導體封裝的示意圖；圖2示出了根據本發明另一實施例的半導體封裝的示意圖；圖3示出了根據本發明另一實施例的半導體封裝的示意圖；圖4示出了根據本發明另一實施例的半導體封裝的示意圖。
參照圖1，圖1示出了根據本發明實施例的半導體封裝100的示意圖。半導體封裝件100可以應用於電子設備，諸如行動電話、膝上型電腦、平板電腦、臺式電腦等。半導體封裝件例如是PoP(Package-On-Package，封裝上封裝)結構。
半導體封裝件100包括第一基板110、第二基板120、至少一個導電部件130、至少一個電子部件140和至少一個無源部件150。導電部件130設置在第一基板110和第二基板120之間，第一基板110和第二基板120彼此隔開間隔H1。電子部件140和無源部件150均設置在間隔H1內。因此，電子部件140和無源部件150可以透過短(或更短)的導電路徑電連接，因此，它可以提高電子部件140和無源部件150之間的訊號傳送速率。
另外，第一基板110具有厚度T1，第二基板120具有厚度T2，其中間隔H1可以小於厚度T1和/或厚度T2。因此，與將無源元件150佈置在與電子元件140相對的第一基板110上(垂直導電路徑行進穿過厚度T1)相比，從電子部件140到無源部件150的垂直導電路徑更短。具體來說，通常無源元件150安裝在第一基板110的與安裝電子部件140的相對側(圖1中第一基板110的下表面)，先前技術的這種方式使得電子部件140和無源部件150之間的電性連接路徑需要透過導電通孔113，而導電通孔113的阻抗較大，這樣電子部件140和無源部件150之間電連接路徑阻抗較大，並且連接路徑較長，不利於電子部件140和無源部件150之間的訊號傳送。本發明圖1的方案將無源部件150安裝在第二基板120的下表面，並且與電子部件140相鄰設置，這樣電子部件140和無源部件150之間的電性連接路徑無需經過導電通孔113等之類的通孔，因此電子部件140和無源部件150之間電連接路徑阻抗較小，並且連接路徑更短，從而可以提高電子部件140和無源部件150之間的訊號傳送速率。並且圖1的這種方式在製造時，可以讓電子部件140形成在第一基板110上，讓 無源部件150形成在第二基板120上，之後透過導電部件130將帶有電子部件140的第一部件110和帶有無源部件150的第二基板120連接在一起，這種分別分開製造，然後再進行組裝的方式更加方便製造，並且組裝方式靈活，可以根據所需自由調整組裝在一起封裝。
在一個實施例中，間隔H1例如在100微米至270微米之間。無源部件150具有例如在90微米和150微米之間的範圍內的厚度T3。這樣以便在間隔H1中放置無源部件150和電子部件140。
第一基板110可以是單層結構或多層結構。就多層結構而言，第一基板110包括複數個介電層111、至少一個導電層112和至少一個導電通孔113，其中，一個導電層112形成在相鄰的兩個介電層111之間，並且相鄰兩個導電層112與至少一個導電通孔113電連接。在本實施例中，每個導電層112在第一方向上延伸並且包括至少一個導電跡線和/或至少一個導電墊。第一方向例如是第一基板110的平面的延伸方向，例如水平方向。電子部件140和無源部件150可以透過導電層112電連接。
就材料而言，導電層112和/或導電通孔113可以由包括例如銅等的材料製成。
在本實施例中，每個導電通孔113在第二方向上延伸。第二方向基本上垂直於第一方向。第二方向例如是第一基板110的厚度的延伸方向，例如垂直(或豎直)方向。
第二基板120例如是中介層。第二基板120可以是單層結構或多層結構。在多層結構方面，第二基板120包括複數個介電層121，至少一個導電層122和至少一個導電通孔123，其中一個導電層122形成在相鄰的兩個介電層121之間，並且相鄰兩個導電層122與至少一個導電通孔123電連接。在本實施例中，每個導電層122沿第三方向延伸並且包括至少一個導電跡線和/或至 少一個導電墊。另外，第三方向例如是第一基板120的平面的延伸方向，例如水平方向。電子部件140和無源部件150可以透過導電層122電連接。
就材料而言，導電層122和/或導電通孔123可以由包括例如銅等的材料製成。
在本實施例中，每個導電通孔123在第四方向上延伸。第四方向基本垂直于第三方向。第四方向例如是第二基板120的厚度的延伸方向，例如垂直(豎直)方向。
導電部件130例如是焊球。電子部件140和無源部件150可以透過導電部件130電連接。
就導電率而言，導電部件130的導電率例如低於導電層112和導電層122的導電率。另外，導電部件130在第二方向或第四方向上將第一基板110和第二基板120電連接。因此，導電層112和123可以提高電子部件140和無源部件150之間的傳送速率。
第一基板110的導電層112包括第一最外部導電層112’。第二基板120的導電層122包括第二最外部導電層122’、電子部件140直接或間接與第一最外部導電層112’連接。第一最外導電層112’與無源部件150與第二最外導電層122'直接或間接連接，其中，導電部件130連接第一最外導電層112'和第二最外導電層122’。因此，無源部件150透過穿過第一最外部導電層112’、導電部件130和第二最外部導電層122’的導電路徑與電子部件140電連接。由於導電路徑行進穿過最外層導電層，因此阻抗損耗低，並且導電路徑中訊號的傳送速率較高。另外，導電路徑大部分行進穿過具有較高導電性(高於導電部件130的導電性)的導電層，因此阻抗損耗低並且在導電路徑中的傳送速率較高。
在一個實施例中，電子部件140例如是邏輯晶片等。在一個實施例中，無源部件150例如是電阻器、電感器和/或電容器。
在本實施例中，電子部件140設置在第一基板110上，無源部件150設置在第二基板上，其中無源部件150和電子部件140以背對背的方式設置。例如，電子部件140具有第一背面140s，無源部件150具有第二背面150s，其中第一背面140s和第二背面150s彼此面對。
在另一個實施例中，電子部件140設置在第二基板120上，而無源部件150設置在第一基板110上。
另外，電子部件140例如是倒裝晶片。例如，電子部件140具有與第一背面140s相對的有源表面140a，其中有源表面140a面對第一基板110。無源部件150包括與第二最外部導電層122'電連接的第一電極151和第二電極152。
在本實施方式中，第一背面140s與第二背面150s隔開間隔H2。因此，可以避免電子部件140和無源部件150之間的干擾應力。在另一個實施例中，第一背面140s可以與第二背面150s接觸。因此，在第一後表面140s和第二後表面150s之間產生了導熱通道(或路徑)，例如電子部件140的熱量透過與之接觸的無源部件150、第二最外部導電層122'、導電通孔123、導電層122等散發出去，提高散熱效率，保證封裝的正常運行。
另外，如圖1所示，半導體封裝100還包括至少一個電子設備160，例如記憶體。電子設備160設置在第二基板120上。電子設備160可以透過導電層122和導電通孔123與無源部件150電連接。此外，電子設備160可以透過導電層122、導電通孔123和第一最外部導電層112'與電子组件140電連接。
參照圖2，圖2示出了根據本發明另一實施例的半導體封裝200的示意圖。
半導體封裝200包括第一基板110、第二基板120、至少一個導 電部件130、至少一個電子部件140、至少一個無源部件150以及至少一個電子設備160。
半導體封裝件200包括與半導體封裝件100相同或相似的特徵，不同之處在於無源部件150和電子部件140並排設置。
電子部件140和無源部件150都設置在第一基板110上。在另一個實施例中，電子部件140和無源部件150都可以設置在第二基板120上。
在本實施例中，電子部件140具有面對第一基板110的有源表面140a，而無源部件150包括與第一最外導電層112'電連接的第一電極151和第二電極152。
在本實施例中，第一基板110的導電層112包括第一最外部導電層112'，並且電子部件140和無源部件150與第一最外部導電層112'直接或間接連接。圖2的這種方式可以使電子部件140和無源部件150之間導電路徑更短，例如電子部件140和無源部件150可以透過第一外部導電層112'電連接(雖然圖2中未示出，但是圖2僅是截面圖，在同一層中的第一外部導電層112'在圖中未示出的地方可以相互連接)，這樣電子部件140和無源部件150之間的電路路徑的阻抗也較小，可以提高電子部件140和無源部件150之間的訊號傳送速率。此外，電子部件140和無源部件150並排放置可以讓第一基板110和第二基板120之間的間隔無需太大，從而減小封裝的尺寸。
參照圖3，圖3示出了根據本發明另一實施例的半導體封裝300的示意圖。
半導體封裝300包括第一基板110、第二基板120、至少一個導電部件130、至少一個電子部件140、至少一個無源部件150以及至少一個電子設備160。
半導體封裝300包括與半導體封裝100相同或相似的特徵，不 同之處在於無源部件150直接或間接設置在電子部件140上。因此，無源部件150在不穿過第一基板110的導電層112、第二基板120的導電層122和導電部件130的情況下，可以透過短(較短或最短)的導電路徑與電子部件140電連接。
在本實施例中，無源部件150設置在電子部件140和第二基板120之間。例如，無源部件150包括設置在第一背面上的第一電極151和第二電極152。電子部件140的140s(面向第二基板120)並與電子部件140電連接。
另外，無源部件150的第二後表面150s可以與第二基板120分離，或者與第二基板120接觸。圖3中的方式可以使無源部件150和電子部件140之間的導電路徑更短，電子部件140和無源部件150之間的電路路徑的阻抗也較小，可以提高電子部件140和無源部件150之間的訊號傳送速率。
參照圖4，圖4示出了根據本發明另一實施例的半導體封裝400的示意圖。
半導體封裝400包括第一基板110、第二基板120、至少一個導電部件130、至少一個電子部件140、至少一個無源部件150以及至少一個電子設備160。
半導體封裝件400包括與半導體封裝件300相同或相似的特徵，不同之處在於無源部件150佈置在電子部件140和第一基板110之間。無源部件150包括第一電極151和第二電極152、第一電極151和第二電極152設置在電子部件140的有源表面140a上(面對第一基板110)並且與電子部件140電連接。
另外，電子部件140的第一後表面140s可以與第二基板120分離，或者與第二基板120接觸。圖4中的方式可以使無源部件150和電子部件140之間的導電路徑更短，電子部件140和無源部件150之間的電路路徑的阻抗 也較小，可以提高電子部件140和無源部件150之間的訊號傳送速率。並且無源部件150佈置在電子部件140和第一基板110之間可以節省安裝空間，使得第一基板110與第二基板120之間的間隔無需過大，從而減小封裝尺寸。在圖4的實施例中，可以透過高度較高的連接元件連接電子部件140與第一最外部導電層112’，這樣可以留出放置無源元件150的空間，當然該連接元件的高度小於導電部件130的高度。無源元件150的第一電極151和第二電極152可以是例如透過連接元件直接連接到電子部件140，或者連接到第一最外部導電層112’以間接的連接到電子部件140。
儘管已經對本發明實施例及其優點進行了詳細說明，但應當理解的是，在不脫離本發明的精神以及申請專利範圍所定義的範圍內，可以對本發明進行各種改變、替換和變更。所描述的實施例在所有方面僅用於說明的目的而並非用於限制本發明。本發明的保護範圍當視所附的申請專利範圍所界定者為准。本領域技術人員皆在不脫離本發明之精神以及範圍內做些許更動與潤飾。
100:半導體封裝
110:第一基板
111,121:介電層
112,122:導電層
112’:第一最外部導電層
113,123:導電通孔
120:第二基板
122’:第二最外部導電層
140:電子部件
140a:有源表面
140s:第一背面
150:無源部件
150s:第二背面
151:第一電極
152:第二電極
160:電子設備
T1,T2,T3:厚度
H1,H2:間隔

Claims (5)

  1. 一種半導體封裝，包括：第一基板；第二基板；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開間隔；電子部件，設置在該間隔內；以及無源部件，設置在該間隔內；其中，該電子部件設置在該第一基板和該第二基板中的一個上，並且該無源部件設置在該第一基板和該第二基板中的另一個上；該電子部件具有第一背面，該無源部件具有第二背面，並且該第一背面和該第二背面彼此面對，該第一背面接觸該第二背面，並且該第一基板和該第二基板的該間隔在100微米至270微米之間的範圍內。
  2. 如請求項1之半導體封裝，其中，該第一基板包括第一最外部導電層，該第二基板包括第二最外部導電層，該電子部件與該第一最外部導電層連接，該無源部件與該第二最外部導電層連接，並且該導電部件與該第一最外導電層和該第二最外導電層。
  3. 如請求項1之半導體封裝，其中，該第一基板具有厚度，並且該間隔小於該厚度。
  4. 如請求項1之半導體封裝，其中，該無源部件的厚度在90微米至150微米之間。
  5. 一種半導體封裝，包括：第一基板，包括第一最外側導電層； 第二基板，包括第二最外側導電層；導電部件，設置在該第一基板和該第二基板之間，其中，該第一基板和該第二基板彼此隔開一定間隔；電子部件，設置在該間隔內；以及無源部件，設置在該間隔內，其中該無源部件透過穿過該第一最外層導電層、該導電部件和該第二最外層導電層的導電路徑與該電子部件電連接；其中，該電子部件設置在該第一基板和該第二基板中的一個上，並且該無源部件設置在該第一基板和該第二基板中的另一個上；該電子部件具有第一背面，該無源部件具有第二背面，並且該第一背面和該第二背面彼此面對，該第一背面接觸該第二背面，並且該第一基板和該第二基板的該間隔在100微米至270微米之間的範圍內。
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