TWI765038B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TWI765038B
TWI765038B TW107116418A TW107116418A TWI765038B TW I765038 B TWI765038 B TW I765038B TW 107116418 A TW107116418 A TW 107116418A TW 107116418 A TW107116418 A TW 107116418A TW I765038 B TWI765038 B TW I765038B
Authority
TW
Taiwan
Prior art keywords
protective film
laminated structure
semiconductor wafer
test piece
substrate
Prior art date
Application number
TW107116418A
Other languages
English (en)
Chinese (zh)
Other versions
TW201901772A (zh
Inventor
山岸正憲
Original Assignee
日商琳得科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商琳得科股份有限公司 filed Critical 日商琳得科股份有限公司
Publication of TW201901772A publication Critical patent/TW201901772A/zh
Application granted granted Critical
Publication of TWI765038B publication Critical patent/TWI765038B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Dicing (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW107116418A 2017-05-17 2018-05-15 半導體裝置及其製造方法 TWI765038B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017-097994 2017-05-17
JP2017097994 2017-05-17

Publications (2)

Publication Number Publication Date
TW201901772A TW201901772A (zh) 2019-01-01
TWI765038B true TWI765038B (zh) 2022-05-21

Family

ID=64273757

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107116418A TWI765038B (zh) 2017-05-17 2018-05-15 半導體裝置及其製造方法

Country Status (6)

Country Link
JP (1) JP6438181B1 (ko)
KR (1) KR102387943B1 (ko)
CN (1) CN110622302B (ko)
PH (1) PH12019502541A1 (ko)
TW (1) TWI765038B (ko)
WO (1) WO2018212171A1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7141516B2 (ja) * 2019-03-07 2022-09-22 リンテック株式会社 ダイボンディングシート、及びフィルム状接着剤付き半導体チップの製造方法
WO2021171898A1 (ja) * 2020-02-27 2021-09-02 リンテック株式会社 保護膜形成用シート、保護膜付きチップの製造方法、及び積層物
JP7151940B1 (ja) * 2021-02-03 2022-10-12 住友ベークライト株式会社 封止用樹脂組成物および半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200428626A (en) * 2003-06-09 2004-12-16 Advanced Semiconductor Eng Chip structure
TW200507127A (en) * 2003-08-14 2005-02-16 Advanced Semiconductor Eng Semiconductor chip with bumps and method for manufacturing the same
TWM422754U (en) * 2010-10-06 2012-02-11 Xintec Inc Chip structure
TW201540507A (zh) * 2014-04-22 2015-11-01 迪睿合股份有限公司 保護帶、及使用其之半導體裝置之製造方法、以及半導體裝置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2250059B1 (ko) 1973-10-31 1976-10-01 Sefa Sa
JP3565023B2 (ja) * 1998-06-26 2004-09-15 松下電器産業株式会社 電子部品の実装体および電子部品
JP2002270634A (ja) * 2001-03-08 2002-09-20 Rohm Co Ltd 半導体装置
KR100637305B1 (ko) * 2002-02-27 2006-10-23 히다치 가세고교 가부시끼가이샤 봉지용 에폭시 수지 조성물 및 이를 사용한 전자 부품 장치
JP2004134487A (ja) * 2002-10-09 2004-04-30 Toray Ind Inc 半導体装置の製造方法および半導体装置
JP2011228637A (ja) * 2010-03-30 2011-11-10 Furukawa Electric Co Ltd:The チップ保護用フィルム
JP5830250B2 (ja) 2011-02-15 2015-12-09 日東電工株式会社 半導体装置の製造方法
JP2012241063A (ja) * 2011-05-17 2012-12-10 Nitto Denko Corp 半導体装置製造用の接着シート
CN102842541A (zh) 2011-06-22 2012-12-26 日东电工株式会社 层叠膜及其使用
JP6033734B2 (ja) * 2013-04-30 2016-11-30 日東電工株式会社 フィルム状接着剤、ダイシングテープ一体型フィルム状接着剤、及び、半導体装置の製造方法
JPWO2016027888A1 (ja) * 2014-08-22 2017-06-01 リンテック株式会社 保護膜形成用シートおよび保護膜付き半導体チップの製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200428626A (en) * 2003-06-09 2004-12-16 Advanced Semiconductor Eng Chip structure
TW200507127A (en) * 2003-08-14 2005-02-16 Advanced Semiconductor Eng Semiconductor chip with bumps and method for manufacturing the same
TWM422754U (en) * 2010-10-06 2012-02-11 Xintec Inc Chip structure
TW201540507A (zh) * 2014-04-22 2015-11-01 迪睿合股份有限公司 保護帶、及使用其之半導體裝置之製造方法、以及半導體裝置
US20160181140A1 (en) * 2014-04-22 2016-06-23 Dexerials Corporation Protective tape and method for manufacturing a semiconductor device using the same

Also Published As

Publication number Publication date
JPWO2018212171A1 (ja) 2019-06-27
WO2018212171A1 (ja) 2018-11-22
TW201901772A (zh) 2019-01-01
CN110622302B (zh) 2022-11-22
KR102387943B1 (ko) 2022-04-18
JP6438181B1 (ja) 2018-12-12
KR20200008118A (ko) 2020-01-23
CN110622302A (zh) 2019-12-27
PH12019502541A1 (en) 2020-07-13

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