TWI684222B - 半導體裝置之製造方法 - Google Patents

半導體裝置之製造方法 Download PDF

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TWI684222B
TWI684222B TW107103771A TW107103771A TWI684222B TW I684222 B TWI684222 B TW I684222B TW 107103771 A TW107103771 A TW 107103771A TW 107103771 A TW107103771 A TW 107103771A TW I684222 B TWI684222 B TW I684222B
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semiconductor
semiconductor wafers
semiconductor wafer
wafers
wafer
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TW107103771A
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TW201921520A (zh
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黑澤哲也
大野天頌
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日商東芝記憶體股份有限公司
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Abstract

實施形態提供一種縮短半導體晶片之積層所耗費之時間且可抑制異物侵入半導體晶片間的半導體裝置之製造方法及半導體裝置。
實施形態之半導體裝置之製造方法為：對具有大致相同之構成且包含複數個半導體晶片之第1及第2半導體晶圓之切割區域照射雷射光，於第1及第2半導體晶圓各自之半導體結晶形成具有應變之改質層。將第2半導體晶圓以向第1方向偏移之方式積層於第1半導體晶圓上，上述第1方向係自第1半導體晶圓之複數個半導體晶片各自之第1邊朝向該第1邊之對邊之方向。將第1及第2半導體晶圓劈開。

Description

半導體裝置之製造方法
本實施形態係關於一種半導體裝置之製造方法及半導體裝置。
半導體晶圓於利用切割而單片化為半導體晶片後，於黏晶(die boning)步驟中作為半導體晶片而搭載於框架或安裝基板上。此時，存在將複數個半導體晶片積層於安裝基板上而製成大容量或高功能之半導體裝置之情形。於將半導體晶片積層時，各半導體晶片於相對於其正下方之其他半導體晶片或安裝基板位置對準後，接著於該其他半導體晶片或安裝基板上。因此，有半導體晶片之積層步驟耗費較長時間且異物進入半導體晶片間之虞。
實施形態是提供一種縮短半導體晶片之積層所耗費之時間且可抑制異物侵入至半導體晶片間之半導體裝置之製造方法及半導體裝置。
實施形態之半導體裝置之製造方法係對具有大致相同之構成且包含複數個半導體晶片之第1及第2半導體晶圓之切割區域照射雷射光，而於第1及第2半導體晶圓各自之半導體結晶形成具有應變之改質層。將第2半導體晶圓以向第1方向偏移之方式積層於第1半導體晶圓上，該第1方向係自第1半導體晶圓之複數個半導體晶片之各自之第1邊朝向該第1邊之對邊之方向。將第1及第2半導體晶圓劈開。
1‧‧‧半導體裝置
10‧‧‧半導體晶片
10_1~10_n‧‧‧半導體晶片
11‧‧‧積層體
100‧‧‧第1半導體晶圓
100_1~100_3‧‧‧第1~第3半導體晶圓
101‧‧‧半導體元件
103‧‧‧保護帶
105‧‧‧雷射光振盪器
107‧‧‧研磨石
110‧‧‧感光性接著劑
120‧‧‧安裝基板
121‧‧‧改質層
122‧‧‧改質部分
125‧‧‧導線
127‧‧‧凸塊
128‧‧‧配線層
129‧‧‧樹脂
130‧‧‧樹脂
131‧‧‧黏著性片
132‧‧‧上推構件
B1‧‧‧第1邊界
BP‧‧‧接合墊
DL‧‧‧切割線
D1‧‧‧第1方向
D2‧‧‧第2方向
L‧‧‧虛線
P1‧‧‧間距
Rbp‧‧‧區域
S1‧‧‧邊
S2‧‧‧邊
圖1(A)及(B)係表示第1實施形態之半導體裝置之製造方法之一例之圖。
圖2係繼圖1之後，表示半導體裝置之製造方法之一例之圖。
圖3係沿圖2之切割線之局部剖視圖。
圖4係繼圖2之後，表示半導體裝置之製造方法之一例之圖。
圖5係繼圖4之後，表示半導體裝置之製造方法之一例之圖。
圖6係表示第1半導體晶圓之構成之一例之俯視圖。
圖7係將1個半導體晶片抽出表示之立體圖。
圖8係沿圖5之D1方向之剖視圖。
圖9係繼圖5之後，表示半導體裝置之製造方法之一例之圖。
圖10係繼圖9之後，表示半導體裝置之製造方法之一例之圖。
圖11係表示積層體11之構成例之剖視圖。
圖12係表示第2實施形態之半導體裝置2之構成例之剖視圖。
圖13係表示第2實施形態之積層體11之構成例之剖視圖。
[相關申請案]
本申請享有日本專利申請2017-180375號(申請日期：2017年9月20日)為基礎申請之優先權。本申請藉由參照該基礎申請而包含基礎申請之全部內容。
以下，參照附圖對本發明之實施形態進行說明。本實施形態並不對本發明進行限定。於以下之實施形態中，半導體基板之上下方向表示將設置有半導體元件之表面或其相反之背面設為上時之相對方向，有時與按照重力加速度之上下方向不同。
(第1實施形態)
圖1(A)~圖10係表示第1實施形態之半導體裝置之製造方法之一例之概略圖。本實施形態之半導體裝置利用雷射光切割而於複數個半導體晶圓之各自之切割線之矽之內部形成改質層。然後，將複數個半導體晶圓以晶圓狀態積層，且於樹脂帶上延伸，並於積層狀態下將半導體晶片單片化。複數個半導體晶片以積層之狀態安裝於安裝基板上。半導體裝置例如可以是NAND(Not-AND，反及)型EEPROM(Electrically Erasable Programmable Read-Only Memory，電可擦可程式化唯讀記憶體)等半導體記憶體，但並不限定於此，可以是將相同構成之複數個半導體晶片積層而構成之任意之半導體裝置。
首先，如圖1(A)所示，於第1半導體晶圓100上形成半導體元件101。半導體元件101形成於每個半導體晶片(第1半導體晶片)10。複數個半導體晶片10間具有切割線DL，之後藉由切斷該切割線DL而將半導體晶片10單片化。複數個半導體晶片10分別具有大致相同之圖案，且具有大致相同構成之半導體積體電路。
於第1半導體晶圓100之複數個半導體晶片10之表面形成有接合墊BP。對於接合墊BP，例如使用Cu、Al、Aa、Au等導電性金屬。接合墊BP設置於各半導體晶片10之第1邊S1之附近，且沿該第1邊S1排列。
其次，為了清潔第1半導體晶圓100之表面而進行電漿處理。其次，如圖1(B)所示，將保護帶103貼附於第1半導體晶圓100之表面。於第1半導體晶圓100上設置有感光性接著劑(圖6之110)作為保護膜及接著劑。感光性接著劑例如感光性聚醯亞胺等般，可利用微影技術進行加工且藉由加熱產生黏著性之保護材料。此外，對於感光性接著劑之塗佈區域，之後將 參照圖6進行說明。
其次，如圖2所示，使用雷射光振盪器105對第1半導體晶圓100之背面之與切割線(切割區域)對應之部分照射雷射光。由此，如圖3所示，於第1半導體晶圓100之內部(矽基板之內部)形成改質層(非晶層或多晶矽層)121。圖3係沿圖2之切割線之局部剖視圖。雷射光振盪器105使雷射光於矽基板之任意深度位置處聚焦。雷射光為了可將矽單晶改質，較佳為具有800nm以上且3000nm以下之波長。於為低於800nm之波長之情形時，被矽內部吸收之概率增加，而變得難以形成改質層。於為超過3000nm之波長之情形時，透過矽之概率增加，而變得難以形成改質層。藉由對矽基板照射這種雷射光，於雷射光之聚焦位置加熱矽單晶，而改質成非晶矽或多晶矽。
雷射光係每隔某間距P1之間隔而照射。由此，於改質層121中，改質部分122係以某間距P1之間隔而形成。改質層121對半導體晶圓內之周圍之半導體結晶(例如矽單晶)具有應變。因此，於改質層121之周圍產生劈開區域(未圖示)。當間距P1較窄時，改質部分122之周圍之劈開區域相連，成為層狀(帶狀)之改質層121。
其次，如圖4般，利用研磨石107自第1半導體晶圓100之背面對矽基板進行研磨。此時，將第1半導體晶圓100研磨至較圖3之改質層121淺之位置，而使改質層121殘留於第1半導體晶圓100內。由此，第1半導體晶圓100得以薄膜化。
第2~第n半導體晶圓(n為2以上之整數)亦與第1半導體晶圓100同樣地形成。第2~第n半導體晶圓具有與第1半導體晶圓100大致相同之構成，且包含大致相同之複數個半導體晶片。另外，亦與第1半導體晶圓 100同樣地，於第2~第n半導體晶圓沿切割線形成有改質層。以下，將第1~第n半導體晶圓表示為100_1~100_n。
其次，如圖5所示，將第1半導體晶圓100_1之背面貼附到於晶圓環130內延展之可撓性之黏著性片131。將第2半導體晶圓100_2積層於第1半導體晶圓100_1上，並將第3半導體晶圓100_3積層於第2半導體晶圓100_2上。對於第4~第n半導體晶圓(未圖示)，亦可同樣地積層。
此處，第2半導體晶圓100_2以向第1方向D1偏移之方式積層，該第1方向D1係自第1半導體晶圓100_1之複數個半導體晶片10之各自之第1邊S1朝向該第1邊S1之對邊S2之方向。
例如，圖6係表示第1半導體晶圓100_1之構成之一例之俯視圖。第2~第n半導體晶圓100_2~100_n之構成可與第1半導體晶圓100_1之構成相同。因此，此處對第1半導體晶圓100_1之構成進行說明，省略第2~第n半導體晶圓100_2~100_n之構成之說明。
第1半導體晶圓100_1具有複數個半導體晶片10。於複數個半導體晶片10間設置有切割線DL。雖然於圖6中並未圖示，但於切割線DL形成有改質層。於複數個半導體晶片10分別設置有半導體元件101，且於各第1半導體晶片10之第1邊S1之附近，沿第1邊S1排列有接合墊BP。
作為第1接著劑之感光性接著劑110於複數個半導體晶片10之各自之表面，被覆自邊S2至接合墊BP近前之第1邊界B1為止。而且，感光性接著劑110不被覆自第1邊界B1至第1邊S1為止之接合墊BP之區域。
感光性接著劑110於圖1(A)所示之步驟之前，塗佈於第1半導體晶圓100_1上，並利用微影技術以如下方式圖案化，即，被覆自複數個半導體晶片10之第1邊S1之對邊S2至接合墊BP近前之第1邊界B1為止，且不被覆 自該第1邊界B1至第1邊S1為止。
圖7係將1個半導體晶片10抽出表示之立體圖。若參照圖7，則可知，感光性接著劑110被覆自邊S2至接合墊BP近前之第1邊界B1為止，並且，露出自第1邊界B1至第1邊S1為止之接合墊BP之區域。
圖8係沿圖5之D1方向之剖視圖。於樹脂帶131上積層有第1~第3半導體晶圓100_1~100_3。第2半導體晶圓100_2自第1半導體晶圓100_1之複數個半導體晶片10之各自之第1邊S1偏移至第1邊界B1為止。第3半導體晶圓100_3自第2半導體晶圓100_2之複數個半導體晶片10之各自之第1邊S1偏移至第1邊界B1為止。自第1邊S1至第1邊界B1為止之偏移寬度於下文中亦稱為接合墊BP之區域Rbp。
此外，積層之半導體晶圓之數量並無限定。因此，於第2半導體晶圓上亦可積層具有與第1及第2半導體晶圓大致相同構成之第3~第n半導體晶圓(n為3以上)。於該情形時，第2~第n半導體晶圓100_2~100_n各自相對於正下方之半導體晶圓向第1方向D1偏移地積層。該偏移寬度等於自第1邊S1至第1邊界B1之寬度(接合墊BP之區域Rbp之寬度)。
於將第1~第n半導體晶圓100_1~100_n積層時，亦可利用某壓力對積層之第1~第n半導體晶圓100_1~100_n只按壓1次。由此，將第1~第n半導體晶圓100_1~100_n壓接。或者，亦可於以第1壓力對積層之第1~第n半導體晶圓100_1~100_n進行按壓後，再以高於第1壓力之第2壓力進行按壓。即，亦可以不同之壓力對積層之第1~第n半導體晶圓100_1~100_n進行複數次按壓。於該情形時，亦可於以第1壓力進行按壓後，以不同之壓縮裝置以第2壓力進行按壓。
其次，一邊將對積層之第1~第n半導體晶圓100_1~100_n加熱一邊 進行按壓，從而將感光性接著劑110回焊。由此，將第1~第n半導體晶圓100_1~100_n接著。
其次，如圖9所示，藉由以上推構件132自下方將樹脂帶131上推，而將樹脂帶131拉伸(擴展)。由此，第1~第3半導體晶圓100_1~100_3與樹脂帶131一起被拉伸。此時，將第1~第3半導體晶圓100_1~100_3沿各自之改質層(圖8之虛線L)劈開，而單片化為積層之複數個半導體晶片10。下文中亦將積層之複數個半導體晶片10稱為積層體11。
其次，如圖10所示，將積層體11安裝於安裝基板120上(黏晶)。此時，對樹脂帶131照射UV(ultraviolet，紫外線)光，使樹脂帶131之黏著性降低。以導線125將設置於半導體晶片10上之接合墊BP與安裝基板120接合。進而，以樹脂129將半導體晶片10及導線125密封。由此，本實施形態之半導體裝置1完成。
根據本實施形態，於利用雷射光於複數個半導體晶圓100_1、100_2各自之切割線DL處形成改質層121後，將半導體晶圓100_1、100_2錯開相當於接合墊BP之區域而進行積層。且，將積層之複數個半導體晶圓100_1、100_2同時劈開。即，本實施形態並非於將各半導體晶圓單片化為半導體晶片後將半導體晶片積層，而是於將複數個半導體晶圓劈開前進行積層，其後於積層狀態下將複數個半導體晶圓一次劈開。
若為將半導體晶圓單片化為半導體晶片後將半導體晶片積層，於將半導體晶片安裝於安裝基板上時，必須將各半導體晶片逐個進行位置對準。因此，半導體晶片之積層耗費時間，生產性變差。另外，於將半導體晶片積層於其他半導體晶片上時，污物或微粒等異物侵入至半導體晶片與其他半導體晶片之間之可能性變高。
相對於此，根據本實施形態之製造方法，半導體晶圓係以晶圓狀態進行積層，因此不需要將半導體晶片逐個進行位置對準，可大幅度減少積層時位置對準之次數。這關係到半導體晶片之積層時間之縮短。另外，半導體晶圓之劈開之次數亦減少，因此劈開時產生之微粒亦減少。進而，由於將複數個半導體晶片(即積層體11)以積層狀態安裝於安裝基板120上，所以異物侵入至半導體晶片與其他半導體晶片之間之可能性變低。這關係到半導體裝置1之良率提高。
進而，將半導體晶圓以晶圓狀態位置對準，而不將半導體晶片逐個位置對準。因此，於半導體封裝內，積層之半導體晶片間之位置穩定，該等半導體晶片之位置之偏差減少。若積層體11之半導體晶片間之位置之偏差減少，則可減少考慮了該偏差之容限。因此，可實質上減少積層體11內之複數個半導體晶片10之偏移寬度，結果，可減小半導體裝置1之封裝尺寸。
根據本實施形態，如圖7所示，於半導體晶圓100_1~100_n所包含之複數個半導體晶片10之各自之表面，感光性接著劑110被覆自邊S2至接合墊BP近前之第1邊界B1為止，且不被覆自該第1邊界B1至第1邊S1為止。並且，如圖8所示，積層之半導體晶圓100_2~100_n分別相對於該等之正下方之半導體晶圓100_1~100_n-1以自第1邊界B1偏移至第1邊S1為止之方式積層。即，於接合墊BP之區域並未設置感光性接著劑110，半導體晶片10之感光性接著劑110幾乎不與位於接合墊BP之上方之其他半導體晶片10之背面接觸。由此，可容易地將積層之半導體晶圓100_1~100_n劈開，並且，相互相鄰之積層體11於劈開後不會附著，而容易被單片化。
(半導體裝置)
其次，參照圖10及圖11，對本實施形態之半導體裝置1之構成進行說明。圖10係表示第1實施形態之半導體裝置1之構成例之剖視圖。圖11係表示積層體11之構成例之剖視圖。
本實施形態之半導體裝置1具備安裝基板120、第1~第3半導體晶片10_1~10_3、感光性接著劑110、接合導線125、及樹脂129。
安裝基板120於其表面及背面設置有配線層128。於安裝基板120之表面上設置有積層之第1~第3半導體晶片10_1~10_3(積層體11)。於安裝基板120之背面設置有凸塊127。安裝基板120例如以玻璃環氧樹脂等絕緣體作為基體，且於該基體之表面及背面具備配線層128。對於配線層128，例如使用銅等導電性金屬。
第1~第3半導體晶片10_1~10_3設置於安裝基板120上，且具有沿表面之第1邊S1配置之接合墊BP。第1~第3半導體晶片10_1~10_3之各構成如參照圖1及圖7所說明之那樣。因此，於第1~第3半導體晶片10_1~10_3之各自之第1邊S1之附近，沿第1邊S1排列有接合墊BP。感光性接著劑110被覆自邊S2至接合墊BP近前之第1邊界B1為止，並且，不被覆自第1邊界B1至第1邊S1為止之接合墊BP之區域。
第2半導體晶片10_2向第1方向D1偏移地積層，該第1方向係自第1半導體晶片10_1之第1邊S1朝向第1邊界B1之方向。第2半導體晶片100_2相對於第1半導體晶片10_1之偏移寬度與自第1半導體晶片10_1之第1邊界B1至第1邊S1為止之接合墊BP之區域Rbp之寬度大致相等。第2半導體晶片10_2與第3半導體晶片10_3之間之感光性接著劑110(第2接著劑)於第2半導體晶片10_2中，被覆自邊S2至接合墊BP近前之第1邊界B1為止，並 且，不被覆自第1邊界B1至第1邊S1為止之接合墊BP之區域Rbp。
第3半導體晶片100_3亦相對於第2半導體晶片10_2向第1方向D1偏移地積層。第3半導體晶片10_3相對於第2半導體晶片10_2之偏移寬度亦與自第2半導體晶片10_2之第1邊界B1至第1邊S1為止之接合墊BP之區域Rbp之寬度大致相等。第3半導體晶片10_3上之感光性接著劑110於第3半導體晶片10_3，亦被覆自邊S2至接合墊BP近前之第1邊界B1為止，並且，不被覆自第1邊界B1至第1邊S1為止之接合墊BP之區域Rbp。
接合導線125連接於接合墊BP與安裝基板120上之配線層128之間。接合墊BP經由接合導線125而與配線層128或凸塊127電連接。對於接合導線125，例如使用金等導電性金屬。
樹脂129被覆並保護第1~第3半導體晶片10_1~10_3及接合導線125。
此外，於圖10及圖11中，示出了第1~第3半導體晶片10_1~10_3。但是，積層之半導體晶片之數量並不限定為3個。因此，亦可積層有半導體晶片10_1~10_n(n為2以上之整數)。
根據本實施形態，感光性接著劑110於半導體晶圓100_1~100_3各自所包含之複數個半導體晶片10_1~10_3之表面，被覆自邊S2至接合墊BP近前之第1邊界B1為止，且不被覆自該第1邊界B1至第1邊S1為止。即，感光性接著劑110不被覆接合墊BP之區域Rbp，而被覆除此之外之半導體晶片10_1~10_3之表面。由此，可於將經雷射光切割之半導體晶圓100_1~100_3以晶圓狀態錯開接合墊BP之區域Rbp地積層，然後，將半導體晶圓100_1~100_3劈開。感光性接著劑110與位於接合墊BP上方之其他半導體晶片10之背面幾乎不接觸。由此，可容易地將半導體晶圓 100_1~100_n劈開，而可容易地將相互相鄰之積層體11單片化。
(第2實施形態)
圖12係表示第2實施形態之半導體裝置2之構成例之剖視圖。於第2實施形態中，第1~第k半導體晶片(3≦k≦n-1)向第1方向D1偏移地積層。第k+1半導體晶片~第n半導體晶片向與第1方向D1相反之第2方向D2偏移地積層。此外，此處將n設為2以上之整數。於n為2時，第2半導體晶片相對於第1半導體晶片向第1方向D1偏移地積層。於n為3時，第2半導體晶片相對於第1半導體晶片向第1方向D1偏移地積層，且第3半導體晶片相對於第2半導體晶片向第2方向D2偏移地積層。
例如，於圖12中，第1~第4半導體晶片10_1~10_4向第1方向D1偏移地積層。第1~第4半導體晶片10_1~10_4之各自之偏移寬度可與第1實施形態之第2半導體晶片10_2相對於第1半導體晶片10_1之偏移寬度大致相等。即，第1~第4半導體晶片10_1~10_4之各自之偏移寬度與接合墊BP之區域Rbp之D1方向之寬度大致相等。第1~第4半導體晶片10_1~10_4是具有大致相同構成之半導體晶片。另一方面，第5~第8半導體晶片10_5~10_8向第2方向D2偏移地積層。第5~第8半導體晶片10_5~10_8之各自之偏移寬度亦可與第1實施形態之第2半導體晶片10_2相對於第1半導體晶片10_1之偏移寬度大致相等。第5~第8半導體晶片10_5~10_8係具有大致相同構成之半導體晶片。如此，複數個半導體晶片於第1方向D1上偏移地積層後，亦可於中途向相反方向D2偏移地積層。
圖13係表示第2實施形態之積層體11之構成例之剖視圖。第1~第4半導體晶片10_1~10_4之接合墊BP設置於第1邊S1之附近，且沿第1邊S1配置。另一方面，第5~第8半導體晶片10_5~10_8向與第1~第4半導體晶 片10_1~10_4相反之方向偏移，因此，第5~第8半導體晶片10_5~10_8之接合墊BP設置於第2邊S2之附近，且沿第2邊S2配置。由此，可將接合導線125與第1~第8半導體晶片10_1~10_8之所有接合墊BP連接。
感光性接著劑110分別設置於第1~第8半導體晶片10_1~10_8間，且未設置於第1~第8半導體晶片各自之接合墊BP上。即，和第1半導體晶片10_1與第2半導體晶片10_2之間之感光性接著劑110(第1接著劑)同樣地，於第2~第8半導體晶片10_2~10_8間亦設置有感光性接著劑110(第2接著劑)。第2~第8半導體晶片10_2~10_8之感光性接著劑110各自與第1半導體晶片10_1之感光性接著劑110同樣地，不被覆接合墊BP之區域Rbp，而被覆除其以外之半導體晶片10_2~10_8之表面。
第2實施形態之其他構成可與第1實施形態之對應之構成相同。如此，即便第1~第8半導體晶片10_1~10_8以於中途向相反方向偏移之方式積層，亦可獲得與第1實施形態同樣之效果。
對第2實施形態之半導體裝置2之製造方法進行說明。首先，將各自包含第1~第4半導體晶片10_1~10_4之4片半導體晶圓(未圖示)於第1方向D1上錯開地積層。其次，如上述般，將積層之半導體晶圓劈開，而將第1~第4半導體晶片10_1~10_4單片化為1個積層體。
另一方面，將各自包含第5~第8半導體晶片10_5~10_8之4片半導體晶圓(未圖示)於第2方向D2上錯開地積層。其次，如上述般，將積層之半導體晶圓劈開，而將第5~第8半導體晶片10_5~10_8單片化為1個積層體。
其次，將第1~第4半導體晶片10_1~10_4之積層體搭載於安裝基板120上。然後，將第5~第8半導體晶片10_5~10_8之積層體搭載於第1~ 第4半導體晶片10_1~10_4之積層體上。
如此，於第2實施形態中，第1~第4半導體晶片10_1~10_4被單片化為1個積層體，第5~第8半導體晶片10_5~10_8被單片化為與第1~第4半導體晶片10_1~10_4不同之積層體。且，只要將第1~第4半導體晶片10_1~10_4之積層體搭載安裝基板120上，然後將第5~第8半導體晶片10_5~10_8之積層體搭載於第1~第4半導體晶片10_1~10_4之積層體上即可。由此，可於安裝基板120上形成第1~第8半導體晶片10_1~10_8之積層體。
第2實施形態之其他製造步驟可與第1實施形態之對應之製造步驟相同。由此，第2實施形態之製造方法可獲得與第1實施形態之製造方法同樣之效果。
此外，於圖12及圖13中，顯示積層有第1~第8半導體晶片10_1~10_8之狀態。然而，積層之半導體晶片之數量並不限定於8個。因此，亦可積層有半導體晶片10_1~10_n(n為2以上之整數)。
另外，偏移方向之變更可於半導體晶片10_1~10_n中任意之半導體晶片10_k(2≦k≦n-1)進行變更。即，亦可將半導體晶片10_1~10_k於第1方向D1上錯開地積層，將半導體晶片10_k+1+1~10_n於第2方向D2上錯開地積層。
對本發明之若干個實施形態進行了說明，但該等實施形態係作為示例而提出，並不意欲對發明之範圍進行限定。該等實施形態可藉由其他各種方式進行實施，於不脫離發明之主旨之範圍內，可進行各種省略、置換、變更。該等實施形態及其變化包含於發明之範圍或主旨內，同時包含於申請專利範圍所記載之發明及其等同之範圍內。
10‧‧‧半導體晶片
11‧‧‧積層體
100_1~100_3‧‧‧第1~第3半導體晶圓
110‧‧‧感光性接著劑
131‧‧‧黏著性片
B1‧‧‧第1邊界
BP‧‧‧接合墊
D1‧‧‧第1方向
L‧‧‧虛線
Rbp‧‧‧區域
S1‧‧‧邊
S2‧‧‧邊

Claims (7)

  1. 一種半導體裝置之製造方法，其具備：對具有大致相同構成且包含複數個半導體晶片之第1及第2半導體晶圓之切割區域照射雷射光，於上述第1及第2半導體晶圓各自之半導體結晶形成具有應變之改質層；將第2半導體晶圓以向第1方向偏移之方式積層於上述第1半導體晶圓上，上述第1方向係自上述第1半導體晶圓之上述複數個半導體晶片各自之第1邊朝向該第1邊之對邊之方向；將上述第1及第2半導體晶圓劈開。
  2. 如請求項1之半導體裝置之製造方法，其進而具備：以如下方式形成第1接著劑，即，於上述第1半導體晶圓所包含之複數個半導體晶片各自之表面，被覆自上述複數個半導體晶片之第1邊之對邊至設置於該複數個半導體晶片之接合墊近前之第1邊界為止，且不被覆自該第1邊界至上述第1邊為止；將第2半導體晶圓以自上述第1半導體晶圓之上述複數個半導體晶片各自之第1邊偏移至上述第1邊界為止的方式，積層於上述第1半導體晶圓上。
  3. 如請求項1或2之半導體裝置之製造方法，其進而具備：將具有與第1及第2半導體晶圓大致相同構成之第3~第n半導體晶圓(n為3以上)積層於上述第2半導體晶圓上； 將積層之上述第1~第n半導體晶圓劈開；上述第2~第n半導體晶圓分別相對於正下方之半導體晶圓向上述第1方向偏移地積層。
  4. 如請求項2之半導體裝置之製造方法，其中上述第1接著劑係感光性接著劑，於上述第1接著劑之形成中，於將上述第1接著劑設置於上述第1半導體晶圓上後，使用微影技術以如下方式加工第1接著劑，即，被覆自上述複數個半導體晶片之第1邊之對邊至設置於該複數個半導體晶片之接合墊的近前之第1邊界為止，且不被覆自該第1邊界至上述第1邊為止。
  5. 如請求項1或2之半導體裝置之製造方法，其中於將上述第2半導體晶圓積層於上述第1半導體晶圓上時，以第1壓力按壓該第1及第2半導體晶圓，之後，以高於上述第1壓力之第2壓力進行按壓。
  6. 如請求項1或2之半導體裝置之製造方法，其中上述第1及第2半導體晶圓各自之上述複數個半導體晶片具有大致相同構成。
  7. 如請求項1或2之半導體裝置之製造方法，其進而具備：於上述第1及第2半導體晶圓劈開後，將積層之上述複數個半導體晶片安裝於安裝基板上；以導線將設置於上述複數個半導體晶片上之接合墊與上述安裝基板接合；以樹脂被覆上述複數個半導體晶片及上述導線。
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