TWI625830B - 具有一被動微電子裝置設置於一封裝體中的微電子封裝技術 - Google Patents

具有一被動微電子裝置設置於一封裝體中的微電子封裝技術 Download PDF

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TWI625830B
TWI625830B TW104101978A TW104101978A TWI625830B TW I625830 B TWI625830 B TW I625830B TW 104101978 A TW104101978 A TW 104101978A TW 104101978 A TW104101978 A TW 104101978A TW I625830 B TWI625830 B TW I625830B
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package
microelectronic
microelectronic device
active
forming
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TW104101978A
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TW201546974A (zh
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特羅斯登 梅耶爾
吉拉德 歐弗納
安德森 沃特
格奧爾格 賽德曼
史文 亞伯斯
克里斯坦 吉瑟勒
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英特爾公司
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Abstract

一微電子封裝係包括一被動微電子裝置設置於一封裝體中，其中封裝體係為對於微電子封裝技術提供支撐及/或剛性之微電子封裝技術的部分。在一倒裝晶片型微電子封裝中，封裝體可包含供一主動微電子裝置電性附接至其之一微電子基材。在一嵌入裝置型微電子封裝技術中，封裝體可包含供主動微電子裝置嵌入其中之材料。

Description

具有一被動微電子裝置設置於一封裝體中的微電子封裝技術
本描述的實施例係概括有關於微電子封裝製造之領域，且更特別有關於一包括一表面安裝裝置及/或一積體被動裝置設置於一封裝體內之微電子封裝技術。
微電子產業係不斷致力於生產愈來愈快及愈小的微電子封裝技術以供使用於不同電子產品中，包括但不限於電腦伺服器產品及可攜式產品，諸如可攜式電腦、電子平板、行動電話、數位攝影機及類似物。為了達成這些目標，微電子封裝技術的製造係變得更具挑戰性。一種此挑戰性領域係有關於降低微電子封裝技術的高度/厚度。雖然諸如微電子晶粒等主動微電子裝置的厚度已經減小，諸如使用於微電子封裝技術中的積體被動裝置及表面安裝裝置等被動微電子裝置係難以降低尺寸。此困難係來自於下列事實：一般來說，這些被動微電子裝置係需要特定量(例如容積)的組件材料，藉以達成例如電容值、電感值等一所欲的功能性。因此，製造一較薄的被動微電子裝置係將需要降低組件材料的容積，其將阻礙性能，抑或使用非傳統 的組件材料，其可能降低所將需要的組件材料之容積，但可能過份地增高被動微電子裝置的成本。
依據本發明之一實施例，係特地提出一種具有一被動微電子裝置設置於一封裝體中的微電子封裝技術。
100‧‧‧微電子封裝技術
110‧‧‧封裝體
112‧‧‧封裝體第一表面
114‧‧‧封裝體第二表面
116‧‧‧封裝體第一表面結合墊
118‧‧‧封裝體第二表面結合墊
1221,202‧‧‧第一介電層
1222,204‧‧‧第二介電層
124‧‧‧傳導跡線
126‧‧‧傳導孔道
130,206,342‧‧‧傳導佈線
132‧‧‧封裝體腔穴
134‧‧‧腔穴側壁
136‧‧‧腔穴底表面
140‧‧‧主動微電子裝置
142‧‧‧主動微電子裝置結合墊
144‧‧‧主動微電子裝置主動表面
146‧‧‧背表面
150‧‧‧互連件
160‧‧‧載體
162‧‧‧封裝體突件
164‧‧‧被動微電子裝置突件
166‧‧‧黏劑材料
170‧‧‧被動微電子裝置
172,174‧‧‧被動微電子裝置電終端
176‧‧‧功能性被動組件
180‧‧‧外部互連件
182‧‧‧傳導材料連接
188‧‧‧包封材料
200,340‧‧‧重新分配層
200‧‧‧用以製造一微電子結構的程序
202,204,206,208,210,212,214‧‧‧方塊
300‧‧‧運算裝置
302‧‧‧板
304‧‧‧處理器
306,306A,306B‧‧‧通訊晶片
310‧‧‧支撐板
312‧‧‧第一表面
314‧‧‧第二表面
316‧‧‧介電材料層
322‧‧‧附接黏劑
330‧‧‧介電包封劑
332‧‧‧介電包封劑第一表面
334‧‧‧介電包封劑第二表面
336‧‧‧開口
344‧‧‧介電層
346‧‧‧凹部
H1‧‧‧載體封裝體突件高度
H2‧‧‧載體被動微電子裝置突件高度
本揭示的標的物係在說明書的結論部分被特別指出且作明確主張。將連同附圖從下列描述及申請專利範圍更完整地得知本揭示的上述及其他特徵。請瞭解附圖僅描繪根據本揭示的數項實施例，且因此不被視為限制其範圍。將利用附圖以額外特定內容及細節來描述揭示，俾可更易於確定本揭示的優點，其中：圖1A至1F係顯示根據本描述的一實施例之製造倒裝晶片型的微電子封裝技術之程序的剖視圖；圖2A至2F係顯示根據本描述的另一實施例之製造嵌入技術型的微電子封裝技術之程序的剖視圖；圖3A至3F係顯示根據本描述的又另一實施例之製造嵌入技術型的微電子封裝技術之程序的剖視圖；圖4是顯示根據本描述的一實施例之製造一微電子結構的程序之流程圖；圖5係顯示根據本描述的一實行方式之一運算裝置。
實施例的描述
在下列詳細描述中，係參照示範性顯示可在其中實行所主張標的物之特定實施例的附圖。以充分細節描述這些實施例以使熟悉該技藝者能夠實行標的物。請瞭解不同實施例雖然相異卻未必互斥。例如，本文就一實施例所描述之一特定的特色、結構或特徵係可在其他實施例中實行而不脫離所主張標的物之精神及範圍。此說明書中提及“一實施例”或“一實施例中”係指就該實施例所描述之一特定的特色、結構或特徵被包括在本描述所涵蓋的至少一實行方式中。因此，使用“一實施例”或“一實施例中”未必係指同一實施例。此外，請瞭解個別元件在各所揭露實施例內的區位或配置可作修改而不脫離所主張標的物之精神及範圍。下列詳細描述因此不以限制性意義視之，且標的物的範圍僅由適當詮釋之附帶的申請專利範圍連同附帶的申請專利範圍享有的均等物之完整範圍所界定。在圖中，類似的號碼係指數個圖中相同或相似的元件及功能性，且其中所描繪的元件未必符合彼此比例，而是可放大或縮小個別元件以更易在本描述的脈絡下理解元件。
本文的“上方”、“至”、“之間”及“上”用語係可指一層相對於其他層的一相對位置。一層位於另一層“上方”或“上”或是結合“至”另一層係可能為直接地接觸於另一層或可能具有一或多個中介層。一層位於層“之間”係可能為直接地接觸於層或可具有一或多個中介層。
本描述的實施例係包括一具有一被動微電子裝置設置於一封裝體中之微電子封裝技術，其中封裝體係為 對於微電子封裝技術提供支撐及/或剛性之微電子封裝技術的一部分。在一倒裝晶片型微電子封裝技術中，封裝體係可包含一供一主動微電子裝置電性附接至其之微電子基材。在一嵌入裝置型微電子封裝技術中，封裝體係可包含供主動微電子裝置嵌入其中之材料。
圖1A至1F係顯示其中一被動裝置設置於一倒裝晶片型微電子封裝技術的一封裝體內之本描述的實施例。如圖1A所示，一封裝體110係可被形成。封裝體110可為一微電子基材，諸如一主機板、一中介層、或類似物，其具有一第一表面112及一相對的第二表面114。封裝體110係可具有複數個結合墊116形成於封裝體第一表面112中或上，及複數個結合墊118形成於封裝體第二表面114中或上。封裝體110係可包含複數個介電層(顯示成一第一介電層1221及一第二介電層1222)，其具有複數個傳導佈線130由介電層的至少一者上所形成(顯示成被形成於第二介電層1222上)之傳導跡線124形成，其中連接係形成於諸如傳導跡線124、封裝體第一表面結合墊116、及封裝體第二表面結合墊118等結構之間，其中傳導孔道126經過不同介電層(顯示成第一介電層1221及第二介電層1222)形成。請瞭解傳導佈線130可包括封裝體第一表面結合墊116及封裝體第二表面結合墊118。
封裝體介電層(顯示成一第一介電層1221及一第二介電層1222)係可包含任何適當的介電材料，包括但不限於液晶聚合物，環氧樹脂，雙馬來醯亞胺三嗪樹脂，聚苯 唑，聚醯亞胺材料，矽土充填式環氧樹脂(諸如可從味之素精密科技公司(Ajinomoto Fine-Techno Co.,Inc.,)1-2 Susuki-cho,Kawasaki-ku,Kawasaki-shi,210-0801,Japan取得之材料(例如Ajinomoto ABF-GX13，及Ajinomoto GX92))，及類似物。傳導佈線130係由任何適當的傳導材料形成，包括但不限於銅、銀、金、鎳、鉭、鎢、及其合金。用來形成封裝體110之程序係為熟悉該技藝者所熟知，且本文為求簡明不予描述或圖示。請瞭解：封裝體110係可由任何數目的介電層形成，可含有一剛性核心(未圖示)，且可含有形成其中的主動及/或被動微電子裝置(未圖示)。進一步請瞭解：傳導佈線130係可形成位於封裝體110內及/或擁有額外外部組件(未圖示)之任何所欲的電性佈線。亦請瞭解：銲阻層(未圖示)可被利用於封裝體第一表面122及/或封裝體第二表面124上，如同熟悉該技藝者將瞭解。
如圖1B所示，腔穴132係可形成於封裝體110中。如圖所示，封裝體腔穴132係可經過封裝體110形成，從封裝體第一表面112延伸至封裝體第二表面114且在其間形成腔穴側壁134。封裝體腔穴132可由該技藝已知的任何技術形成，包括但不限於衝壓、銑製、鑽製、壓夾、蝕刻、及類似物。
如圖1C所示，一主動微電子裝置140係可在一概括稱為倒裝晶片或控制崩潰晶片連接(C4)組態之組態中以複數個互連件150、諸如可迴流銲料凸塊或球而被附接至對應的封裝體第一表面結合墊116。互連件150可延伸於封裝 體第一表面結合墊116與主動微電子裝置140的一主動表面144上之鏡像結合墊142之間，以在其間形成一電性連接。請瞭解：主動微電子裝置結合墊142可電性通聯於主動微電子裝置140內的積體電路(未圖示)。主動微電子裝置140可為任何適當的微電子裝置，包括但不限於一微處理器，一晶片組，一圖形裝置，一無線裝置，一記憶體裝置，一適當的特定積體電路裝置，及類似物。亦請瞭解：一底部充填材料(未圖示)係可設置於主動微電子裝置與封裝體110之間，且銲阻層(未圖示)可被利用於封裝體第一表面112及/或封裝體第二表面114上，如熟悉該技藝者所瞭解。
如圖1D所示，封裝體110可被放置於一具有至少一封裝體突件162及至少一被動微電子裝置突件164之載體160上，其中一被動微電子裝置170可被放置於封裝體腔穴132中(請見圖1C)以接觸載體被動微電子裝置突件164。載體封裝體突件162及載體被動微電子裝置突件164係可分別具有不同高度H1及H2，以將被動微電子裝置170放置於封裝體腔穴132內的一適當位置中(請見圖1C)。如圖1D進一步所示，一黏劑材料166係可被施加於腔穴側壁134與被動微電子裝置170之間，以將被動微電子裝置170固接就位。為了此詳細描述之用，被動微電子裝置170係被界定成為一表面安裝裝置或一積體被動裝置，其包含一功能性被動組件176的相對側上之至少二個電終端172、174，如熟悉該技藝者將瞭解。被動微電子裝置170可包含任何適當的裝置，包括但不限於電阻器、電容器、電感器、阻抗匹配電路、諧 波濾器、耦合器、平衡不平衡器及類似物。
如圖1E所示，載體160(請見圖1D)可被移除，且顯示成可迴流銲球之外部互連件180係可形成於適當封裝體第二表面結合墊118上，且一傳導材料連接182係可被製作於各被動微電子裝置電終端172、174與其對應的封裝體第二表面結合墊118之間。外部互連180及傳導材料連接182係可諸如藉由一銲膏列印技術接著使銲膏迴流而被同時地形成。然而，傳導材料連接182可在一分離步驟中、諸如藉由一銲膏配送技術、一噴墨技術或類似技術、接著藉由使銲膏迴流而被製成。如圖1E進一步顯示，一包封材料188係可藉由一模製技術而被形成於封裝體第一表面112及主動微電子裝置140上方以形成一微電子封裝技術100。
在另一實施例中，如圖1F所示，封裝體腔穴132係可從封裝體第一表面112部份地延伸至封裝體110中，其係形成一腔穴底表面136且曝露複數個傳導跡線124。被動微電子裝置170係可以可在各被動微電子裝置電終端172、174及其對應的傳導跡線124之間所製作的一傳導材料連接182而被放置於封裝體腔穴132中。用於圖1F所示的微電子封裝技術100之處理步驟係將從上文描述參照圖1A至1E及已知技術而得知。
圖2A至2F係顯示本描述的實施例，其中主動微電子裝置140及被動微電子裝置170設置於封裝體110內。如圖2A所示，主動微電子裝置140可嵌入封裝體110中，俾使主動微電子裝置主動表面144對於封裝體第二表面114呈實 質地平面性。圖2A所示的結構可以多種不同技術達成，包括但不限於層疊及模製，其可能是稱為嵌入晶粒封裝處理及扇出晶圓層級封裝處理之程序的部份。封裝體110可由任何適當的包封劑材料形成，包括但不限於聚合物材料。
如圖2B所示，一重新分配層200係可形成於主動微電子裝置主動表面144及封裝體第二表面114上。重新分配層200係可包含複數個介電層(顯示成一第一介電層202及一第二介電層204)以及複數個傳導佈線206。第一介電層202可形成於主動微電子裝置主動表面144及封裝體第二表面114上。複數個傳導佈線206係可形成於第一介電層202上，其中複數個傳導佈線206的至少一部分延伸經過第一介電層202以接觸對應的主動微電子裝置結合墊142。第二介電層204、諸如一銲阻層係可形成於第一介電層202及複數個傳導佈線206上。顯示成可迴流銲球之外部互連件180係可形成於經過第二介電層204之開口內，以接觸對應的傳導佈線206。請瞭解：當封裝體110具有充分介電性時，第一介電層202係為選用性，其中如圖2C所示，封裝體腔穴132係可形成從封裝體第一表面112延伸至封裝體第二表面114經過封裝體110並可部份地進入重新分配層200中且曝露適當的傳導佈線206。封裝體腔穴132可由該技藝中已知的任何技術形成，包括但不限於衝壓、銑製、鑽製、壓夾、蝕刻及類似物、或其組合。
如圖2D所示，被動微電子裝置170可被放置於封 裝體腔穴132中(請見圖2C)，其中傳導材料連接182位於各被動微電子裝置電終端172、174及其對應的傳導佈線206之間。
在另一實施例中，如圖2E所示，封裝體腔穴132亦可延伸經過重新分配層200，且被動微電子裝置170可被放置成延伸經過封裝體腔穴132及重新分配層200，其中傳導材料連接182位於各被動微電子裝置電終端172、174及其對應的傳導佈線206之間。黏劑材料166可被施加於腔穴側壁134及被動微電子裝置170之間以將被動微電子裝置170固接就位。
在又另一實施例中，如圖2F所示，封裝體腔穴132係可形成經過重新分配層200且從封裝體第二表面114部份地延伸至封裝體110中。黏劑材料166可被施加於腔穴側壁134及被動微電子裝置170之間以將被動微電子裝置170固接就位，且傳導材料連接182係可形成於各被動微電子裝置電終端172、174及其對應的傳導佈線206之間。
圖3A至3F顯示本描述的實施例，其中主動微電子裝置140係設置於封裝體110內，其包含一介電包封劑330及一支撐板310。如圖3A所示，支撐板310係可形成有一第一表面312及一相對的第二表面314，其中支撐板310可選用性包括一形成於支撐板第二表面314上之介電材料層316。主動微電子裝置140的一背表面146係可以一附接黏劑322被附接至支撐板310(顯示成附接黏劑322係接觸支撐板介電材料層316)。如同圖3A進一步所示，介電包封劑330係可 形成為相鄰於支撐板310並嵌入包括主動微電子裝置主動表面144之主動微電子裝置140，其中一介電包封劑第一表面332係可被界定為相鄰於支撐板310，且一介電包封劑第二表面334係可被界定為與包封劑第一表面332呈相對。又如圖3A進一步所示，開口336係可形成為從介電包封劑第二表面334延伸至對應的主動微電子裝置結合墊142。開口336可由該技藝已知的任何技術形成，包括但不限於雷射鑽製、光微影術及離子轟擊。
支撐板310可包含任何適當的剛性材料，包括但不限於金屬、聚合物、陶瓷、及類似物、暨其組合以及與不同材料級別的組合。介電包封劑330可由任何適當的介電材料製成，包括但不限於聚合物材料，並可由任何已知技術形成，包括但不限於旋塗、層疊、列印、模製及類似物。
如圖3B所示，一重新分配層340係可形成於介電包封劑第二表面334上。重新分配層340可包含複數個傳導佈線342形成於介電包封劑第二表面334上，其中複數個傳導佈線342的至少一部分延伸至介電包封劑開口336中(請見圖3A)。重新分配層340可進一步包含一介電層344，諸如一銲阻層，其可形成於介電包封劑第二表面334及複數個傳導佈線342上。
如圖3C所示，封裝體腔穴132係可形成經過重新分配層340，經過介電包封劑330，且部份地延伸至支撐板310中。如圖3D所示，黏劑材料166可被施加以將被動微電子裝置170固接就位。顯示成可迴流球之外部互連件180係 可形成於經過介電層344的開口內以接觸對應的傳導佈線342，且傳導材料連接182可被製作於各被動微電子裝置電終端172、174及其對應的傳導佈線342之間。外部互連件180及傳導材料連接182係可諸如藉由一銲膏列印技術、接著藉由使銲膏迴流而同時地形成。然而，傳導材料連接182可在一分離步驟中製成，諸如藉由一銲膏列印或配送技術、一噴墨技術、或類似技術，接著藉由使銲膏迴流。
請瞭解：如圖3E所示，一凹部346係可被預形成於支撐板310中，俾使介電包封劑330在沉積時延伸其中。因此，僅一材料(亦即介電包封劑330)需在封裝體腔穴132的形成中被移除，如圖3F所示。
請進一步瞭解：封裝體腔穴132可完整延伸經過支撐板310及介電包封劑330，諸如就本詳細描述的其他實施例所示範。
請瞭解：本描述的實施例可具有比起將被動微電子裝置170完全嵌入封裝體110中而言更好之優點，原因在於被動微電子裝置170可能延伸超過封裝體第一表面112及/或封裝體第二表面114，因此容許形成相對於一具有一完全嵌入被動微電子裝置之封裝體的厚度而言較薄之一封裝體。
圖4是根據本描述的一實施例之一用以製造一微電子結構的程序200之流程圖。如方塊202所示，係可形成一主動微電子裝置基材。如方塊204所示，係可形成一封裝體。如方塊206所示，封裝體係可接觸於主動微電子裝置。 如方塊208所示，傳導佈線可形成於封裝體中或上。如方塊210所示，一腔穴可形成於封裝體中。如方塊212所示，一被動微電子裝置可設置於腔穴內。如方塊214所示，主動微電子裝置及被動微電子裝置係可電性連接於傳導佈線。
圖5顯示根據本描述的一實行方式之一運算裝置300。運算裝置300係容置一板302。板302可包括一數目的組件，包括但不限於一處理器304及至少一通訊晶片306A、306B。處理器304係物理性及電性耦合至板302。在部分實行方式中，至少一通訊晶片306A、306B亦被物理性及電性耦合至板302。在進一步的實行方式中，通訊晶片306A、306B係為處理器304之部份。
依據其應用而定，運算裝置300係可包括可能被或未被物理性及電性耦合至板302之其他組件。這些其他組件係包括但不限於依電性記憶體(例如DRAM)，非依電性記憶體(例如ROM)，快閃記憶體，一圖形處理器，一數位信號處理器，一密碼處理器，一晶片組，一天線，一顯示器，一觸控螢幕顯示器，一觸控螢幕控制器，一電池，一音訊編解碼器，一視訊編解碼器，一功率放大器，一全球定位系統(GPS)裝置，一羅盤，一加速度計，一陀螺儀，一揚聲器，一攝影機，及一大量儲存裝置(諸如硬碟機，光碟片(CD)，數位多功能碟片(DVD)等等)。
通訊晶片306A、306B係能夠作無線通訊，用以將資料轉移至及轉移自運算裝置300。“無線”用語及其衍生物係可用來描述電路、裝置、系統、方法、技術、通訊通 路等，其可透過使用經過一非固體媒體之調變電磁輻射來通訊資料。該用語並非意指相關裝置不含有任何引線，但在部分實施例中其可能不含。通訊晶片306係可實行一數目的無線標準或協定之任一者，包括但不限於Wi-Fi(IEEE 802.11家族)，WiMAX(IEEE 802.16家族)，IEEE 802.20，長程演化(LTE)，Ev-DO，HSPA+，HSDPA+，HSUPA+，EDGE，GSM，GPRS，CDMA，TDMA，DECT，藍牙，其衍生物，暨表示成3G、4G、5G及以上之任何其他無線協定。運算裝置300可包括複數個通訊晶片306A、306B。例如，一第一通訊晶片306A係可專用於較短範圍無線通訊諸如Wi-Fi及藍牙，且一第二通訊晶片306B係可專用於較長範圍無線通訊諸如GPS，EDGE，GPRS，CDMA，WiMAX，LTE，Ev-DO及其他。
運算裝置300的處理器304係可包括一微電子封裝技術，其具有被封裝其中之複數個主動及被動的微電子裝置。在本描述的部分實行方式中，處理器304的一被動微電子裝置係可設置於一封裝體內，如上文所述。“處理器”用語係可指用以處理來自暫存器及/或記憶體的電子資料以將該電子資料轉變成其他可被儲存於暫存器及/或記憶體中的電子資料之一裝置的任何裝置或部分。
通訊晶片306A、306B係可包括一微電子封裝技術，其具有被封裝其中之複數個主動及被動的微電子裝置。根據本描述的另一實行方式，通訊晶片306A、306B的一被動微電子裝置係可設置於一封裝體內，如上文所述。
在不同實行方式中，運算裝置300係可為一膝上型電腦，一上網型筆電(netbook)，一筆記型電腦，一超薄型筆電(ultrabook)，一智慧型電話，一平板電腦，一個人數位助理(PDA)，一超行動電腦(ultra mobile PC)，一行動電話，一桌上型電腦，一伺服器，一印表機，一掃瞄器，一監視器，一機上盒，一娛樂控制單元，一數位攝影機，一可攜式音樂播放器，或一數位視訊記錄器。在其他實行方式中，運算裝置300可能為用以處理資料的任何其他電子裝置。
請瞭解：本描述的標的物未必限於圖1A至5所示的特定應用。標的物係可適用於其他微電子裝置及總成應用，暨任何適當的電子應用，如同熟悉該技藝者所瞭解。
下列範例係有關於進一步的實施例。範例中的特定細節係可使用於一或多個實施例中的其他地方。
在範例1中，一微電子封裝技術係可包含一接觸於一封裝體之主動微電子裝置；及一設置於封裝體中所形成的一腔穴內之被動微電子裝置；其中主動微電子裝置及被動微電子裝置係藉由封裝體中或上所形成之傳導佈線作電性連接。
在範例2中，範例1的標的物係可選用性包括：腔穴係從封裝體的一第一表面至封裝體的一第二表面延伸經過封裝體。
在範例3中，範例1或2的標的物係可選用性包括：主動微電子裝置係包含一倒裝晶片微電子裝置，且封裝體 係包含一微電子基材，其中倒裝晶片微電子裝置係經過延伸其間的複數個互連件而接觸於微電子基材。
在範例4中，範例1或2的標的物係可選用性包括：主動微電子裝置係嵌入封裝體中，且其中主動微電子裝置的一主動表面係對於封裝體的一第二表面呈實質平面性。
在範例5中，範例4的標的物係可選用性包括：傳導佈線係形成於主動微電子裝置主動表面及封裝體第二表面上所形成的一重新分配層中。
在範例6中，範例1的標的物係可選用性包括：封裝體係包含一支撐板及一介電包封劑，其中主動微電子裝置的一背表面係黏著至支撐板且其中主動微電子裝置嵌入介電包封劑中，其中介面包封劑的一部分延伸於主動微電子裝置主動表面上方。
在範例7中，範例6的標的物係可選用性包括：傳導佈線係形成於封裝體第二表面上所形成的一重新分配層中。
在範例8中，範例7的標的物係可選用性包括：腔穴係延伸經過重新分配層、經過介電包封劑、且部份地進入支撐板中。
在範例9中，一用於製造一微電子封裝技術之方法係可包含形成一主動微電子裝置；形成一封裝體；使封裝體接觸於主動微電子裝置；將傳導佈線形成於封裝體中或上；將一腔穴形成於封裝體中；將一被動微電子裝置設置於腔穴內；及使主動微電子裝置及被動微電子裝置電性 連接於傳導佈線。
在範例10中，範例9的標的物係可選用性包括：將腔穴形成於封裝體中係包含將腔穴形成為從封裝體的一第一表面至封裝體的一第二表面延伸經過封裝體。
在範例11中，範例9或10的標的物係可選用性包括：形成微電子裝置係包含形成一倒裝晶片微電子裝置，其中形成封裝體係包含形成一微電子基材，且其中微電子裝置係經過延伸於倒裝晶片微電子裝置與微電子基材之間的複數個互連件而接觸於微電子基材。
在範例12中，範例9或10的標的物係可選用性包括：形成封裝體及使封裝體接觸於主動微電子裝置係包含將微電子封裝體嵌入封裝體中，俾使微電子裝置的一主動表面對於封裝體的一第二表面呈實質平面性。
在範例13中，範例12的標的物係可選用性包括：將傳導佈線形成於封裝體中或上係包含形成於微電子裝置主動表面及封裝體第二表面上所形成之一重新分配層中。
在範例14中，範例9的標的物係可選用性包括：形成封裝體係包含形成一支撐板及形成一介電包封劑，其中主動微電子裝置的一背表面係黏著至支撐板且其中主動微電子裝置嵌入介電包封劑中，其中介電包封劑的一部分延伸於主動微電子裝置主動表面上方。
在範例15中，範例14的標的物係可選用性包括：將傳導佈線形成於封裝體中或上係包含將傳導佈線形成於封裝體第二表面上所形成的一重新分配層中。
在範例16中，範例15的標的物係可選用性包括：將腔穴形成於封裝體中係包含將腔穴形成為延伸經過重新分配層、經過介電包封劑、且部份地進入支撐板中。
在範例17中，一運算系統係可包含一板；及一附接至板之微電子封裝技術，其中微電子封裝技術係包含一接觸於一封裝體之主動微電子裝置；及一被動微電子裝置，其設置於封裝體中所形成的一腔穴內；其中主動微電子裝置及被動微電子裝置係藉由形成於封裝體中或上之傳導佈線作電性連接。
在範例18中，範例17的標的物係可選用性包括：腔穴從封裝體的一第一表面至封裝體的一第二表面延伸經過封裝體。
在範例19中，範例17或18的標的物係可選用性包括：主動微電子裝置係包含一倒裝晶片微電子裝置，及封裝體係包含一微電子基材，其中倒裝晶片微電子裝置係經過延伸其間的複數個互連件而接觸於微電子基材。
在範例20中，範例17或18的標的物係可選用性包括：主動微電子裝置係嵌入封裝體中，且其中主動微電子裝置的一主動表面係對於封裝體的一第二表面呈實質平面性。
在範例21中，範例20的標的物係可選用性包括傳導佈線，傳導佈線係形成於主動微電子裝置主動表面及封裝體第二表面上所形成的一重新分配層中。
在範例22中，範例17的標的物係可選用性包括： 封裝體係包含一支撐板及一介電包封劑，其中主動微電子裝置的一背表面係黏著至支撐板且其中主動微電子裝置嵌入介電包封劑中，其中介面包封劑的一部分延伸於主動微電子裝置主動表面上方。
在範例23中，範例22的標的物係可選用性包括：傳導佈線係形成於封裝體第二表面上所形成的一重新分配層中。
在範例24中，範例23的標的物係可選用性包括：腔穴係延伸經過重新分配層、經過介電包封劑、且部份地進入支撐板中。
在本描述的詳細實施例中已藉此予以描述，請瞭解：由於可能作出許多明顯變異而不脫離其精神或範圍，申請專利範圍所界定的本描述並不限於上文描述所提供的特定細節。

Claims (24)

  1. 一種微電子封裝，其包含：與一封裝體接觸的一主動微電子裝置；及設置在於該封裝體中所形成之一腔穴內的一被動微電子裝置；其中，該主動微電子裝置與該被動微電子裝置藉由形成在該封裝體中或該封裝體上的傳導佈線而電性連接。
  2. 如請求項1之微電子封裝，其中，該腔穴從該封裝體的一第一表面延伸穿過該封裝體到該封裝體的一第二表面。
  3. 如請求項1之微電子封裝，其中，該主動微電子裝置包含一倒裝晶片微電子裝置且該封裝體包含一微電子基材，其中，該倒裝晶片微電子裝置透過在該倒裝晶片微電子裝置與該微電子基材之間延伸的複數個互連件而與該微電子基材接觸。
  4. 如請求項1之微電子封裝，其中，該主動微電子裝置嵌在該封裝體中，並且其中，該主動微電子裝置的一主動表面與該封裝體的一第二表面實質上齊平。
  5. 如請求項4之微電子封裝，其中，該等傳導佈線係形成於在該主動微電子裝置之該主動表面與該封裝體之該第二表面上所形成的一重新分配層中。
  6. 如請求項1之微電子封裝，其中，該封裝體包含一支撐板及一介電包封劑，其中，該主動微電子裝置的一背表面黏附於該支撐板，並且其中，該主動微電子裝置係嵌在該介電包封劑中，該介電包封劑的一部分延伸於該主動微電子裝置的一主動表面上。
  7. 如請求項6之微電子封裝，其中，該等傳導佈線係形成於在該封裝體之一第二表面上所形成的一重新分配層中。
  8. 如請求項7之微電子封裝，其中，該腔穴延伸穿過該重新分配層、穿過該介電包封劑、且部份地延伸入該支撐板中。
  9. 一種用於製造微電子封裝的方法，其包含下列步驟：形成一主動微電子裝置；形成一封裝體；使該封裝體與該主動微電子裝置接觸；於該封裝體之中或之上形成傳導佈線；於該封裝體形成中一腔穴；將一被動微電子裝置設置於該腔穴內；及藉由該等傳導佈線使該主動微電子裝置與該被動微電子裝置電性連接。
  10. 如請求項9的方法，其中，於該封裝體中形成該腔穴的步驟包含下列步驟：將該腔穴形成為從該封裝體的一第一表面延伸穿過該封裝體到該封裝體的一第二表面。
  11. 如請求項9的方法，其中，形成該微電子裝置的步驟包含下列步驟：形成一倒裝晶片微電子裝置，其中，形成該封裝體的步驟包含下列步驟：形成一微電子基材，並且其中，該微電子裝置透過在該倒裝晶片微電子裝置與該微電子基材之間延伸的複數個互連件而與該微電子基材接觸。
  12. 如請求項9的方法，其中，形成該封裝體及使該封裝體與該主動微電子裝置接觸的步驟包含下列步驟：將該微電子封裝體嵌入該封裝體中，俾使該微電子裝置的一主動表面與該封裝體的一第二表面實質上齊平。
  13. 如請求項12的方法，其中，於該封裝體之中或之上形成傳導佈線的步驟包含下列步驟：在於該微電子裝置之該主動表面及該封裝體之該第二表面上所形成的一重新分配層中形成該等傳導佈線。
  14. 如請求項9的方法，其中，形成該封裝體的步驟包含下列步驟：形成一支撐板、及形成一介電包封劑，其中，該主動微電子裝置的一背表面係黏附於該支撐板，並且其中，該主動微電子裝置嵌在該介電包封劑中，該介電包封劑的一部分延伸於該主動微電子裝置的一主動表面上。
  15. 如請求項14的方法，其中，於該封裝體之中或之上形成傳導佈線的步驟包含下列步驟：在於該封裝體之一第二表面上所形成的一重新分配層中形成該等傳導佈線。
  16. 如請求項15的方法，其中，於該封裝體中形成該腔穴的步驟包含下列步驟：將該腔穴形成為延伸穿過該重新分配層、穿過該介電包封劑、且部份地延伸入該支撐板中。
  17. 一種運算系統，其包含：一板；及附接至該板的一微電子封裝，其中，該微電子封裝包含：與一封裝體接觸的一主動微電子裝置；及設置在於該封裝體中所形成之一腔穴內的一被動微電子裝置；其中，該主動微電子裝置與該被動微電子裝置藉由在該封裝體之中或之上所形成的傳導佈線而電性連接。
  18. 如請求項17的運算裝置，其中，該腔穴從該封裝體的一第一表面延伸穿過該封裝體到該封裝體的一第二表面。
  19. 如請求項17的運算裝置，其中，該主動微電子裝置包含一倒裝晶片微電子裝置，且該封裝體包含一微電子基材，其中，該倒裝晶片微電子裝置透過複數個互連件而與該微電子基材接觸，該等互連件在該倒裝晶片微電子裝置與該微電子基材之間延伸。
  20. 如請求項17的運算裝置，其中，該主動微電子裝置嵌在該封裝體中，並且其中，該主動微電子裝置的一主動表面與該封裝體的一第二表面實質上齊平。
  21. 如請求項20的運算裝置，其中，該等傳導佈線係形成於在該主動微電子裝置之該主動表面及該封裝體知該第二表面上所形成的一重新分配層中。
  22. 如請求項17的運算裝置，其中，該封裝體包含一支撐板及一介電包封劑，其中，該主動微電子裝置的一背表面黏附於該支撐板，並且其中，該主動微電子裝置係嵌在該介電包封劑中，該介電包封劑的一部分延伸於該主動微電子裝置的一主動表面上。
  23. 如請求項22的運算裝置，其中，該等傳導佈線係形成於在該封裝體的一第二表面上所形成的一重新分配層中。
  24. 如請求項23的運算裝置，其中，該腔穴延伸穿過該重新分配層、穿過該介電包封劑、且部份地延伸入該支撐板中。
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