TWI609441B - 基板合成物、用於連接基板之方法及裝置 - Google Patents

基板合成物、用於連接基板之方法及裝置 Download PDF

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TWI609441B
TWI609441B TW102127308A TW102127308A TWI609441B TW I609441 B TWI609441 B TW I609441B TW 102127308 A TW102127308 A TW 102127308A TW 102127308 A TW102127308 A TW 102127308A TW I609441 B TWI609441 B TW I609441B
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substrate
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contact
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TW201419435A (zh
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艾瑞克 托那
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艾瑞克 托那
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    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0076—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised in that the layers are not bonded on the totality of their surfaces
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    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/16—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating
    • B32B37/18—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with all layers existing as coherent layers before laminating involving the assembly of discrete sheets or panels only
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
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    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
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Description

基板合成物、用於連接基板之方法及裝置
本發明係關於一種如技術方案1中所主張之用於將一第一基板連接至一第二基板之方法，及一種如技術方案14中所主張之對應裝置，以及一種如技術方案7中所主張之已尤其根據該方法及/或運用該裝置產生之基板合成物。
在半導體工業中，具有幾百微米厚度之載體晶圓用以藉由不同程序固定一產物晶圓。從根本上說，所謂的永久性連接方法與暫時性連接方法之間係不同的。
在永久性連接中，載體晶圓及產物晶圓連接至彼此旨在不再自彼此分離。在此情況中，往往載體晶圓本身係此刻仍具有一對應厚度以充當待功能指派至產物晶圓之一載體之該等產物晶圓。此等永久性連接方法係互異的、非常不同的及材料特定的。
此外，往往需要針對一特定時間間隔將產物晶圓連接至一載體晶圓以便能夠進行其他程序步驟。處於此暫時性連接狀態中之產物晶圓往往經背薄化(back-thinned)，且以此方式到達小於100μm(一般小於50μm、目前大約20μm、不久的將來或許還要更小)之厚度。暫時性固定必須簡單、快速執行、廉價、有效率、可逆及物理及化學穩定。大多數情況下，載體晶圓塗佈有一連接黏著劑且以一連接方法連接至產物晶圓。已以此方式產生之暫時性連接應該耐受高溫度及力。連接介面應該防止液體及/或氣體滲透至載體晶圓及產物晶圓之中間 空間中。
最頻繁使用類型之暫時性連接使用一連接黏著層。該黏著層可施覆於載體晶圓及/或產物晶圓之整個區域上方。此層具有達到一特定溫度範圍而足以充分固定兩個基板之黏著性質(不可拆卸的互連)。為了分離，加熱兩個基板超出此溫度範圍，且因此膠結劑失去黏著性質，且此兩個晶圓(載體晶圓及產物晶圓)藉由施加一水平及垂直力而分離。
黏著層亦可僅施覆於產物晶圓及/或載體晶圓之邊緣上。內部區域不必含有一黏著層。內部區域之層可具有任何性質，但主要是作為支撐構件引進至個別凸塊之中間空間中。分離程序類似於一毯連接(blanket bond)之分離程序，在任一情況中，僅需要相應地物理及化學處理邊緣區使得暫時性連接失去其黏著性。此伴隨著更低溫度、更短處理時間及更少化學品之材料消耗。
存在用於再次破壞一暫時性連接之無數種其他方法，例如，藉由特殊雷射及藉由具有小直徑孔之載體晶圓(一對應溶劑可通過該等小直徑孔引進至整個表面上方之連接中)。
本發明之目標在於設計一種(一方面)針對全部必需程序步驟在基板之間引起一高連接力且(另一方面)在處理基板合成物之後使薄基板能夠非破壞性地自基板合成物分離之裝置及方法。此外，此目的所必需之程序步驟應可在經濟上及通用性上適用於最多樣的基板/晶圓。
此目標運用技術方案1、7及14之特徵而達成。附屬技術方案中給出本發明之有利開發方案。本說明書、技術方案及/或圖式中給出之特徵之至少兩者之全部組合亦屬於本發明之範疇內。在給定值範圍，指示限制內之值將亦視為待揭示為邊界值且將以任一組合主張。
本發明描述一種裝置及一種方法，使用該裝置及該方法可將一載體晶圓暫時性及/或永久性連接至一產物晶圓。此外，本發明描述 最終產物，即一載體晶圓-產物晶圓合成物(基板合成物)。
本發明基於以下理念：在載體晶圓及/或產物晶圓上，在若干位置(較佳至少三個位置)處，存在可熔融至彼此及/或可藉由物理及/或化學程序拆離之特殊產生互連元件。特定言之，省略用於固定之機械活動零件。
本發明基於以下進一步理念：改良一般裝置及一般方法，使得兩個或更多個基板之暫時性連接係經濟適合的(針對全部程序要求，亦針對高溫度及一真空)，且能夠在無載體晶圓之昂貴清潔成本之情況下在後續程序中重用載體晶圓。此外，存在在高處理溫度下實現一適當互連且實現簡單去連接之固定劑。
本發明基於以下一般發明理念：在基板之間之一作用或共同接觸區域外產生一連接互連。因此省略機械可移動固定構件且亦省去曝露基板本身之間之接觸區域，結果在破壞互連之後接觸區域之清潔變得更簡單且更有效率。基板可更迅速地再次用於進一步處理或重用。作用或共同接觸區域係其中(除可能塗層外)在第一基板與第二基板之間存在直接接觸之區域。若互連以點形成於該區域上方，則此處如本發明中所主張係尤其有利的；此亦包括窄圓環狀施覆。
基板定義為用於半導體工業中之產物基板或載體基板。載體基板針對不同處理步驟(尤其當背薄化功能基板時)用作為功能基板(產物基板)之強化物。基板可尤其係平面或缺口(notched)晶圓。
一獨立發明係一種由一載體基板及一產物基板組成之基板合成物(或一產物基板-載體基板組合)，該載體基板及該產物基板已運用如本發明中所主張之裝置及/或如本發明中所主張之方法彼此對齊、經放置而彼此接觸及預固定及/或連接至彼此，且(特定言之)其等特徵在於：第一基板(載體基板)之直徑D2最少小於第二基板(產物基板)之直徑D3。因此，如本發明中所主張，在處理產物基板期間確保載體基 板不曝露於任何污染、污損、非所要處理等，且因此可更頻繁地重用。
根據本發明之另一有利實施例，提出連接互連在第一基板上至少部分、較佳大部分形成於第一基板之一第一固定區域上(該區域相對於共同接觸區域成角度)，及/或在第二基板上至少部分、較佳大部分形成於第二基板之一第二固定區域上(其相對於共同接觸區域成角度)。因此，用於固定該等基板(產物基板及載體基板)之力之最佳、空間節省傳送係可能的。成角度尤其意謂介於3度與90度之間、較佳介於10度與90度之間之角度。在一些尤其有利實施例中，第一及/或第二固定區域本質上正交於(尤其確切正交於)共同接觸區域而定位。
在第一固定區域及/或第二固定區域旋轉對稱於第一基板及/或第二基板之旋轉軸而配置的情況下，該等基板係運用連接力之一最佳分佈固定於彼此上。
根據本發明之另一有利態樣，使用膠結劑及/或尤其金屬互連元件以形成連接互連。此外，尤其使用連接互連以用於相對於鄰近而密封共同接觸區域。
根據本發明之另一有利實施例，提出第一固定區域與第一接觸區域之間之一第一面積比小於1：5、尤其小於1：10、又更佳小於1：20，及/或第二固定區域與第二接觸區域之間之一第二面積比小於1：5、尤其小於1：10、較佳小於1：20。因此，使用最小可能空間以用於固定，使得留下更多空間以用於形成產物晶圓上之結構。
有利地，第二基板(尤其是在第一接觸區域與第二接觸區域接觸之前)具有用於整平設置於第二基板之頂部上之凸塊之一中間層。中間層用以容納凸塊，該中間層較佳無黏著作用或在任一情況中相對於第一基板具有低粘著性作用。
此外，本發明實現反覆使用載體基板而不必藉由昂貴且複雜程 序清潔載體基板。
此外，在一連接器中整合/安裝如本發明中所主張之裝置係可能的。
就此處或以下圖式之描述中所揭示之裝置之特徵而言，該等特徵亦旨在如所揭示般應用為方法之特徵，且反之亦然。此同樣適用於基板合成物。
1‧‧‧第一基板(載體晶圓)/基板/功能晶圓
1'‧‧‧第一基板(載體晶圓)
1"‧‧‧第一基板(載體晶圓)
1'''‧‧‧第一基板(載體晶圓)
1V‧‧‧第一基板(載體晶圓)
1a‧‧‧第一外輪廓/外輪廓
1f‧‧‧第一固定區域/第一固定表面
1f'‧‧‧固定區域/固定表面
1k‧‧‧第一接觸區域
1o‧‧‧頂部/表面
1o'‧‧‧頂部
2‧‧‧缺口
3‧‧‧平面
6‧‧‧孔
6i‧‧‧內周邊
7‧‧‧第二基板(產物晶圓)/基板/載體晶圓
7a‧‧‧第二外輪廓/外輪廓
7o‧‧‧頂部
7r‧‧‧環形區段
10‧‧‧腔/頂部
11‧‧‧敷金屬/載體晶圓/金屬化區域/金屬互連元件
11'‧‧‧敷金屬/金屬化區域
11"‧‧‧敷金屬
11'''‧‧‧敷金屬
11IV‧‧‧硬化金屬化互連/敷金屬
11V‧‧‧敷金屬
11VI‧‧‧敷金屬
15‧‧‧凸塊
16‧‧‧結構
18‧‧‧中間層/回填平面層
18f‧‧‧第二固定區域/第二固定表面
18k‧‧‧第二接觸區域
19‧‧‧材料
20‧‧‧凹入部
21‧‧‧密封元件
22‧‧‧共同接觸區域/共同接觸表面
28‧‧‧材料疊加
29‧‧‧環形區段
30‧‧‧自由空間
31‧‧‧凹入部
32‧‧‧加熱元件
33‧‧‧冷卻元件
35‧‧‧下試樣架/試樣架
36‧‧‧上試樣架/試樣架
37‧‧‧施配單元
A-A‧‧‧切割線
B-B‧‧‧切割線
D1‧‧‧直徑
D2‧‧‧直徑
D3‧‧‧直徑
R‧‧‧軸
自以下較佳例示性實施例之描述且使用圖式將明白本發明之其他優點、特徵及細節。
圖1a、圖1b及圖1c各自展示如本發明中所主張之具有不同外輪廓之一第一基板在調適第一基板之一直徑D1之前之一示意性平面視圖，圖2a展示根據圖1a之基板之一示意性橫截面視圖，圖2b展示基板在調適(減小)直徑D1之後之一示意性橫截面視圖，圖3a展示如本發明中在一第一實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖3b展示如本發明中根據圖3a所主張之已產生之一基板合成物之一示意性橫截面視圖，圖4a展示如本發明中在一第二實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖4b展示如本發明中根據圖4a所主張之已產生之一基板合成物之一示意性橫截面視圖，圖5a展示如本發明中在一第三實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖5b展示如本發明中根據圖5a所主張之已產生之一基板合成物之一示意性橫截面視圖， 圖6a展示如本發明中在一第四實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖6b展示如本發明中根據圖6a所主張之已產生之一基板合成物之一示意性橫截面視圖，圖6c展示根據來自圖6b之切割線A-A之一示意性平面視圖，圖7a展示如本發明中在一第五實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖7b展示如本發明中根據圖7a所主張之已產生之一基板合成物之一示意性橫截面視圖，圖8a展示如本發明中在一第六實施例中所主張之第一基板在運用互連元件與一第二基板接觸之前之一示意性橫截面視圖，圖8b展示如本發明中根據圖8a所主張之已產生之一基板合成物之一示意性橫截面視圖，圖8c展示根據來自圖8b之切割線B-B之一示意性平面視圖，圖9a展示如本發明中所主張之一基板之一表面之一示意性橫截面視圖，其具有圍繞該基板蔓延之一銑入凹入部，圖9b展示如本發明中所主張之一基板之一表面之一示意性橫截面視圖，其具有圍繞該基板蔓延之一銑入凹入部，且其中已沈積一金屬，圖9c展示如本發明中所主張之其上已沈積一金屬之一基板之一表面之一示意性橫截面視圖，圖10a展示如本發明中所主張之用於局部焊接及脫焊之一裝置之一示意性橫截面視圖，圖10b展示如本發明中所主張之用於局部施覆一材料之一裝置之一示意性橫截面視圖。
在圖中，已運用根據本發明之實施例識別本發明之優點及特徵 之元件符號標示本發明之優點及特徵，具有相同功能或具有相同效應之功能之組件或特徵運用同樣元件符號標示。
針對一般方法，第一基板1將係任一材料之一載體晶圓(但較佳為矽之一載體晶圓)。一第二基板7(此處：產物晶圓)(其將與第一基板1接觸)及載體晶圓較佳由相同材料組成。歸因於同樣或至少類似材料，產物晶圓與載體晶圓之間之機械及熱參數係同樣的或至少類似的。
第二基板7在其頂部7o上具有用於晶片之電互連之凸塊15。為了整平及壓力等化，頂部7o上存在一中間層18作為第二基板7之一組件(在該中間層18上與第一基板1接觸)。因此第一基板1具有一第一接觸區域1k，且第二基板7具有一第二接觸區域18k。對於不存在凸塊15之範圍，可使第二基板7與第一基板1直接接觸而無一中間層18，則頂部7o變成第一接觸區域。
基板1、7可完全徑向對稱或可具有一缺口2、一平面3或自徑向對稱(圖1)之任一其他偏差，然而以其他方式可同樣使得其徑向對稱。基板1、7在形狀上尤其一致，較佳本質上徑向對稱(除上述特徵外)。以其他方式或更一般表示，基板1、7具有對應外輪廓1a、7a。
針對如本發明中所主張之連接方法，載體晶圓(第一基板1)尤其藉由研磨及/或蝕刻程序(尤其)運用一商業習知直徑D1(圖2a)至一小於(較佳)或等於產物晶圓7之直徑D3之直徑D2(圖2b)工作。
在理想情況中，在外輪廓1a至第一接觸區域1k之過渡處，一角落邊緣具有相對於一對置角落邊緣或在減小直徑之前(尤其以小於1：5之一比率遠較小之一曲率半徑)，使得第一基板1之一下區段具有一圓柱形外輪廓(除根據圖1b及圖1c之可能特徵外)。
本發明之一重要、尤其最初態樣係關於一種金屬合金，其一方面具有一互連，且視情況引起密封載體晶圓與產物晶圓之間之共同接 觸區域。此可藉由如本發明中根據以下描述所主張之若干實施例而發生。
在一第一實施例(圖3)中，在第一基板1之外輪廓1a上金屬化一尤其旋轉對稱周邊區段。較佳其係覆蓋第一基板1'之外輪廓之整個周邊之一敷金屬(metallization)11。以此方式，達成較佳完全密封(其亦係氣密及/或液密)。在一特殊版本中，敷金屬11亦可僅點狀施覆於載體晶圓1之周邊之一些位置處。氣密或液密密封並非以此方式產生。在任一情況中，稍後密封可足夠穩固以暫時性及/或永久性將兩個晶圓彼此連接。敷金屬11固定於第一基板上之一第一固定表面1f上。
較佳第二基板7在定位於當接觸時形成於第一接觸區域1k與第二接觸區域18k之間之一共同接觸區域22外之一環形區段7r中之頂部7o上(或在中間層18指向第一基板1之側上)具有一敷金屬11'。
第一基板1之敷金屬11及第二基板7之敷金屬11'可由不同材料組成。較佳使用其合金形成一共晶之金屬。更佳兩個敷金屬之至少一者應由具有儘可能低之一熔融點之一金屬組成。熔融點應小於500℃、較佳小於400℃、更佳小於300℃、最佳小於200℃、最最佳小於100℃。此外，兩個敷金屬11及11'可由相同金屬組成。此金屬較佳應具有儘可能低之一熔融點。由於歸因於該實施例之幾何形狀，不可能對金屬化區域11及11'加壓或僅可能加壓至一高度有限程度，故敷金屬11"之產生僅主要藉由熱應力而發生。因此較佳通常為一熔接或焊接程序。
圖3b展示由兩個敷金屬11、11'(若存在)組成且歸因於熔融期間之流動而具有一不同形狀之熔融及重硬化之敷金屬11"。敷金屬11"在第一基板1與第二基板7及屬於第二基板7之中間層18之間產生一連接互連。
連接互連朝向相對於共同接觸區域22大致上成直角之一固定區 域1f'上之外輪廓1a上之第一基板1而存在。因此連接互連定位於共同接觸區域22外。較佳固定表面1f'僅在外輪廓1a之一部分上方延伸。
朝向第二基板7，連接互連(一方面)設置於環形區段7r上，且(另一方面)設置於由中間層18之一自由空間30形成之一第二固定區域18f上，該自由空間尤其藉由敷金屬11'形成。敷金屬11'可尤其容易藉由光刻程序產生。第二固定表面18f由與自由空間30接界之一周邊壁組成。環形區段7r與朝向第二基板7之自由空間30接界，且因此形成第二固定區域之一部分。
在類似於根據圖3a/圖3b之第一實施例作出之一第二實施例(圖4)(除以下細節外)中，一材料19用以沿著外輪廓1a(在整個周邊上)密封兩個基板1、7。因此保護共同接觸表面22以防污損/污染。材料19可係任一類型之黏著劑或金屬。敷金屬11(尤其連同材料19之一可能黏著性一起)在基板1、7之間提供足夠連接力。然而，根據本發明，亦可省略敷金屬11、11'。
在一第三實施例(圖5)中，兩個基板1、7藉由在一程序步驟中產生之一材料疊加28連接。材料疊加28至少大部分、較佳幾乎完全覆蓋自第二基板7突出於第一基板1上方之一環形區段29。材料疊加28側向施覆於第一基板1'上及第二基板7上方，且在硬化之後，第一基板1藉由材料疊加28固定於第二基板7上。此類型之固定亦將較佳具有一徑向對稱形狀。較佳載體晶圓1'上之材料疊加28僅側向施覆，且在產物晶圓7上僅施覆於邊緣表面上。將亦可想像稍微覆蓋第一基板1之一頂部1o'。材料疊加28藉由尤其包括一遮罩之施覆構件施覆，該遮罩允許存取待僅施覆於所要位置處之材料。將亦可想像將兩個基板1、7垂直沈浸至一熔體中及在該熔體中旋轉兩個基板1、7。對於環形區段29之此沈浸方法允許濕潤待保護之外環形區段29。在一特殊實施例中，材料疊加28係一敷金屬，但如本發明中所主張，將亦可想像黏著劑或 陶瓷材料。
在一第四實施例(圖6)中，尤其通過第一基板1"之孔6穿孔及/或蝕刻至第一基板1"中。較佳孔6在其等內周邊6i上具有敷金屬11'''以便實現一點連接互連。產物晶圓7上存在結構16。較佳結構16係凸塊。取決於孔6及敷金屬11'''之形狀及結構16之尺寸，在熔融期間可實現自調整焊接金屬在此等點處之熔融及如此做產生之表面張力。在此類型之固定中，基板1"、7主要在一些位置處藉由滲透至孔6中之材料彼此直接互連。根據圖6c，硬化之金屬化互連11IV係固定劑，尤其在敷金屬11IV之間存在用於完全密封兩個基板1"、7之共同接觸區域22之額外密封元件21。有利地，密封元件21可係線性施覆條(較佳呈敷金屬之形式)，其在熱處理期間同樣熔接至彼此。熔接尤其藉由熱壓縮連接及/或共晶連接而發生。
在一第五實施例(圖7)中，在第一基板1'''中製成涵蓋第一接觸區域1k之接觸側上之任一形狀之腔10。較佳腔10具有一敷金屬11V(尤其呈點狀)。腔10之特徵在於：因為腔10不完全穿透晶圓載體1'''，所以就此目的而言，圖6中之孔6可尤其在整個晶圓周圍徑向對稱延伸為一閉合環形。如本發明中所主張，將可設想藉由蝕刻或銑製(milling)產生腔10。結晶蝕刻一特定結晶定向之載體晶圓大體上可非常有效率產生腔10。藉由腔10之徑向對稱產生非常有效率密封兩個晶圓之間之介面。
連同敷金屬11'(如圖4a)一起將敷金屬11V熔融及硬化為一敷金屬11VI。後者繼而提供用於基板1、7之間之連接互連。
在一第六實施例(圖8)中，在第一基板1V之邊緣上製成任一形狀(尤其如徑向對稱、銑出點或孔徑)之小凹入部20。第一基板1V與第二基板7之間之互連運用對應互連構件(尤其膠結劑或敷金屬)而發生。
因為第一基板之直徑D2小於/等於第二基板7之直徑D3，所以載 體晶圓(第一基板1)在後續程序中(尤其濺鍍程序及電漿程序)藉由環形區段29保護。省略尤其由金屬污染引起之對第一基板之一複雜及昂貴清潔。第一基板因此可立即重用於其他/進一步步驟。
有利地，將一不黏著或僅略黏著之可拆卸密封層及/或分離層施覆至與產物晶圓7接觸之第一基板1之整個區域。具有此密封層之第一基板1'、1"、1'''、1IV、1V與第二基板7不具有黏著性、永久性黏合接觸，除焊接點或黏著點之區域之外。
根據僅在確切定義之點將產物晶圓7固定至載體晶圓1'且在完成程序之後再次分離此固定之此新穎方法，可使用確保適用於程序或若干程序之固定之任一材料。亦可使用藉由添加其他材料或能量而完全或部分失去其等固定性質之化學或生物材料來代替金屬焊料。
該類型之焊接金屬取決於其他程序中所必需及對於該程序具體定義之溫度及要求。由於取決於組份之焊接金屬具有一定義熔融點，故溫度調適存在一廣泛可能性。熔融點最多高於預期之生產程序之溫度比重。
但亦可使用亦用於產生產物晶圓上之凸塊之焊接金屬。由於在脫焊期間，熱僅供應於旨在固定之位置處，故產物晶圓之凸塊不熔融。
亦可能應用能夠固定晶圓之任一其他材料代替敷金屬11。此材料可具有一黏著性及/或密封作用。可藉由半導體工業中已知之一設備徑向對稱施覆該材料。
在全部實施例中，可以任一可設想方式添加溫度以用於熔融互連材料以用於連接及/或去連接。特定言之，將可設想(較佳)藉由載體晶圓及/或產物晶圓與一加熱板接觸而引入於整個區域上方。在一特殊及較佳實施例中，熱僅藉由一加熱元件32添加於其中存在對應敷金屬或固定物之該等位置處。局部加熱具有以下決定性優點：並非整個 晶圓受到熱負載，且因此已存在於產物晶圓上之可能結構不受到熱負載或僅受到至少很少負載。
在接觸之後，在具有此等腔10之位置處用於連接之設備中，添加溫度以熔融焊接金屬，使得焊接在此等點處發生。如本發明中所主張，去連接以相同方式藉由加熱且後續借助於一裝置之一致動單元引入運動而機械分離晶圓而發生。
若再次熔融敷金屬11、11'、11"之一者，較佳僅直接鄰近於敷金屬11、11'、11"添加熔融熱。
圖9a至圖9c展示獨立於所展示之實施例之一者而用於將熔融熱局部添加於第一基板1之表面1o上方之三個可能實施例。此添加可相應地用於所指示之實施例之任一者且據此揭示為一獨立發明。
在一第一實施例中，較佳使用與第一基板1之頂部1o接觸之一非常窄加熱元件32。較佳加熱元件32由用於減小熱在整個第一基板1上方之傳播之兩個冷卻元件33所圍繞。更佳在相對於在第一基板1中施覆敷金屬11、11'、11"之區域(或在第一基板1、1'與之背向之側上)存在一加熱元件32(在此情況中為具有一楔形輪廓之一加熱元件32)可插入其中之一凹入部31，以便最佳化至敷金屬1之熱傳輸。
在另一實施例中，將一敷金屬34(尤其搭配加熱元件32)沈積於凹入部31中以用於加熱。歸因於敷金屬34而投送一高電流，該高電流產生繼而加熱敷金屬鄰近處之Joulean熱且因此如本發明中所主張般導致熔融定位於鄰近處中之敷金屬34(加熱元件32之功能)。
在另一實施例中，將一敷金屬34'(尤其搭配加熱元件32)齊平沈積於第一基板1、1'之頂部1o上，因此在第一基板1、1'中無凹陷。
本發明提出之三個方法亦可用以添加熱以用於焊接(產生互連)。
圖10a、圖10b展示如本發明中所主張之由至少一個下試樣架35及一個上試樣架36組成之一裝置。製成上試樣架36使得如本發明中所主 張之一加熱元件32可到達基板1、7之邊緣，且使得能夠如本發明所主張般添加熱用於焊接程序及/或脫焊程序。較佳在上試樣架36與下試樣架35之間依空間之全部三個方向之相對運動係可能的。較佳兩個試樣架35、36可圍繞一旋轉軸R轉向彼此。甚至更佳如本發明中所主張之一加熱元件32在兩個試樣架35、36之間依空間之全部三個方向之一相對運動亦係可能的。試樣架35、36亦稱為接觸構件，其用於使第一基板1之一第一接觸區域1k與第二基板7之一第二接觸區域18k接觸，該第二區域平行對準於第一接觸區域1k。
試樣架35及36較佳為真空試樣架。但其等亦可係可如本發明中所主張般固定兩個晶圓之靜電或其他試樣架。
在裝置之另一實施例中，可使用一施配單元37代替一對應加熱元件32。施配單元可用於側向敷金屬，用於沈積黏著劑，用於施覆密封化學品或用於施覆任一材料。因為試樣架35、36對於彼此之可能相對位移及/或旋轉及/或施配單元37相對於試樣架35、36之相對運動，所以如本發明中所主張之任一材料之一純粹環形施覆或一毯施覆係可能的。例如，在一連接程序或焊接程序之前，尤其針對後續化學程序將500μm至2000μm寬之一環形層施覆於功能晶圓1或載體晶圓1之最外邊緣上以便在邊緣區域中產生密封。當使用適合平面層時，可省略在邊緣區域中施覆一額外密封層。在一清潔步驟中必須移除介於功能層之凸塊之間之回填平面層18。由於為自具有黏著層之其他方法區分，此支撐層不具有黏著性質或僅具有稍微黏性，故與黏著方法相比，清潔更簡單且更經濟。
1'‧‧‧第一基板(載體晶圓)
1a‧‧‧第一外輪廓/外輪廓
1f‧‧‧第一固定區域/第一固定表面
1k‧‧‧第一接觸區域
7‧‧‧第二基板(產物晶圓)/基板/載體晶圓
7a‧‧‧第二外輪廓/外輪廓
7o‧‧‧頂部
7r‧‧‧環形區段
11‧‧‧敷金屬/載體晶圓/金屬化區域/金屬互連元件
11'‧‧‧敷金屬/金屬化區域
15‧‧‧凸塊
18‧‧‧中間層/回填平面層
18f‧‧‧第二固定區域/第二固定表面
D2‧‧‧直徑
D3‧‧‧直徑

Claims (10)

  1. 一種將一第一基板(1)連接至一第二基板(7)之方法，其運用以下步驟、尤其運用以下順序：使該第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)接觸，該第二區域平行對準於該第一接觸區域(1k)，結果形成一共同接觸區域(22)，在該第一基板(1)與該第二基板(7)之間在該共同接觸區域(22)外產生一尤其為點狀之連接互連，其中該連接互連在該第一基板(1)上至少部分、較佳大部分形成於該第一基板(1)之一第一固定區域(1f)上，該區域相對於該共同接觸區域(22)成角度，及/或在該第二基板(7)上至少部分、較佳大部分形成於該第二基板(7)之一第二固定區域(18f)上，該區域相對於該共同接觸區域(22)成角度；及其中該等第一固定區域(1f)及/或該等第二固定區域(18f)旋轉對稱於該第一基板(1)及/或該第二基板(7)之一旋轉軸而配置。
  2. 如請求項1之方法，其中使用膠結劑(19)及/或尤其金屬互連元件(11)以形成該連接互連。
  3. 如請求項1之方法，其中該第一固定區域(1f)與該第一接觸區域(1k)之間之一第一面積比小於1：5、尤其小於1：10、又更佳小於1：20，及/或該第二固定區域(18f)與該第二接觸區域(18k)之間之一第二面積比小於1：5、尤其小於1：10、較佳小於1：20。
  4. 一種將一第一基板(1)連接至一第二基板(7)之方法，其運用以下步驟、尤其運用以下順序：使該第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)接觸，該第二區域平行對準於該第一接觸區 域(1k)，結果形成一共同接觸區域(22)，在該第一基板(1)與該第二基板(7)之間在該共同接觸區域(22)外產生一尤其為點狀之連接互連，其中特定言之使在該第一接觸區域(1k)與該第二接觸區域(18k)接觸之前，尤其製造為一產物晶圓之該第二基板(7)具有用於整平設置於該第二基板(7)之一頂部(70)上之凸塊(15)之一中間層(18)。
  5. 一種具有一第一基板(1)及一第二基板(7)之基板合成物，其中該第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)形成一共同接觸區域(22)，該第二區域平行對準於該第一接觸區域(1k)，在該共同接觸區域(22)外在該第一基板(1)與該第二基板(7)之間存在一尤其為點狀之連接互連；其中該連接互連在該第一基板(1)上至少部分、較佳大部分形成於該第一基板(1)之一第一固定區域(1f)上，該區域相對於該共同接觸區域成角度，及/或在該第二基板(7)上至少部分、較佳大部分形成於相對於該共同接觸區域成角度之該第二基板(7)之一第二固定區域(18f)上；及其中該第一固定區域(1f)及/或該第二固定區域(18f)旋轉對稱於該第一基板(1)或該第二基板(7)之一旋轉軸而配置。
  6. 如請求項5之基板合成物，其中該連接互連包含膠結劑及/或尤其金屬互連元件(11)。
  7. 如請求項5之基板合成物，其中該第一固定區域(1f)與該第一接觸區域(1k)之間之一第一面積比小於1：5、尤其小於1：10、又更佳小於1：20，及/或該第二固定區域(18f)與該第二接觸區域(18k)之間之一第二面積比小於1：5、尤其小於1：10、較佳小於1：20。
  8. 一種具有一第一基板(1)及一第二基板(7)之基板合成物，其中該 第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)形成一共同接觸區域(22)，該第二區域平行對準於該第一接觸區域(1k)，在該共同接觸區域(22)外在該第一基板(1)與該第二基板(7)之間存在一尤其為點狀之連接互連；及其中尤其製造為一產物晶圓之該第二基板(7)具有用於整平設置於該第二基板(7)之一頂部(70)上之凸塊(15)之一中間層(18)。
  9. 一種具有一第一基板(1)及一第二基板(7)之基板合成物，其中該第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)形成一共同接觸區域(22)，該第二區域平行對準於該第一接觸區域(1k)，在該共同接觸區域(22)外在該第一基板(1)與該第二基板(7)之間存在一尤其為點狀之連接互連；及其中該第二基板(7)之一第二外輪廓(7a)在接觸期間尤其等距地突出於該第一基板(1)之一第一外輪廓(1a)上方。
  10. 一種用於將一第一基板(1)連接至一第二基板(7)之裝置，其具有以下特徵：接觸構件，其用於使該第一基板(1)之一第一接觸區域(1k)與該第二基板(7)之一第二接觸區域(18k)接觸，該第二區域平行對準於該第一接觸區域(1k)，結果形成一共同接觸區域(22)，連接構件，其用於在該共同接觸區域(22)外在該第一基板(1)與該第二基板(7)之間產生一尤其為點狀之連接互連，及施覆構件，該施覆構件用於施覆膠結劑及/或尤其金屬互連元件(11)以用於形成該連接互連。
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Families Citing this family (4)

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Publication number Priority date Publication date Assignee Title
EP3154079A1 (de) * 2015-10-08 2017-04-12 Heraeus Deutschland GmbH & Co. KG Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen
JP6358240B2 (ja) * 2015-11-19 2018-07-18 トヨタ自動車株式会社 半導体装置及び半導体装置の製造方法
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101925996A (zh) * 2008-01-24 2010-12-22 布鲁尔科技公司 将器件晶片可逆地安装在载体基片上的方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4966646A (en) * 1986-09-24 1990-10-30 Board Of Trustees Of Leland Stanford University Method of making an integrated, microminiature electric-to-fluidic valve
JPH06268051A (ja) * 1993-03-10 1994-09-22 Mitsubishi Electric Corp ウエハ剥し装置
JPH1031142A (ja) 1996-07-16 1998-02-03 Nikon Corp 極薄厚板状の光学素子を備えている光学部品、極薄厚板状の光学素子の接合方法
JP2004349649A (ja) * 2003-05-26 2004-12-09 Shinko Electric Ind Co Ltd ウエハーの薄加工方法
US7786591B2 (en) 2004-09-29 2010-08-31 Broadcom Corporation Die down ball grid array package
JP4613709B2 (ja) 2005-06-24 2011-01-19 セイコーエプソン株式会社 半導体装置の製造方法
US8993410B2 (en) * 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
JP5289805B2 (ja) * 2007-05-10 2013-09-11 株式会社半導体エネルギー研究所 半導体装置製造用基板の作製方法
JP2008311459A (ja) 2007-06-15 2008-12-25 Panasonic Corp 半導体装置実装構造体およびその製造方法ならびに半導体装置の剥離方法
US7566632B1 (en) * 2008-02-06 2009-07-28 International Business Machines Corporation Lock and key structure for three-dimensional chip connection and process thereof
US8476165B2 (en) * 2009-04-01 2013-07-02 Tokyo Electron Limited Method for thinning a bonding wafer
JP5495647B2 (ja) * 2009-07-17 2014-05-21 株式会社ディスコ ウェーハの加工方法
JP5515811B2 (ja) 2010-02-05 2014-06-11 日立化成株式会社 半導体装置の製造方法及び回路部材接続用接着シート
JP5714859B2 (ja) 2010-09-30 2015-05-07 芝浦メカトロニクス株式会社 基板積層体、貼り合わせ装置、剥離装置、および基板の製造方法
US8709945B2 (en) * 2011-01-26 2014-04-29 Jeng-Jye Shau Area efficient through-hole connections
JP5936312B2 (ja) * 2011-03-31 2016-06-22 株式会社ディスコ 半導体ウエーハの加工方法
US8580655B2 (en) * 2012-03-02 2013-11-12 Disco Corporation Processing method for bump-included device wafer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101925996A (zh) * 2008-01-24 2010-12-22 布鲁尔科技公司 将器件晶片可逆地安装在载体基片上的方法

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