TWI584407B - Wafer support construct - Google Patents

Wafer support construct Download PDF

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Publication number
TWI584407B
TWI584407B TW105101347A TW105101347A TWI584407B TW I584407 B TWI584407 B TW I584407B TW 105101347 A TW105101347 A TW 105101347A TW 105101347 A TW105101347 A TW 105101347A TW I584407 B TWI584407 B TW I584407B
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Taiwan
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wafer
tray
plate
side electrode
support structure
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TW105101347A
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TW201639071A (zh
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Ngk Insulators Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support

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Description

晶圓支持構造體
本發明是關於一種晶圓支持構造體。
過去一般習知有一種晶圓支持構造體，其包括複數個用來載置晶圓的晶圓載置部(例如，專利文獻1)。
[專利文獻1]日本特開2010-59494號公報
然而，作為此種晶圓支持構造體，已知有第8圖所示之構造。在此晶圓支持構造體100中，包括複數個用來載置晶圓W之晶圓載置部104的搬送用三氧化二鋁平板102配置於氮化鋁靜電夾盤110的上面。在搬送用三氧化二鋁平板102的背面，形成導電材料(例如鎳)的鍍層106。又，氮化鋁靜電夾盤110內建有一對正負電極112,114。於各晶圓載置部104上載置有晶圓W的狀態下，若對電極112,114施加直流電源DC1,DC2的直流電壓，會在搬送用三氧化二鋁平板102的鍍層106與氮化鋁靜電夾盤110之間產生JR力，搬送用三氧化二鋁平板102被氮化鋁靜電夾盤110吸著。此外，晶圓載置部104的表面(與晶圓W接觸的面)為研削面。此外，在氮化鋁靜電夾盤110中與鍍層106相向的面上形成了浮雕(圖示省略)，浮雕的表面(與鍍層106接觸的面)為鏡面。
不過，在第8圖的晶圓支持構造體中，晶圓W僅載置於搬送用三氧化二鋁平板102的晶圓載置部104上，所以，晶圓W與晶圓載置部104的表面之間的接觸熱電阻較大。因此，若從上部進行電漿加熱，晶圓W的溫度會變得太高，晶圓W的溫度分佈(最高溫度與最低溫度的差)會變得太大。
本發明鑑於上述課題，主要目的在防止晶圓變得過於高溫以及晶圓的溫度分佈變得過大。
一種晶圓支持構造體，包括複數個用來載置晶圓之晶圓載置部的陶瓷製之托盤基板配置於陶瓷製之基座平板之上面，其中，上述基座平板內建有基座側電極，上述托盤平板內建有托盤側電極，於上述晶圓載置部上載置有上述晶圓的狀態下，調整施加於上述基座側電極及上述托盤側電極的電壓，藉此，產生上述基座平板與上述托盤平板之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。
在此晶圓支持構造體中，於上述晶圓載置部上載置有上述晶圓的狀態下，調整施加於上述基座側電極及上述托盤側電極的電壓，藉此，產生基座平板與托盤平板之間及托盤平板與晶圓之間的靜電力(吸著力)。藉此，晶圓與晶圓載置部之間的接觸熱電阻會比不在晶圓與晶圓載置部之間產生吸著力時來得小。因此，可防止從上方加熱晶圓時使晶圓變得過於高溫以及使晶圓的溫度分佈變得過大。
在本發明之晶圓支持構造體中，與上述基座平板相向的那面上具有金屬層，可於上述晶圓載置部上載置有上述 晶圓的狀態下，對上述托盤側電極及上述托盤側電極兩方施加電壓，藉此，產生上述基座平板與上述托盤平板之上述金屬層之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。或者，上述托盤平板與上述基座平板相向的那面上不具有金屬層，可於上述晶圓載置部上載置有上述晶圓的狀態下，對上述托盤側電極施加電壓，藉此，產生上述基座平板與上述托盤平板之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。
在本發明之晶圓支持構造體中，上述晶圓載入置部中與上述晶圓接觸的那面可為平坦的鏡面。於是，相較於與晶圓接觸的那面為研削面的情況，晶圓與晶圓載置部的接觸面積較大，所以，本發明的效果顯著。
在本發明之晶圓支持構造體中，上述托盤平板亦可為三氧化二鋁製，上述基座平板亦可為氮化鋁製。
在本發明之晶圓支持構造體中，上述托盤側電極為具有負極與正極的雙極構造，各晶圓載置部上的上述負極與上述正極的面積比宜為0.7~1：0.7~1(最好為0.9~1：0.9~1)。於是，難以對晶圓產生很強或很弱的吸著力，晶圓的溫度分佈可變得更小。
10‧‧‧晶圓支持構造體
12‧‧‧托盤平板
14‧‧‧晶圓載置部
16‧‧‧鍍層
17‧‧‧供電插銷
18‧‧‧托盤側電極
18a‧‧‧負極
18b‧‧‧正極
19‧‧‧供電插銷
20‧‧‧基座平板
22‧‧‧基座側電極
22a‧‧‧櫛齒負極
22b‧‧‧櫛齒正極
24a‧‧‧供電插銷
24b‧‧‧供電插銷
26‧‧‧絕緣袖套
27‧‧‧絕緣袖套
30‧‧‧晶圓支持構造體
40‧‧‧晶圓支持構造體
42‧‧‧基座側電極
42a‧‧‧接地插銷
100‧‧‧晶圓支持構造體
102‧‧‧搬送用三氧化二鋁平板
104‧‧‧晶圓載置部
106‧‧‧鍍層
110‧‧‧氮化鋁靜電夾盤
112,114‧‧‧電極
W‧‧‧晶圓
第1圖為第1實施型態之晶圓支持構造體10的垂直剖面圖。
第2圖為第1實施型態之晶圓支持構造體10的平面圖。
第3圖為第2實施型態之晶圓支持構造體30的垂直剖面圖。
第4圖為透視圖，表示從上方來觀看用來構成第2實施型態之托盤側電極的負極18a，正極18b的其中一例。
第5圖為透視圖，表示從上方來觀看用來構成第2實施型態之托盤側電極的負極18a，正極18b的其中一例。
第6圖為透視圖，表示從上方來觀看用來構成第2實施型態之托盤側電極的負極18a，正極18b的其中一例。
第7圖為第3實施型態之晶圓支持構造體40的垂直剖面圖。
第8圖為習知之晶圓支持構造體100的垂直剖面圖。
[第1實施型態]
本發明之晶圓支持構造體之一例將使用第1圖及第2圖來進行說明。第1圖為第1實施型態之晶圓支持構造體10的垂直剖面圖，第2圖為晶圓支持構造體10的平面圖。
晶圓支持構造體10在利用電漿進行CVD、蝕刻等時用來支持晶圓W，安裝於半導體製程用之製程室(圖示省略)的內部。
在晶圓支持構造體10中，包括複數個用來載置晶圓W之晶圓載置部14的陶瓷製(在此為三氧化二鋁製)之托盤平板12配置於陶瓷製(在此為氮化鋁製)之基座平板20的上面。
托盤平板12為用來搬送晶圓W的圓盤狀平板，其上面具有複數個晶圓載置部14。晶圓載置部14從上方看 時，形狀為圓形的凹洞，尺寸稍微大於圓盤狀的晶圓W。在此，晶圓載置部14從上方觀看時，可看見中央有1個托盤平板12，在托盤平板12的同心圓上，每隔60°一共形成6個托盤平板12，一共形成7個(參照第2圖)。晶圓載置部14的表面亦即與晶圓W接觸的面形成平坦的鏡面。在托盤平板12的背面亦即與基座平板20相向的面上，形成導電材料(例如鎳)的鍍層16。托盤平板12內建有圓盤狀的托盤側電極18。托盤側電極18埋設於距離晶圓載置部14表面0.35±0.05mm的位置。此托盤平板18的供電插銷17從基座平板20的下面貫穿基座平板20，到達托盤側電極18。供電插銷17的先端可為平坦面或曲面(球面)。
基座平板20為圓盤狀的平板，內建有基座側電極22。基座側電極22由櫛齒負極22a及櫛齒正極22b所構成，櫛齒之間保持非接觸狀態並作相互嵌入的配置。櫛齒負極22a與櫛齒正極22b的面積比為0.7~1：0.7~1。此基座側電極22埋設於距離上面1±0.5mm的位置。在基座平板20的上面亦即與托盤平板12相向的面上，形成複數個浮雕(圖示省略)。這些浮雕的表面(與鍍層16接觸的面)形成鏡面。基座平板20包括從下面到達櫛齒負極22a的供電插銷24a及從下面到達櫛齒正極22b的供電插銷24b。又，在基座平板20上，設有貫通上下方向的絕緣袖套26。托盤側電極18的供電插銷17插通此絕緣袖套26。供電插銷17藉由設置於絕緣袖套26內的彈性體(圖示省略)，將托盤側電極18的接觸加重調整到200g。托盤側電極18及基座側電極22可藉由印刷來形成，也可埋設網目。
接著，說明本實施型態之晶圓支持構造體10的使用例。首先，各晶圓載置部14上載置晶圓W。然後，分別對供電插銷24a,24b施加直流電源DC1,DC2的電壓，對供電插銷17施加直流電源DC3的電壓。又，對未圖示之平行平板施加高頻電壓，使其在晶圓W的上方產生電漿。電漿可作為晶圓W的接地電極來使用。藉此，在基座側電極22與托盤平板12的鍍層16之間產生JR力，在托盤側電極18與各晶圓W之間產生庫倫力。在此狀態下，利用電漿對晶圓W進行CVD成膜或進行蝕刻。
根據以上詳述的晶圓支持構造體10，晶圓W與晶圓載置部14之間的接觸熱電阻比晶圓W與晶圓載置部14之間不產生吸著力的情況還要小。因此，可防止從上方對晶圓W加熱時使晶圓W變得過於高溫以及晶圓W的溫度分佈變得過大。又，晶圓載置部14中與晶圓W接觸的那面為平坦的鏡面，所以，此面相較於研削面，晶圓W與晶圓載置部14的接觸面積較大，本發明的效果顯著。
[第2實施型態]
第2實施型態之晶圓支持構造體30如第3圖所示，變更了托盤平板12的托盤側電極的構造，除此之外，與晶圓支持構造體10相同。具體而言，晶圓支持構造體30將內建於托盤平板12的托盤側電極以鋸齒狀的負極18a及正極18b來構成，彼此間保持非接觸狀態並作交互嵌入的配置。又，負極18a上連接有供電插銷17，正極18b上連接有供電插銷19。供電插銷19插通貫通基座平板20的絕緣袖套27。再者，對供電插銷 17,19分別施加直流電源DC3,DC4的電壓。在此，從上方觀看托盤平板12時的透視圖表示於第4圖至第6圖。第4圖為將21個2吋晶圓W載置於托盤平板12上的範例，第5圖及第6圖為將7個4吋晶圓W載置於托盤平板12的範例。在各圖中，負極18a以細網目，正極18b以粗網目來表示。負極18a與正極18b的間隔不受特別限定，可為2~6mm。又，托盤側電極18的電極端(外周端)與托盤平板12之間的距離也不受特別限定，但宜為1~4mm。第4圖至第6圖皆設定為，當看作1個晶圓W時，負極18a與正極18b的面積比為0.7~1：0.7~1(在第4圖至第6圖中為1：1)。當使用此晶圓支持構造體30時，首先，在各晶圓載置部14上載置晶圓W。然後，對供電插銷24a,24b分別施加直流電源DC1,DC2的電壓，對供電插銷17,19施加直流電源DC3,DC4的電壓。又，對未圖示之平行平板施加高頻電壓使其在晶圓W的上方產生電漿。藉此，在基座側電極22與托盤平板12的鍍層16之間產生JR力，在托盤側電極(負極18a與正極18b)與各晶圓W之間產生庫倫力。於是，可得到與晶圓支持構造體10相同的效果。又，當看作1個晶圓W時，負極18a與正極18b的面積比為0.7~1：0.7~1，所以，各晶圓W難以產生很強或很弱的吸著力，於是可縮小晶圓W的溫度分佈。
[第3實施型態]
第3實施型態之晶圓支持構造體40如第7圖所示，不形成托盤平板12的鍍層16，變更基座平板20的基座側電極的構造，除此以外，和晶圓支持構造體10相同。具體而言，晶圓 支持構造體40不在托盤平板12的下面形成鍍層16，而是直接載置於基座平板20上。又，基座平板20的基座側電極42作為1片圓盤狀的電極，透過接地插銷42a來接地。基座側電極42配置於距離上面0.5±3mm的位置。又，托盤側電極18配置於距離晶圓載置面14的表面及托盤平板12的下面0.35±0.05mm的位置。當使用此晶圓支持構造體40時，首先，在各晶圓載置部14上載置晶圓W。然後，對供電插銷17分別施加直流電源DC1的電壓。又，對未圖示之平行平板施加高頻電壓使其在晶圓W的上方產生電漿。電漿可作為晶圓W的接地電極來使用。藉此，在基座側電極42與托盤側電極18之間產生庫倫力，在托盤側電極18與各晶圓W之間產生庫倫力。於是，可得到與晶圓支持構造體10相同的效果。此外，托盤平板12的使用溫度所在的體積電阻率宜為1×1015Ωcm以上。
此外，本發明不受上述實施型態的限定，只要在本發明的技術範圍內，可作為各種型態來實施。
[實施例]
在此針對第1至第3實施型態之晶圓支持構造體10,30,40及習知之晶圓支持構造體100，測定以電漿加熱時的晶圓W的溫度及溫度分佈。
晶圓支持構造體10對直流電源DC1,DC2,DC3分別施加-500V,+500V,-2.5kV的電壓。晶圓支持構造體30對直流電源DC1,DC2,DC3,DC4分別施加-500V,+500V,-2.5kV,+2.5kV的電壓。晶圓支持構造體40對直流電源DC1施加 -2.5kV的電壓。晶圓支持構造體100對直流電源DC1,DC2分別施加-500V,+500V的電壓。在此種施加電壓的狀態下，針對各晶圓支持構造體10,30,40,100，將電壓加熱設定為1kW，將基座平板20的溫度控制在40℃。此外，在基座平板20的下面安裝鋁合金冷卻板，在鋁合金冷卻板的內部有冷卻液在循環。然後，在設置於托盤平板12之晶圓載置部14的7個晶圓W的溫度的平均值與各晶圓W的溫度分佈(最高溫度與最低溫度的差)中測定最大值。該結果表示於表1。如表1所示，第1至第3實施型態之晶圓支持構造體10,30,40相較於習知之晶圓支持構造體100，可降低晶圓W的溫度，並且，可將晶圓W的溫度分佈抑制得比較小。
本說明書的申請是以2015年1月20日所申請的美國準申請第62/105371號為優先權主張的基礎，透過引用，其內容皆包含在本說明書中。
此外，本發明不以上述實施例為限。
本發明可應用於對晶圓進行成膜、蝕刻等的晶圓處理裝置。
10‧‧‧晶圓支持構造體
12‧‧‧托盤平板
14‧‧‧晶圓載置部
16‧‧‧鍍層
17‧‧‧供電插銷
18‧‧‧托盤側電極
20‧‧‧基座平板
22‧‧‧基座側電極
22a‧‧‧櫛齒負極
22b‧‧‧櫛齒正極
24a‧‧‧供電插銷
24b‧‧‧供電插銷
26‧‧‧絕緣袖套
W‧‧‧晶圓

Claims (8)

  1. 一種晶圓支持構造體，包括複數個用來載置晶圓之晶圓載置部的陶瓷製之托盤基板配置於陶瓷製之基座平板之上面，其中，上述基座平板內建有基座側電極，上述托盤平板內建有托盤側電極，於上述晶圓載置部上載置有上述晶圓的狀態下，調整施加於上述基座側電極及上述托盤側電極的電壓，藉此，產生上述基座平板與上述托盤平板之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。
  2. 如申請專利範圍第1項之晶圓支持構造體，其中，上述托盤平板於與上述基座平板相向的那面上具有金屬層，於上述晶圓載置部上載置有上述晶圓的狀態下，對上述基座側電極及上述托盤側電極兩方施加電壓，藉此，產生上述基座平板與上述托盤平板之上述金屬層之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。
  3. 如申請專利範圍第1項之晶圓支持構造體，其中，上述托盤平板於與上述基座平板相向的那面上不具有金屬層，於上述晶圓載置部上載置有上述晶圓的狀態下，對上述托盤側電極施加電壓，藉此，產生上述基座平板與上述托盤平板之間相互吸引的靜電力，並產生上述托盤平板與上述晶圓之間相互吸引的靜電力。
  4. 如申請專利範圍第1至3項中任一項之晶圓支持構造體， 其中，上述托盤側電極埋設於距離上述晶圓載置部表面0.35±0.05mm的位置。
  5. 如申請專利範圍第1至3項中任一項之晶圓支持構造體，其中，上述基座側電極埋設於距離上述基座平板的上面1±0.5mm的位置。
  6. 如申請專利範圍第1至3項中任一項之晶圓支持構造體，其中，在上述基座平板設有貫通上述基座平板的絕緣袖套，上述托盤側電極藉由插通上述絕緣袖套的供電插銷而供電。
  7. 如申請專利範圍第1至3項中任一項之晶圓支持構造體，其中，上述托盤平板為三氧化二鋁製，上述基座平板為氮化鋁製。
  8. 如申請專利範圍第1至3項中任一項之晶圓支持構造體，其中，上述托盤側電極為具有負極與正極的雙極構造，各晶圓載置部上的上述負極與上述正極的面積比為0.7~1：0.7~1。
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