TWI581334B - 沉積二氧化矽膜的方法 - Google Patents
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Description
本發明有關使用電漿增強化學氣相沈積法(PECVD),更特別地使用正矽酸乙酯(TEOS),沈積二氧化矽膜之方法。
從正矽酸乙酯以及氧中沈積二氧化矽係已知之技術。然而,當沈積溫度為300℃或更低時,所產生之二氧化矽層易潮溼再吸水。此導致隨著時間漏電分解以及分離之特性。
因為於矽晶圓上,矽穿孔(TSV)之需求增加,因此降低沈積溫度之需求隨之而來。有許多可與矽穿孔(TSV)一起使用之可能的積體架構,其等之一些需要使用非永久的結合矽晶圓至載體晶圓。結合黏著劑會限制二氧化矽沈積之溫度,因為結合材料在目前用於沈積二氧化矽之溫度下可能會分解。
歐洲專利申請案第10275131.0號描述一種在沈積膜上進行氫電漿處理,以改良該膜之表面上之Si-H鍵結。此在200℃或更低的溫度下進行。然而,製造具有TSV之晶圓,需要更低的沈積以及電漿處理溫度。
因此,需要提供一種可在比先前所進行更低的溫
度下進行,且可克服有關濕氣再吸收之問題之氧化矽沈積之方法。
本發明提供一種在包括供給TEOS、氧或其來源以及氫作為前趨物之室中,使用PECVD,沈積二氧化矽之方法。
與沒有包括氫之沈積循環相比,在沈積循環中併入氫作為活性氣體,在二氧化矽膜之特性方面,產生顯著的改善。
本發明可在任何適合的溫度下,甚至可在高溫下進行。在一具體例中,該室之溫度介於100℃與500℃之間。在另外的具體例中,該室之溫度介於100℃與250℃之間。在又另外的具體例中,該室之溫度介於125℃與175℃之間。此等較低的溫度適合用於製造具有TSV之晶圓。
可使用純氧作為前趨氣體,或可使用氧來源,諸如用N2O代替。氦係作為TEOS之運載氣體。
雖然可使用任何適量數量之前趨物,但本發明人使用之O2:TEOS之比例為10-20:1,以體積流量單位計。
在此所揭示之方法製得之膜,可進一步經歷在歐洲專利申請案第10275131.0號中所述之氫電漿後沈積處理步驟之處理。此步驟另外會抑制濕氣之再吸收以及減少漏電。
在一具體例中,該電漿是RF誘導的電漿。該電漿可由高頻成分以及低頻成分產生。該高頻成分是
13.56MHz,功率選擇之範圍從600-1200W,該低頻成分是375KHz,功率選擇之範圍從300-500W。
在一具體例中,使用蓮蓬式噴頭提供該前趨物至該室中。該蓮蓬式噴頭可為RF驅動的蓮蓬式噴頭,用於提供RF功率給該電漿。較佳地,該RF驅動的蓮蓬式噴頭是使用高頻成分以及低頻成分驅動。該高頻成分是13.56MHz,功率選擇之範圍從600-1200W,該低頻成分是375KHz至2MHz,功率選擇之範圍從300-500W。
10‧‧‧裝置
11‧‧‧室
12‧‧‧蓮蓬式噴頭
13‧‧‧晶圓支撐件
14‧‧‧高頻來源
15‧‧‧低頻來源
16、17‧‧‧匹配元件
18‧‧‧幫浦出口
本發明可以各種方法進行,現在將參照所附之圖式,以例示之方法說明特別的具體例。
圖1a以及圖1b分別顯示方法A以及B產生之膜,隨時間改變之FTIR光譜。
圖2a顯示由方法A製成之膜之漏電圖。圖2b顯示方法B中已進行氫電漿後沈積處理製成之膜之漏電圖。圖2c顯示方法B中沒有進行氫電漿後沈積處理製成之膜之漏電圖。
圖3a顯示由方法C製得之膜(即,在沈積方法中含有氫)中,漏電隨著所施與之電場改變之圖。
圖3b顯示與方法C之相似,但在該沈積方法中沒有氫參與之方法,漏電隨著時間改變之圖。
圖4顯示用於沈積裝置之概略圖。
使用一種裝置,使用下列方法條件進行一系列之實驗。
方法A:室壓力2000mT、1500sccm O2,0 H2;66sccm TEOS於1000sccm He中,666W高頻,334W低頻,溫度125℃。
方法B:室壓力3100mT,2300sccm O2,155sccm TEOS於2000sccm He中,溫度125℃,1000sccm H2,高頻900W,低頻400W。
方法C:室壓力2500mT,2300sccm O2,750sccm H2,溫度175℃,155sccm TEOS於500sccm He中,高頻1320W,低頻495W。
方法A、B以及C之沈積速率分別為298nm/min、709nm/min以及702nm/min。
圖1a顯示方法A製得之膜,在沈積時以及一週後擷取之FTIR光譜。可見到,在890cm-1以及3400cm-1之波峰,在一週後變寬。此變寬指出,低程度的濕氣吸收。圖1b顯示方法B製得之膜之FTIR光譜。可見到,在890cm-1以及3400cm-1之波峰沒有任何移位,指出沒有檢測到濕氣吸收。方法A以及B二者,最後在與沈積製程相同之溫度下,進行氫電漿後沈積處理步驟。
圖2a顯示使用方法A製得之膜,經氫電漿後沈積處理之漏電對施與的電場以及曝露於大氣之圖。在6MV/cm周圍可見到小量的升高,但在2MV/cm沒有移位,其為可用裝置可運作之圖。圖2b顯示使用方法B製得之膜,之後進行氫電漿後沈積處理步驟之漏電圖。可見到,在2MV/cm之漏電沒有位移。圖2c顯示使用方法B製得之膜,之後沒有進行
氫電漿後沈積處理步驟之漏電圖。可見到,不管是否缺少此步驟,當與方法A相比,漏電特性均有改善。
以上表1進一步證明圖2a、2b以及2c中所示之方法之結果。在該表中亦顯示使用方法A,但沒有氫電漿後沈積步驟之實驗結果。
圖3a顯示方法C製得之膜中,漏電隨著施與之電場改變之圖。圖3b顯示與方法C相似,但在沈積過程中沒有氫參與之方法,漏電隨著時間改變之圖。從此二個圖中可見,當在提高溫度下之沈積過程中使用氫時,二氧化矽膜之漏電特性得到改善。
圖4顯示用於進行本發明之具體例之概略裝置。裝置10包含室11、蓮蓬式噴頭12、晶圓支撐件13以及各別的高與低頻來源14以及15。蓮蓬式噴頭12安裝成可接收三種前趨物(TEOS於氦中、O2或其來源以及H2)。分別提供匹配元件16以及17,供用於高以及低頻來源14以及15,以及幫浦出口18,提供用於移除剩餘反應氣體。
已示範在沈積循環中使用H2作為活性氣體沈積
之二氧化矽(TEOS基)膜。此外,該方法具有高沈積速率之優點,且可在低溫下,以及比標準溫度高之溫度下進行。與之前已知之方法A製得之膜相比,由於缺少濕氣吸收,在沈積階段添加氫,使膜之電氣特性得到改善,且確保其等隨著時間仍保持安定。此外,本發明人相信,在沈積過程中包括氫,有助於該膜之原位緻密化。在表1中可見,此緻密化會增加折射指數以及抗壓強度。
藉由包括氫電漿後沈積步驟,進一步減少了一開始的漏電且抑制了濕氣再吸收。
為避免不確定性,當在此提到特徵“包括”一或多種元件時,本發明之說明書亦包括在其範疇內提到之特徵“包含”該元件、“基本上由該元件構成”以及“由該元件構成”。
10‧‧‧裝置
11‧‧‧室
12‧‧‧蓮蓬式噴頭
13‧‧‧晶圓支撐件
14‧‧‧高頻來源
15‧‧‧低頻來源
16、17‧‧‧匹配元件
18‧‧‧幫浦出口
Claims (12)
- 一種在基材上沈積二氧化矽薄膜之方法,其包括下列步驟:提供前趨物至一含有該基材之室中,以及使用電漿增強化學氣相沈積法,在該基材上沈積該二氧化矽,其中該前趨物包括由一運載氣體提供的正矽酸乙酯(TEOS)、氧或其來源以及氫,其中該二氧化矽在100以及250℃間之溫度下沈積,且其中TEOS的運載氣體至該室的流量率與氫氣至該室的流量率的比值係在0.67:1和2:1間的範圍內。
- 如申請專利範圍第1項之方法,其中該二氧化矽薄膜在125至175℃下沈積。
- 如申請專利範圍第1項之方法,其中該沈積的二氧化矽薄膜,經歷氫電漿後沈積處理步驟。
- 如申請專利範圍第3項之方法,其中該氫電漿後沈積處理在破除真空後進行。
- 如申請專利範圍第3或4項之方法,其中該氫電漿處理在與沈積該二氧化矽相同之溫度下進行。
- 如申請專利範圍第3項之方法,其中該電漿係由高頻RF成分以及低頻RF成分產生。
- 如申請專利範圍第1項之方法,其中該前趨物係利用蓮蓬式噴頭供給至該室。
- 如申請專利範圍第7項之方法,其中該蓮蓬式噴頭提供RF功率給該電漿。
- 如申請專利範圍第8項之方法,其中使用具有高頻以及低頻成分之RF驅動的蓮蓬式噴頭,沈積該前趨物。
- 如申請專利範圍第9項之方法,其中該高頻成分是13.56MHz,且該功率選擇之範圍從600至1200W,以及該低頻成分是350KHz至2MHz,且該功率選擇之範圍從300至500W。
- 一種實質上如在此之前所述以及參考所附之圖式之方法。
- 一種二氧化矽薄膜,其由如前述申請專利範圍中任一項之方法製得。
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JP6183965B2 (ja) * | 2014-03-27 | 2017-08-23 | Sppテクノロジーズ株式会社 | シリコン酸化膜及びその製造方法、並びにシリコン酸化膜の製造装置 |
US9460915B2 (en) * | 2014-09-12 | 2016-10-04 | Lam Research Corporation | Systems and methods for reducing backside deposition and mitigating thickness changes at substrate edges |
CN105063576A (zh) * | 2015-08-24 | 2015-11-18 | 沈阳拓荆科技有限公司 | 一种采用teos源的低温镀膜方法 |
GB201522552D0 (en) * | 2015-12-21 | 2016-02-03 | Spts Technologies Ltd | Method of improving adhesion |
US10032868B2 (en) * | 2016-09-09 | 2018-07-24 | Texas Instruments Incorporated | High performance super-beta NPN (SBNPN) |
US10358717B2 (en) * | 2017-04-21 | 2019-07-23 | Lam Research Corporation | Method for depositing high deposition rate, thick tetraethyl orthosilicate film with low compressive stress, high film stability and low shrinkage |
KR102364476B1 (ko) * | 2020-05-08 | 2022-02-18 | 주식회사 한솔케미칼 | 실리콘 전구체 및 이를 이용한 실리콘 함유 박막의 제조방법 |
CN112342531A (zh) * | 2020-10-19 | 2021-02-09 | 绍兴同芯成集成电路有限公司 | 一种利用低频射频电浆制备ild绝缘层的晶圆制造工艺 |
CN113667964B (zh) * | 2021-08-31 | 2023-01-20 | 陛通半导体设备(苏州)有限公司 | Teos膜的制作方法 |
CN114000123A (zh) * | 2021-11-02 | 2022-02-01 | 浙江光特科技有限公司 | 一种制备SiO2薄膜的方法、芯片及装置 |
GB202213794D0 (en) * | 2022-09-21 | 2022-11-02 | Spts Technologies Ltd | Deposition of thick layers of silicon dioxide |
CN116804270B (zh) * | 2023-08-29 | 2023-11-10 | 上海陛通半导体能源科技股份有限公司 | 二氧化硅薄膜的低温沉积方法及器件制备方法 |
CN117888080A (zh) * | 2024-03-14 | 2024-04-16 | 之江实验室 | 二氧化硅薄膜及其制备方法 |
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