TWI565021B - 連接器總成及其製造方法 - Google Patents

連接器總成及其製造方法 Download PDF

Info

Publication number
TWI565021B
TWI565021B TW100121479A TW100121479A TWI565021B TW I565021 B TWI565021 B TW I565021B TW 100121479 A TW100121479 A TW 100121479A TW 100121479 A TW100121479 A TW 100121479A TW I565021 B TWI565021 B TW I565021B
Authority
TW
Taiwan
Prior art keywords
electrically insulating
insulating material
electrical connector
connector assembly
connector
Prior art date
Application number
TW100121479A
Other languages
English (en)
Other versions
TW201222757A (en
Inventor
舒泰許 克里斯南
王順偉
Original Assignee
半導體組件工業公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 半導體組件工業公司 filed Critical 半導體組件工業公司
Publication of TW201222757A publication Critical patent/TW201222757A/zh
Application granted granted Critical
Publication of TWI565021B publication Critical patent/TWI565021B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/41Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074Stacked arrangements of non-apertured devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32235Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32238Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/37124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • H01L2224/376Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37601Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/37611Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • H01L2224/376Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/37624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • H01L2224/376Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37639Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • H01L2224/376Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • H01L2224/376Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4007Shape of bonding interfaces, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40105Connecting bonding areas at different heights
    • H01L2224/40106Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/40227Connecting the strap to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/41Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H01L2224/4101Structure
    • H01L2224/4103Connectors having different sizes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/41Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H01L2224/4105Shape
    • H01L2224/41051Connectors having different shapes
    • H01L2224/41052Different loop heights
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45014Ribbon connectors, e.g. rectangular cross-section
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49112Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting a common bonding area on the semiconductor or solid-state body to different bonding areas outside the body, e.g. diverging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73221Strap and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73263Layer and strap connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85423Magnesium (Mg) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.

Description

連接器總成及其製造方法
本發明一般而言係關於電子器件,且更特定言之係關於連接器總成。
在過去,半導體工業在一保護結構(例如,諸如一模製化合物)內製造包括一單一半導體晶粒之半導體組件。各種類型之半導體組件係安裝至含有容許該等半導體組件彼此通信之互連結構之一印刷電路板。隨著對於電子裝置之更多功能性之需求之增加,其變得期望在印刷電路板上包含更多半導體組件。因此,半導體製造商已努力製造具有更小輪廓及安裝覆蓋區之半導體組件。
在一些實施例中,半導體晶粒以附接至該半導體晶粒之黏著劑材料之一插入層垂直堆疊於彼此之頂部上以將晶粒接合在一起以形成一多晶片或多晶粒結構。該多晶片結構係附接至一玻璃環氧類型印刷電路板基板或其他類似基板。接著該半導體晶粒線接合至該基板以在該基板與該半導體晶粒之間形成電互連。此一封裝組態之一實例係揭示於在2003年11月18日頒予Thomas B.Glenn等人之美國專利第6,650,019號中。具有經堆疊積體電路晶粒之一電子總成之另一實例係揭示於在2006年4月18日頒予Todd P.Oman之美國專利第7,030,317號中。
關於堆疊半導體晶粒之缺點包含在半導體晶粒之間形成電互連及移除來自該經堆疊結構之熱。
因此,具有適於在半導體晶粒與半導體組件之間傳輸電信號且提供來自半導體晶粒之充足熱消散之一連接器總成係有利的。其將進一步有利於具有成本及時間效應而實施該電子總成及方法。
在一實施例中,一種連接器總成包括具有第一端與第二端及第一表面與第二表面之一第一電連接器;及在該第一端處的該第一表面上的一第一電絕緣材料。
在另一實施例中,一種用於製造一連接器總成之方法,包括提供具有第一表面與第二表面及第一端與第二端之一電連接器;及在該第一端處的該第一表面之一部分上形成一電絕緣材料。
從結合附圖閱讀以下詳細描述將更好地理解本發明,其中相同參考符號指明相同元件。
一般而言,本發明提供一種連接器總成及一種用於製造該連接器總成之方法。根據本發明之實施例,一連接器總成包括具有相對表面及相對端之一電連接器。一中心區域係在該等相對端之間。一電絕緣材料係形成於該電連接器之該等端之一者中的一表面上。或者,電絕緣材料可形成於該第一端及該第二端中的相對表面上。
圖1係根據本發明之一實施例之一連接器總成400之一側視圖。圖1中展示具有相對表面404及406、端區域或部分408及412及一中心區域或部分410之一矩形形狀電連接器 402。舉例而言,電連接器402包括銅。用於電連接器402之其他合適材料包含鋁、錫、鋼、塗覆有貴金屬之一金屬夾子、銅合金、鈹、金、銀、鋁合金、黃銅、黃銅合金或類似物。電連接器402可自(例如)具有從約150微米(μm)至約250微米之一厚度範圍之一銅片蝕刻或切割。
在端區域412中的表面404上形成具有從約50微米至約100微米之一厚度範圍之一電絕緣材料414之一層。電絕緣材料414可為氧化鋁、氮化物、一熱絕緣材料、陶瓷或類似物。或者,可將端區域412中的表面404進行陽極氧化。
圖2係根據本發明之另一實施例之一連接器總成416之一側視圖。連接器總成416類似於連接器總成400,但是包含形成於端區域412中的表面406上的一電絕緣材料418之一層。電絕緣材料418可與電絕緣材料414相同或其可不同於電絕緣材料414。或者,可陽極氧化端區域412中的表面404及406。
圖3係根據本發明之另一實施例之一連接器總成420之一截面圖。圖3中展示具有相對表面424及426、端區域或部分428及432及一中心區域或部分430之一基板422。基板422較佳地係由一樹脂(諸如環氧、聚醯亞胺、三嗪,或酚醛樹脂、雙馬來醯亞胺三嗪(BT)樹脂、環氧玻璃複合物)、印刷電路板(PCB)材料、FR-4、陶瓷或類似物形成。或者,基板422可由彎曲板材料或一選擇性陽極氧化A1基板組成。在基板422中形成一導電互連層434。形成一導電接觸件436以與端區域428中的互連層434之一部分接觸且 形成一導電接觸件438以與端區域432中的互連層434之一部分接觸。導電接觸件436及438可藉由使用平版印刷技術、網板印刷、至端區域428及432中的互連層434之部分上的沈積或類似物圖案化傳導箔而形成。
儘管連接器總成420展示為分別具有端區域428及432中的導電接觸件436及438,但是此不為本發明之一限制。或者,端區域432可能不存在導電接觸件438或端區域428可能不存在導電接觸件436。
圖4係根據本發明之另一實施例之一連接器總成440之一側視圖。圖4中展示具有相對表面444及446、端區域或部分448及452及一中心區域或部分450之一矩形形狀電連接器442。舉例而言,電連接器442包括銅。用於電連接器442之其他合適材料包含鋁、錫、鋼、塗覆有貴金屬之一金屬夾子、銅合金、鈹、金、銀、鋁合金、黃銅、黃銅合金或類似物。電連接器442可自(例如)具有從約150微米至約200微米之一厚度範圍之一銅片蝕刻或切割及衝鍛或壓印使得端區域448係在由虛線456所識別之一水平面中且端區域452係在由虛線458所識別之一水平面中。由虛線456及458所識別之水平面較佳地係在一垂直方向上彼此隔開。
在端區域452中的表面446之一部分上形成具有從約50微米至約100微米之一厚度範圍之一電絕緣材料454之一層。或者,可在大體上端區域452中的表面446之所有部分上形成電絕緣材料454之層。電絕緣材料454可為氧化鋁、氮化 物、一熱絕緣材料、陶瓷或類似物。或者,可陽極氧化區域452中的表面446。
圖5係圖4中所展示之連接器總成440之一實施例之一俯視圖。圖5中展示具有表面444及藉由中心區域450而彼此連接之端區域448及452之電連接器442。一凹口460自端區域452之一端延伸至端區域452中,凹口460延伸至其中之電連接器442之部分可稱為一主體區域。端區域448與中心區域450交會之區域係藉由虛線462所識別且端區域450與端區域452交會之區域係藉由虛線464所識別。
應注意,凹口460為任選且可能不存在於電連接器440。
圖6至圖8繪示根據本發明之另一實施例之一連接器總成470。圖6及圖7係連接器總成470之等角視圖及圖8係連接器總成470之一側視圖。為了簡潔起見,將一起描述圖6至圖8。圖6至圖8中展示包括具有相對表面474及476、端區域或部分478及482及一中心區域或部分480之一電連接器472之連接器總成470。舉例而言,電連接器472包括銅。用於電連接器472之其他合適材料包含鋁、錫、鋼、塗覆有貴金屬之一金屬夾子、銅合金、鈹、金、銀、鋁合金、黃銅、黃銅合金或類似物。電連接器472可自(例如)具有從約150微米(μm)至約200微米之一厚度範圍之一銅片蝕刻或切割及衝鍛或壓印使得端區域478係在由虛線486所識別之一水平面中且端區域482係在由虛線488所識別之一水平面中。虛線486及488所定位之水平面較佳地係在一垂直方向上彼此隔開。
中心區域480包括藉由一中心子區域492連接在一起之端子區域490及494。子區域490之一端496交會端區域478且子區域490之一端498交會中心子區域492之一端500。中心子區域492之一端502交會子區域494之一端504且子區域494之一端506交會端區域482之一端508。中心子區域492係在藉由虛線510所識別之一水平面中。較佳地,虛線488所定位之水平面係在虛線486及510所定位之水平面之間且與虛線486及510所定位之水平面垂直隔開,亦即,端區域482係在虛線486及510所定位之水平面之間且與虛線486及510所定位之水平面垂直隔開之一水平面中。
在端區域482中的表面474之一部分上形成具有從約50微米至約100微米之一厚度範圍之一電絕緣材料512之一層。或者,可在大體上端區域482中的表面474之所有部分上形成電絕緣材料512之層。電絕緣材料512可為氧化鋁、氮化物、一熱絕緣材料、陶瓷或類似物。或者,可不存在電絕緣層512且可將端區域482中的表面474之一部分或整個表面474進行陽極氧化。
一凹口514延伸至端區域482中。凹口514延伸至其中之電連接器472之部分可稱為一主體區域。
圖9係不存在凹口514之一連接器總成470A之一等角視圖。已對參考符號470附加參考符號「A」以區別具有一凹口之一連接器總成與不具有一凹口之一連接器總成。
圖10係在端區域482中的表面474上形成電絕緣材料512A之一層之一連接器總成470A之一等角視圖。或者,圖9及 圖10中所示之連接器總成470A不存在電絕緣材料512之層且可將端區域482中的表面474進行陽極氧化。
圖11及圖12係根據本發明之另一實施例之包括一電連接器522之一連接器總成520之等角視圖。電連接器522具有相對表面524及526、端區域或部分528及532及一中心區域或部分530且包括鋁。將端區域532中的表面526進行陽極氧化以形成具有從約50微米至約100微米之一厚度範圍之氧化鋁層534。應注意,可將端區域532中的表面526之一部分或大體上端區域532中的整個表面526進行陽極氧化。
圖13係根據本發明之另一實施例之一連接器總成550之一等角視圖。圖13中展示包括具有相對表面474及476、端區域或部分478及482及一中心區域或部分480之一電連接器472之連接器總成550。參照圖6至圖8已描述電連接器472。
在端區域482中的表面476上形成具有從約50微米至100微米之一厚度範圍之一電絕緣材料552之一層。電絕緣材料552可為氧化鋁、氮化物、一熱絕緣材料、陶瓷或類似物。或者,可將端區域482中的表面474進行陽極氧化。根據電連接器472為鋁之實施例,陽極氧化表面474自表面474形成氧化鋁。
一電連接器472A係耦合至電絕緣層552以形成連接器總成550。更特定言之,端區域482中的表面474。已對參考符號472附加參考符號「A」以區別形成連接器總成550之兩個電連接器。堆疊於彼此上以形成一連接器總成之電連 接器472之數量不為本發明之一限制。
如今,應瞭解,已提供一種連接器總成及一種用於製造該連接器總成之方法。根據本發明之實施例,該連接器總成包括具有相對端及相對表面之一電連接器。一電絕緣材料可形成於該電連接器之一端或兩端中之一表面或兩個表面之部分上。該連接器總成可用於形成具有經堆疊半導體晶粒之半導體組件。該連接器總成容許堆疊半導體晶粒,藉此減小一印刷電路板上之覆蓋區且容許有效率地移除來自半導體組件之熱。
儘管已在本文中揭示特定實施例,但是不意欲將本發明限於所揭示之實施例。熟習此項技術者將認知,在不脫離本發明之精神之情況下,可作修改及變更。本發明意欲包含如落入附加申請專利範圍之範疇內之所有此等修改及變更。
400‧‧‧連接器總成
402‧‧‧電連接器
404‧‧‧表面
406‧‧‧表面
408‧‧‧端區域/部分
410‧‧‧中心區域/部分
412‧‧‧端區域/部分
414‧‧‧電絕緣材料
416‧‧‧連接器總成
418‧‧‧電絕緣材料
420‧‧‧連接器總成
422‧‧‧基板
424‧‧‧表面
426‧‧‧表面
428‧‧‧端區域/部分
430‧‧‧中心區域/部分
432‧‧‧端區域/部分
434‧‧‧導電互連層
436‧‧‧導電接觸件
438‧‧‧導電接觸件
440‧‧‧連接器總成
444‧‧‧表面
446‧‧‧表面
448‧‧‧端區域/部分
450‧‧‧中心區域/部分
452‧‧‧端區域/部分
454‧‧‧電絕緣材料
456‧‧‧虛線
458‧‧‧虛線
460‧‧‧凹口
462‧‧‧虛線
464‧‧‧虛線
470‧‧‧連接器總成
470A‧‧‧連接器總成
472‧‧‧電連接器
472A‧‧‧電連接器
474‧‧‧表面
476‧‧‧表面
478‧‧‧端區域/部分
480‧‧‧中心區域/部分
482‧‧‧端區域/部分
486‧‧‧虛線
488‧‧‧虛線
490‧‧‧端子區域
492‧‧‧中心子區域
494‧‧‧端子區域
496‧‧‧端
498‧‧‧端
500‧‧‧端
502‧‧‧端
504‧‧‧端
506‧‧‧端
508‧‧‧端
510‧‧‧虛線
512‧‧‧電絕緣材料
514‧‧‧凹口
520‧‧‧連接器總成
522‧‧‧電連接器
524‧‧‧表面
526‧‧‧表面
528‧‧‧端區域/部分
530‧‧‧中心區域/部分
532‧‧‧端區域/部分
534‧‧‧氧化鋁層
550‧‧‧連接器總成
552‧‧‧電絕緣材料
圖1係根據本發明之實施例之一連接器總成之一部分之一側視圖;圖2係根據本發明之實施例之一連接器總成之一部分之一側視圖;圖3係根據本發明之實施例之一連接器總成之一部分之一截面圖;圖4係根據本發明之實施例之一連接器總成之一部分之一側視圖;圖5係圖4之連接器總成之部分之一俯視圖; 圖6係根據本發明之實施例之連接器總成之一等角視圖;圖7係在相對於圖6中所示之定向之一顛倒定向中的圖6之連接器總成之一等角視圖;圖8係圖6及圖7之連接器總成之一側視圖;圖9係根據本發明之實施例之連接器總成之一等角視圖;圖10係在相對於圖9中所示之定向之一顛倒定向中的圖9之連接器總成之一等角視圖;圖11係根據本發明之實施例之連接器總成之一等角視圖;圖12係在相對於圖11中所示之定向之一顛倒定向中的圖11之連接器總成之一等角視圖;及圖13係根據本發明之實施例之一連接器總成之一等角視圖。
470‧‧‧連接器總成
472‧‧‧電連接器
478‧‧‧端區域/部分
480‧‧‧中心區域/部分
482‧‧‧端區域/部分
496‧‧‧端
500‧‧‧端
506‧‧‧端
508‧‧‧端
512‧‧‧電絕緣材料
514‧‧‧凹口

Claims (10)

  1. 一種連接器總成,其包括:一第一電連接器,其具有第一端與第二端及第一表面與第二表面;及一第一電絕緣材料,其在該第一端處位於該第一表面上,其中該第一電絕緣材料為自電絕緣材料群組選擇之一電絕緣材料,該電絕緣材料群組包括陶瓷、氮化物及一金屬基氧化物(metallic base oxide)。
  2. 如請求項1之連接器總成,其中該第一電連接器包括一導電材料。
  3. 如請求項1之連接器總成,其中該第一電絕緣材料為自電絕緣材料群組選擇之一電絕緣材料,該電絕緣材料群組包括陶瓷、一金屬基氧化物、氮化物及一導熱材料。
  4. 如請求項1之連接器總成,其進一步包含在該第一端處位於該第二表面上的一第二電絕緣材料。
  5. 如請求項1之連接器總成,其中該第一電連接器具有第一區段、第二區段及第三區段,該第一區段藉由該第二區段耦合至該第三區段,且其中該第一區段係在一第一水平面中且該第三區段係在一第二水平面中。
  6. 如請求項5之連接器總成,其中該第二區段包括:第一子區段、第二子區段及第三子區段,該第一子區段藉由該第二子區段耦合至該第三子區段,該第二子區段係在一第三水平面中,該第三水平面垂直地介於該第一水平面與該第二水平面之間。
  7. 如請求項1之連接器總成,其中該第一電連接器具有第一區段、第二區段及第三區段,該第一區段藉由該第二區段耦合至該第三區段,且其中該第三區段為平坦的,具有一主體部分、一端及自該端延伸至該主體部分中的一凹口,且進一步包括一第二電連接器,該第二電連接器耦合至在該第一電連接器處位於該第一端之該第一表面上的該第一電絕緣材料。
  8. 一種用於製造一連接器總成之方法,其包括:提供具有第一表面與第二表面及第一端與第二端之一電連接器;及在該第一端處位於該第一表面之一部分上形成一電絕緣材料,其中該電絕緣材料為自電絕緣材料群組選擇之一電絕緣材料,該電絕緣材料群組包括陶瓷、氮化物及金屬基氧化物(metallic base oxide)。
  9. 一種用於製造一連接器總成之方法,該方法包括:提供具有第一表面與第二表面及第一端與第二端之一第一電連接器,其中提供該第一電連接器包含形成該第一電連接器以具有在一第一水平面中之該第一端及在一第二水平面中之該第二端;及在該第一端處位於該第一表面之一部份上形成一電絕緣材料,其中該電絕緣材料為自電絕緣材料群組選擇之一電絕緣材料,該電絕緣材料群組包括陶瓷、氮化物及氧化物。
  10. 如請求項9之方法,其中提供該第一電連接器包含形成 該第一電連接器以具有在該第一端與該第二端之間之一中心區域,其中該中心區域包含位於一第三水平面中的一部分,該第三水平面在該第一水平面與該第二水平面之間,且進一步包含將一第二電連接器耦合至在該第一電連接器之該第一端處位於該第一表面之該部分上的該電絕緣材料。
TW100121479A 2010-09-15 2011-06-20 連接器總成及其製造方法 TWI565021B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2010004311A MY166609A (en) 2010-09-15 2010-09-15 Connector assembly and method of manufacture

Publications (2)

Publication Number Publication Date
TW201222757A TW201222757A (en) 2012-06-01
TWI565021B true TWI565021B (zh) 2017-01-01

Family

ID=45806551

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100121479A TWI565021B (zh) 2010-09-15 2011-06-20 連接器總成及其製造方法

Country Status (6)

Country Link
US (2) US8451621B2 (zh)
CN (1) CN102403278B (zh)
HK (1) HK1168195A1 (zh)
MY (1) MY166609A (zh)
SG (1) SG179333A1 (zh)
TW (1) TWI565021B (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9048338B2 (en) * 2011-11-04 2015-06-02 Infineon Technologies Ag Device including two power semiconductor chips and manufacturing thereof
US10128219B2 (en) * 2012-04-25 2018-11-13 Texas Instruments Incorporated Multi-chip module including stacked power devices with metal clip
US9078380B2 (en) * 2012-10-19 2015-07-07 Nvidia Corporation MOSFET stack package
US9470720B2 (en) 2013-03-08 2016-10-18 Sandisk Technologies Llc Test system with localized heating and method of manufacture thereof
US10013033B2 (en) 2013-06-19 2018-07-03 Sandisk Technologies Llc Electronic assembly with thermal channel and method of manufacture thereof
US9313874B2 (en) 2013-06-19 2016-04-12 SMART Storage Systems, Inc. Electronic system with heat extraction and method of manufacture thereof
US9898056B2 (en) 2013-06-19 2018-02-20 Sandisk Technologies Llc Electronic assembly with thermal channel and method of manufacture thereof
US9549457B2 (en) 2014-02-12 2017-01-17 Sandisk Technologies Llc System and method for redirecting airflow across an electronic assembly
US9497889B2 (en) 2014-02-27 2016-11-15 Sandisk Technologies Llc Heat dissipation for substrate assemblies
US9519319B2 (en) 2014-03-14 2016-12-13 Sandisk Technologies Llc Self-supporting thermal tube structure for electronic assemblies
US9485851B2 (en) 2014-03-14 2016-11-01 Sandisk Technologies Llc Thermal tube assembly structures
US9348377B2 (en) * 2014-03-14 2016-05-24 Sandisk Enterprise Ip Llc Thermal isolation techniques
USD857420S1 (en) 2016-12-23 2019-08-27 Few Fahrzeugelektrikwerk Gmbh & Co. Kg Mounting device
DE102016125781A1 (de) * 2016-12-28 2018-06-28 Few Fahrzeugelektrikwerk Gmbh & Co. Kg Elektrisches Anschlusselement
TWI637476B (zh) * 2017-02-14 2018-10-01 來揚科技股份有限公司 雙晶片封裝結構
US11309273B2 (en) 2017-05-19 2022-04-19 Shindengen Electric Manufacturing Co., Ltd. Electronic module
JP6952042B2 (ja) * 2017-05-19 2021-10-20 新電元工業株式会社 電子モジュール
WO2019197304A1 (en) * 2018-04-11 2019-10-17 Abb Schweiz Ag Material reduced metallic plate on power semiconductor chip

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050017339A1 (en) * 2003-06-19 2005-01-27 Shigeharu Yoshiba Semiconductor device and switching element
US20050191913A1 (en) * 2004-02-27 2005-09-01 Farnworth Warren M. Electrical contacts, devices including the same, and associated methods of fabrication
TW200742122A (en) * 2005-07-12 2007-11-01 Lamina Ceramics Inc Surface mountable light emitting diode assemblies packaged for high temperature operation
TW200915587A (en) * 2007-07-13 2009-04-01 Miasole Photovoltaic module with integrated energy storage

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140580A (ja) * 1987-11-25 1989-06-01 Mitsubishi Electric Corp 接続用ジャンパとその製造方法
US5241134A (en) * 1990-09-17 1993-08-31 Yoo Clarence S Terminals of surface mount components
US5311401A (en) 1991-07-09 1994-05-10 Hughes Aircraft Company Stacked chip assembly and manufacturing method therefor
US5313096A (en) 1992-03-16 1994-05-17 Dense-Pac Microsystems, Inc. IC chip package having chip attached to and wire bonded within an overlying substrate
US5291061A (en) 1993-04-06 1994-03-01 Micron Semiconductor, Inc. Multi-chip stacked devices
US5532512A (en) 1994-10-03 1996-07-02 General Electric Company Direct stacked and flip chip power semiconductor device structures
US5796159A (en) * 1995-11-30 1998-08-18 Analog Devices, Inc. Thermally efficient integrated circuit package
DE19635582C1 (de) 1996-09-02 1998-02-19 Siemens Ag Leistungs-Halbleiterbauelement für Brückenschaltungen mit High- bzw. Low-Side-Schaltern
KR100304959B1 (ko) 1998-10-21 2001-09-24 김영환 칩 적층형 반도체 패키지 및 그 제조방법
US6291881B1 (en) * 1999-03-04 2001-09-18 United Microelectronics Corp. Dual silicon chip package
TW415056B (en) 1999-08-05 2000-12-11 Siliconware Precision Industries Co Ltd Multi-chip packaging structure
DE10009171B4 (de) 2000-02-26 2005-08-11 Robert Bosch Gmbh Stromrichter und sein Herstellverfahren
US6472758B1 (en) * 2000-07-20 2002-10-29 Amkor Technology, Inc. Semiconductor package including stacked semiconductor dies and bond wires
JP2002176137A (ja) 2000-09-28 2002-06-21 Toshiba Corp 積層型半導体デバイス
JP3802742B2 (ja) * 2000-10-06 2006-07-26 矢崎総業株式会社 シールドコネクタ
US6720643B1 (en) 2001-02-22 2004-04-13 Rambus, Inc. Stacked semiconductor module
TW498470B (en) 2001-05-25 2002-08-11 Siliconware Precision Industries Co Ltd Semiconductor packaging with stacked chips
JP4714371B2 (ja) * 2001-06-06 2011-06-29 ポリマテック株式会社 熱伝導性成形体及びその製造方法
TW587850U (en) * 2001-08-06 2004-05-11 Delta Electronics Inc Power supply device with a plug protection structure
US6979894B1 (en) 2001-09-27 2005-12-27 Marvell International Ltd. Integrated chip package having intermediate substrate
US6774475B2 (en) 2002-01-24 2004-08-10 International Business Machines Corporation Vertically stacked memory chips in FBGA packages
US7095053B2 (en) 2003-05-05 2006-08-22 Lamina Ceramics, Inc. Light emitting diodes packaged for high temperature operation
US7005734B2 (en) 2003-05-05 2006-02-28 Ixys Corporation Double-sided cooling isolated packaged power semiconductor device
US7193307B2 (en) 2004-03-25 2007-03-20 Ault Incorporated Multi-layer FET array and method of fabricating
JP2005302951A (ja) 2004-04-09 2005-10-27 Toshiba Corp 電力用半導体装置パッケージ
US7898092B2 (en) 2007-11-21 2011-03-01 Alpha & Omega Semiconductor, Stacked-die package for battery power management
US7598600B2 (en) 2005-03-30 2009-10-06 Stats Chippac Ltd. Stackable power semiconductor package system
JP4309368B2 (ja) * 2005-03-30 2009-08-05 エルピーダメモリ株式会社 半導体記憶装置
US7030317B1 (en) * 2005-04-13 2006-04-18 Delphi Technologies, Inc. Electronic assembly with stacked integrated circuit die
US7615854B2 (en) * 2005-11-03 2009-11-10 International Rectifier Corporation Semiconductor package that includes stacked semiconductor die
DE102006002381B3 (de) 2006-01-17 2007-07-19 Infineon Technologies Ag Leistungshalbleiterbauteil mit Chipstapel und Verfahren zu seiner Herstellung
US7569920B2 (en) 2006-05-10 2009-08-04 Infineon Technologies Ag Electronic component having at least one vertical semiconductor power transistor
US7485954B2 (en) 2006-09-07 2009-02-03 Alpha And Omega Semiconductor Limited Stacked dual MOSFET package
JP2008108675A (ja) * 2006-10-27 2008-05-08 Toshiba Corp プラグ
US7932586B2 (en) * 2006-12-18 2011-04-26 Mediatek Inc. Leadframe on heat sink (LOHS) semiconductor packages and fabrication methods thereof
TWI327359B (en) 2007-02-13 2010-07-11 Advanced Semiconductor Eng Stacked semiconductor package
JP2009094152A (ja) * 2007-10-04 2009-04-30 Hitachi Ltd 半導体装置、その製造方法及び半導体搭載用フレキシブル基板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050017339A1 (en) * 2003-06-19 2005-01-27 Shigeharu Yoshiba Semiconductor device and switching element
US20050191913A1 (en) * 2004-02-27 2005-09-01 Farnworth Warren M. Electrical contacts, devices including the same, and associated methods of fabrication
TW200742122A (en) * 2005-07-12 2007-11-01 Lamina Ceramics Inc Surface mountable light emitting diode assemblies packaged for high temperature operation
TW200915587A (en) * 2007-07-13 2009-04-01 Miasole Photovoltaic module with integrated energy storage

Also Published As

Publication number Publication date
CN102403278B (zh) 2016-03-16
US8449339B2 (en) 2013-05-28
CN102403278A (zh) 2012-04-04
US8451621B2 (en) 2013-05-28
HK1168195A1 (zh) 2012-12-21
MY166609A (en) 2018-07-17
US20120064781A1 (en) 2012-03-15
US20120063107A1 (en) 2012-03-15
SG179333A1 (en) 2012-04-27
TW201222757A (en) 2012-06-01

Similar Documents

Publication Publication Date Title
TWI565021B (zh) 連接器總成及其製造方法
JP5485110B2 (ja) 配線基板及びその製造方法、電子装置
JP4775007B2 (ja) 半導体装置及びその製造方法
US7176062B1 (en) Lead-frame method and assembly for interconnecting circuits within a circuit module
US7312521B2 (en) Semiconductor device with holding member
US20060033112A1 (en) Substrate for light emitting diodes
KR101939864B1 (ko) 캐리어 장치, 캐리어 장치를 포함하는 전기 장치 및 이들의 제조 방법
JP2006060128A (ja) 半導体装置
KR20090122274A (ko) 미세 피치 마이크로 접촉부 및 그 형성 방법
CN105359632B (zh) 布线基板以及电子装置
US8110921B2 (en) Semiconductor package and method of manufacturing the same
KR100802267B1 (ko) Bga형 반도체 장치 및 그 제조 방법
JP2007027281A (ja) 半導体装置
JP6109078B2 (ja) リードクラックが強化された電子素子用テープ
US8304665B2 (en) Package substrate having landless conductive traces
US6833512B2 (en) Substrate board structure
US20200365418A1 (en) Printed wiring board and method for manufacturing printed wiring board
JPH07235618A (ja) 多端子半導体パッケージ
JP5868274B2 (ja) 配線基板およびそれを用いた電子装置
JP2011119481A5 (zh)
KR101814843B1 (ko) 인쇄회로기판 및 그의 제조 방법
CN110660896B (zh) 一种led封装结构及其封装方法
US20170062375A1 (en) Semiconductor device
JP2019062062A (ja) 配線基板、電子装置、及び、配線基板の製造方法
TWI315169B (en) Wiring substrate with improvement in tensile strength of traces