TWI555069B - 晶圓結構之電耦合 - Google Patents

晶圓結構之電耦合 Download PDF

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Publication number
TWI555069B
TWI555069B TW099142440A TW99142440A TWI555069B TW I555069 B TWI555069 B TW I555069B TW 099142440 A TW099142440 A TW 099142440A TW 99142440 A TW99142440 A TW 99142440A TW I555069 B TWI555069 B TW I555069B
Authority
TW
Taiwan
Prior art keywords
wafer
opening
width
conductive
forming
Prior art date
Application number
TW099142440A
Other languages
English (en)
Chinese (zh)
Other versions
TW201128691A (en
Inventor
劉連鈞
莉莎Ｈ 卡琳
艾倫Ｊ 麥納斯
Original Assignee
飛思卡爾半導體公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 飛思卡爾半導體公司 filed Critical 飛思卡爾半導體公司
Publication of TW201128691A publication Critical patent/TW201128691A/zh
Application granted granted Critical
Publication of TWI555069B publication Critical patent/TWI555069B/zh

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/261—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions
    • H10W42/276—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/09—Packages
    • B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
    • B81B2207/097—Interconnects arranged on the substrate or the lid, and covered by the package seal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/17—Containers or parts thereof characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/17—Containers or parts thereof characterised by their materials
    • H10W76/18—Insulating materials, e.g. resins, glasses or ceramics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Micromachines (AREA)
  • Dicing (AREA)
TW099142440A 2009-12-15 2010-12-06 晶圓結構之電耦合 TWI555069B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/638,424 US8138062B2 (en) 2009-12-15 2009-12-15 Electrical coupling of wafer structures

Publications (2)

Publication Number Publication Date
TW201128691A TW201128691A (en) 2011-08-16
TWI555069B true TWI555069B (zh) 2016-10-21

Family

ID=44143393

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099142440A TWI555069B (zh) 2009-12-15 2010-12-06 晶圓結構之電耦合

Country Status (5)

Country Link
US (1) US8138062B2 (https=)
JP (1) JP5721742B2 (https=)
CN (1) CN102656673B (https=)
TW (1) TWI555069B (https=)
WO (1) WO2011081741A2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8637981B2 (en) 2011-03-30 2014-01-28 International Rectifier Corporation Dual compartment semiconductor package with temperature sensor
US8633088B2 (en) 2012-04-30 2014-01-21 Freescale Semiconductor, Inc. Glass frit wafer bond protective structure
US9580302B2 (en) 2013-03-15 2017-02-28 Versana Micro Inc. Cell phone having a monolithically integrated multi-sensor device on a semiconductor substrate and method therefor
CN103466541B (zh) * 2013-09-12 2016-01-27 上海矽睿科技有限公司 晶圆级封装方法以及晶圆
US9630832B2 (en) * 2013-12-19 2017-04-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacturing
US9826630B2 (en) 2014-09-04 2017-11-21 Nxp Usa, Inc. Fan-out wafer level packages having preformed embedded ground plane connections and methods for the fabrication thereof
KR20180032985A (ko) 2016-09-23 2018-04-02 삼성전자주식회사 집적회로 패키지 및 그 제조 방법과 집적회로 패키지를 포함하는 웨어러블 디바이스
CN107827079B (zh) * 2017-11-17 2019-09-20 烟台睿创微纳技术股份有限公司 一种mems芯片的制作方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200601514A (en) * 2004-06-30 2006-01-01 Ind Tech Res Inst Apparatus and method for wafer level packaging
TW200727371A (en) * 2006-01-12 2007-07-16 Touch Micro System Tech Method for wafer level package and fabricating cap structures

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JP3613838B2 (ja) 1995-05-18 2005-01-26 株式会社デンソー 半導体装置の製造方法
US6762072B2 (en) * 2002-03-06 2004-07-13 Robert Bosch Gmbh SI wafer-cap wafer bonding method using local laser energy, device produced by the method, and system used in the method
SG111972A1 (en) 2002-10-17 2005-06-29 Agency Science Tech & Res Wafer-level package for micro-electro-mechanical systems
JP3905041B2 (ja) * 2003-01-07 2007-04-18 株式会社日立製作所 電子デバイスおよびその製造方法
US20040166662A1 (en) 2003-02-21 2004-08-26 Aptos Corporation MEMS wafer level chip scale package
JP4551638B2 (ja) * 2003-08-01 2010-09-29 富士フイルム株式会社 固体撮像装置の製造方法
DE10350460B4 (de) * 2003-10-29 2006-07-13 X-Fab Semiconductor Foundries Ag Verfahren zur Herstellung von mikromechanische und/ oder mikroelektronische Strukturen aufweisenden Halbleiterbauelementen, die durch das feste Verbinden von mindestens zwei Halbleiterscheiben entstehen, und entsprechende Anordnung
US7034393B2 (en) 2003-12-15 2006-04-25 Analog Devices, Inc. Semiconductor assembly with conductive rim and method of producing the same
US7495462B2 (en) 2005-03-24 2009-02-24 Memsic, Inc. Method of wafer-level packaging using low-aspect ratio through-wafer holes
US20080131662A1 (en) * 2006-12-05 2008-06-05 Jordan Larry L Alignment of a cap to a MEMS wafer
US20080191334A1 (en) 2007-02-12 2008-08-14 Visera Technologies Company Limited Glass dam structures for imaging devices chip scale package
US20080290430A1 (en) * 2007-05-25 2008-11-27 Freescale Semiconductor, Inc. Stress-Isolated MEMS Device and Method Therefor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200601514A (en) * 2004-06-30 2006-01-01 Ind Tech Res Inst Apparatus and method for wafer level packaging
TW200727371A (en) * 2006-01-12 2007-07-16 Touch Micro System Tech Method for wafer level package and fabricating cap structures

Also Published As

Publication number Publication date
TW201128691A (en) 2011-08-16
US8138062B2 (en) 2012-03-20
US20110143476A1 (en) 2011-06-16
WO2011081741A3 (en) 2011-09-09
JP5721742B2 (ja) 2015-05-20
JP2013513971A (ja) 2013-04-22
WO2011081741A2 (en) 2011-07-07
CN102656673B (zh) 2015-05-20
CN102656673A (zh) 2012-09-05

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