TWI544263B - 陣列基板及其製造方法 - Google Patents

陣列基板及其製造方法 Download PDF

Info

Publication number
TWI544263B
TWI544263B TW100139964A TW100139964A TWI544263B TW I544263 B TWI544263 B TW I544263B TW 100139964 A TW100139964 A TW 100139964A TW 100139964 A TW100139964 A TW 100139964A TW I544263 B TWI544263 B TW I544263B
Authority
TW
Taiwan
Prior art keywords
layer
gate
substrate
drain
organic insulating
Prior art date
Application number
TW100139964A
Other languages
English (en)
Other versions
TW201319698A (zh
Inventor
藍緯洲
辛哲宏
王裕霖
葉佳俊
Original Assignee
元太科技工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 元太科技工業股份有限公司 filed Critical 元太科技工業股份有限公司
Priority to TW100139964A priority Critical patent/TWI544263B/zh
Priority to CN201210005254.3A priority patent/CN103094203B/zh
Priority to US13/530,098 priority patent/US9165955B2/en
Publication of TW201319698A publication Critical patent/TW201319698A/zh
Priority to US14/845,291 priority patent/US9614101B2/en
Priority to US14/859,371 priority patent/US9564537B2/en
Application granted granted Critical
Publication of TWI544263B publication Critical patent/TWI544263B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/4763—Deposition of non-insulating, e.g. conductive -, resistive -, layers on insulating layers; After-treatment of these layers
    • H01L21/47635—After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Description

陣列基板及其製造方法
本發明是有關於一種陣列基板及其製造方法，特別是一種應用於顯示器之陣列基板及其製造方法。
顯示器中的陣列基板主要包含有薄膜電晶體以及其他電子元件。一般是使用5道以上光罩製程來製造陣列基板。其中薄膜電晶體結構中的半導體層大多為非晶矽。絕緣層多為無機氧化物或氮化物，例如氧化矽或氮化矽。然而，由於一般需使用化學氣相沈積法來製造半導體層及絕緣層，故製程溫度較高。因此必須選用耐高溫的材料。故基板多為耐熱的玻璃材質，使得陣列基板不具有可撓性。
但由於目前對於顯示器輕、薄與可撓折的需求，使得軟性顯示器的開發越來越重要。然而製造軟性顯示器的陣列基板也需要使用5-6道光罩製程。
因此，需要一種可以減少製程所需光罩及製程步驟的製造方法以降低製程成本與提高產能。
本發明之一態樣是在提供一種製造方法，能以4道光罩製程來製作陣列基板。
在本發明一或多個實施方式中，製造方法包括下列步驟。提供一基材。在基材上形成源極以及汲極。依序形成 半導體層、有機絕緣層以及閘極層來覆蓋基材、源極及汲極。在閘極層上形成圖案化光阻層。移除暴露出的閘極層及其下方的有機絕緣層與半導體層，以形成閘極。在閘極、源極及汲極上形成有機保護層，其中有機保護層具有接觸窗以露出部分的汲極。在有機保護層以及露出部分的汲極上形成畫素電極。
在本發明一或多個實施方式中，製造方法包括下列步驟。在基材上形成源極以及汲極。形成半導體層覆蓋基材、源極及汲極。在半導體層上形成圖案化有機絕緣層，以定義半導體層的通道層。在圖案化有機絕緣層以及半導體層上形成閘極層。在閘極層上形成圖案化光阻層，其中圖案化光阻層位於圖案化有機絕緣層的上方。移除露出的閘極層及其下方之半導體層，以形成閘極及通道層。在閘極、源極及汲極上形成有機保護層，其中有機保護層具有接觸窗以露出一部分的汲極。在有機保護層以及露出部分的汲極上形成畫素電極。
本發明之另一態樣是在提供一種陣列基板，包含基材、源極與汲極、作為通道層的半導體層、作為閘絕緣層的有機絕緣層、閘極、有機保護層以及畫素電極。
源極與汲極設置於基材上。半導體層設置於源極、汲極以及位於源極與汲極間之基材上。有機絕緣層設置於半導體層上。閘極設置於有機絕緣層上。有機保護層覆蓋閘極、源極、汲極及基材，其中有機保護層中具有接觸窗以露出一部分的汲極。畫素電極設置於露出部分之汲極及有機保護層上。
因此，本發明上述實施方式具有下列優點：
(1)能以4道光罩製程製作顯示器陣列基板，可提高產能與節省運作成本。
(2)有機絕緣層及有機保護層不需在高溫下製作，因此可節省運作成本。
(3)有機絕緣層、有機保護層及半導體層之結構可使薄膜電晶體具有較高的電子移動度。
第1A-1D圖係繪示依照本發明一實施方式的陣列基板之製造方法的各製程階段剖面示意圖。在本實施例中，陣列基板可為應用於顯示器之陣列基板，但不以此為限。
首先，提供一基材100，如第1A圖所示。基材100包含有畫素區100a以及走線區100b。走線區100b的電路是用以連接其他電子元件，例如驅動晶片(driver IC)。在一實施例中，基材100包含剛性基板110以及可撓性高分子層120。可撓性高分子層120形成在剛性基板110上。剛性基板110可為玻璃基板。可撓性高分子層120可例如為聚醯亞胺(Polyimide)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)、聚萘二甲酸乙二酯(Polyethylene Naphthalate,PEN)或聚甲基丙烯酸甲酯(Poly(methyl methacrylate),PMMA)。在另一實施例中，基材100僅為玻璃基板，而不包含上述可撓性高分子層120。
然後，在基材100上形成源極130a與汲極130b，如第1A圖所示。源極130a與汲極130b可形成在可撓性高分 子層120上。源極130a電性連接一訊號線(未繪示)，例如源極130a可為訊號線的一部分。源極130a與汲極130b的材料可為鉻、鋁、銅、鉬、鈦或其他導電材料。可使用濺鍍製程及光學微影製程來形成源極130a與汲極130b。
在一實施方式中，在形成源極130a與汲極130b的同時，可在走線區100b中形成第一連接墊130c。第一連接墊130c用以連接驅動晶片(圖未示)，且第一連接墊130c電性連接源極130a。
在形成源極130a與汲極130b後，依序形成氧化物半導體層140、有機絕緣層150以及閘極層160，以覆蓋基材100、源極130a以及汲極130b，如第1B圖所示。
上述氧化物半導體層140的材質可例如為氧化鋅(ZnO)、氧化鋅錫(ZnSnO)、氧化鉻錫(CdSnO)、氧化鎵錫(GaSnO)、氧化鈦錫(TiSnO)、氧化銦鎵鋅(InGaZnO)、氧化銅鋁(CuAlO)、氧化鍶銅(SrCuO)或硫氧化鑭銅(LaCuOS)。可使用濺鍍製程來形成氧化物半導體層140。上述氧化物半導體層140可在室溫下以濺鍍方式形成，因此，在一實施方式中，氧化物半導體層140可直接形成在可撓性高分子層120上。
上述有機絕緣層150的材質可為聚醯亞胺(Polyimide)或聚硅氧烷(polysiloxane)等。可使用任何習知的塗佈方式來形成有機絕緣層150。相較於無機絕緣層的製程溫度，有機絕緣層150可以在較低溫的條件下製作。因此，可適用於耐熱性較差的可撓性高分子層120。
上述閘極層160的材料可與源極130a與汲極130b的 材料相同或不同。閘極層160與氧化物半導體層140之間設置有機絕緣層150，用以避免閘極層160直接接觸氧化物半導體層140。
接著，在閘極層160上形成圖案化光阻層170a，如第1B圖所示。上述圖案化光阻層170a用以定義閘極的位置，因此圖案化光阻層170a設置在欲形成閘極位置的正上方。可使用任何習知的光學微影製程來形成圖案化光阻層170a。
在一實施方式中，在形成圖案化光阻層170a的同時，可在走線區100b中形成圖案化光阻層170b。圖案化光阻層170b用以定義第二連接墊160b，下文中將更詳細敘述。
在形成圖案化光阻層170a後，移除暴露出圖案化光阻層170a外的閘極層160及其下方的有機絕緣層150和氧化物半導體層140，以形成閘極160a、閘絕緣層150a以及通道層140a，如第1C圖所示。上述閘極160a電性連接掃描線(未繪示)，例如，閘極160a可為掃描線的一部分。
承上所述，可使用濕式酸蝕刻製程或乾式蝕刻製程來移除暴露出的閘極層160及其下方的有機絕緣層150及氧化物半導體層140。具體來說，可使用相同的蝕刻劑來移除閘極層160、有機絕緣層150與氧化物半導體層140，以減少製程步驟。或者，可先用濕式酸蝕刻製程來移除暴露出的閘極層160，接著使用乾式蝕刻製程或顯影液來移除露出的有機絕緣層150，再使用濕式酸蝕刻製程來溶解露出的氧化物半導體層140。因此，可藉由一道光罩製程來形成閘極160a、閘絕緣層150a以及通道層140a，使通道 層140a、閘絕緣層150a及閘極160a具有大致相同的上視輪廓，並節省製造成本。在完成上述步驟後，移除圖案化光阻層170a。
在一實施方式中，在移除上述閘極層160、有機絕緣層150和氧化物半導體層140的同時，可在走線區100b中形成第二連接墊160b。換言之，第二連接墊160b是與閘極160a、閘絕緣層150a以及通道層140a同時形成。在本實施方式中，第二連接墊160b用以連接一驅動晶片(圖未示)，且第二連接墊160b電性連接閘極160a。
在形成上述閘極160a、閘絕緣層150a以及通道層140a之後，在閘極160a、源極130a與汲極130b上形成有機保護層180，如第1D圖所示。有機保護層180具有接觸窗182，以露出一部分的汲極130b。有機保護層180的材質可與有機絕緣層150的材質相同或不同。有機保護層180的材質可為聚醯亞胺(Polyimide)或聚矽氧烷(Polysiloxane)等。可使用任何習知的光學微影製程來形成有機保護層180。
在一實施方式中，走線區100b中的有機保護層180可具有第一開口184及第二開口186，以分別露出第二連接墊160b及第一連接墊130c。
在形成有機保護層180後，形成畫素電極190a於有機保護層180及露出部分的汲極130b上。畫素電極190a透過接觸窗182與汲極130b電性連接。畫素電極190a的材質可為氧化銦錫、氧化銦鋅或其他透明導電材料。
在一實施方式中，在形成畫素電極190a時，可同時在 露出的第二連接墊160b及第一連接墊130c上形成透明導電層190b。因此，透明導電層190b可透過第一開口184連接驅動掃描線的晶片(scan driver IC)，並可透過第二開口186連接驅動訊號線晶片(data driver IC)。
在一實施方式中，在完成上述步驟後，將剛性基板110與可撓性高分子層120分離，而得到形成在可撓性高分子層120上的軟性顯示器陣列基板。舉例來說，可使用準分子雷射的方法來分離剛性基板110與可撓性高分子層120，而得到軟性顯示器陣列基板。
第2A-2D圖係繪示依照本發明另一實施方式的顯示器陣列基板之各製程階段剖面示意圖。在本實施例中，陣列基板可為應用於顯示器之陣列基板，但不以此為限。
首先，在基材200上形成源極230a與汲極230b，如第2A圖所示。基材200包含有畫素區200a以及走線區200b。走線區200b的電路是用以連接其他電子元件。基材200、源極230a、汲極230b的材質及其製造方法可參考第1A圖中的基材100、源極130a與汲極130b的敘述。
在一實施方式中，可於形成源極230a、汲極230b時，於走線區200b中同時形成第一連接墊230c。
然後，在基材200、源極230a與汲極230b上形成氧化物半導體層240，如第2A圖所示。上述氧化物半導體層240的材質及其製造方法可參考第1B圖中的氧化物半導體層140的敘述。
接著，在氧化物半導體層240上形成圖案化有機絕緣層250a以定義氧化物半導體層240之通道層240a，如第 2A圖所示。具體來說，可先在氧化物半導體層240上塗佈一層感光性的有機絕緣材料，然後再進行烘烤。接著進行曝光及顯影製程，而形成圖案化有機絕緣層250a。上述曝光製程所選用的光波長需搭配有機絕緣層250a的材料來調整。通常，光波長可為可見光或紫外光範圍，例如波長為436nm的G-line、波長為405nm的H-line或波長為365nmn的I-line。有機絕緣層250a材料可為感光的有機材料，例如聚醯亞胺(Polyimide)或聚矽氧烷(Polysiloxane)等。
在形成上述圖案化有機絕緣層250a後，形成閘極層260覆蓋圖案化有機絕緣層250a及氧化物半導體層240，如第2B圖所示。上述閘極層260的材質及其製造方法可參考第1B圖中的閘極層160的敘述。
然後，在閘極層260上形成圖案化光阻層270a，如第2B圖所示。圖案化光阻層270a可位於圖案化有機絕緣層250a的正上方，並用以定義閘極的位置。上述圖案化光阻層270a的材質及其製造方法可參考第1B圖中的圖案化光阻層170a的敘述。
在一實施方式中，在形成圖案化光阻層270a的同時，可在走線區200b中形成圖案化光阻層270b。圖案化光阻層270b可用以定義第二連接墊260b，下文中將更詳細敘述。
在形成圖案化光阻層270a後，選擇性地移除暴露出圖案化光阻層270a外的閘極層260及其下方的氧化物半導體層240，以形成閘極260a及通道層240a，如第2C圖所示。例如，可使用相同的蝕刻劑來移除閘極層260及氧化物半 導體層240，以減少製程步驟。在上述蝕刻過程中，圖案化有機絕緣層250a定義通道層240a的區域，因此，通道層240a與圖案化有機絕緣層250a具有大致相同的上視輪廓。在一實施例中，閘極260a的面積略小於圖案化有機絕緣層250a的面積。在完成上述步驟後，移除圖案化光阻層270a。
在一實施方式中，在移除上述閘極層260及氧化物半導體層240的同時，可在走線區200b中形成第二連接墊260b。
在形成上述閘極260a及通道層240a之後，在閘極260a、源極230a及汲極230b上形成有機保護層280，如第2D圖所示。有機保護層280具有接觸窗282，以露出汲極230b。上述有機保護層280的材質及其製造方法可參考第1D圖中有機保護層180的敘述。
在一實施方式中，走線區200b中的有機保護層280可具有第一開口284及第二開口286，以分別露出第二連接墊260b及第一連接墊230c。
在形成有機保護層280後，形成畫素電極290a於有機保護層280及露出部分的汲極230b上，以使畫素電極290a透過接觸窗282與汲極230b電性連接，如第2D圖所示。上述畫素電極290a的材質及其製造方法可參考第1D圖中畫素電極190a的敘述。
在一實施方式中，在形成畫素電極290a時，可同時形成透明導電層290b於露出的第二連接墊260b及第一連接墊230c上。因此，透明導電層290b可透過第一開口284 連接驅動掃描線的晶片(scan driver IC)，並可透過第二開口286連接驅動訊號線晶片(data driver IC)。
上述實施方式之一特點在於，先形成圖案化有機絕緣層250a，用以定義通道層240a。因此，若選擇使用耐酸蝕刻的有機絕緣層材料，則可在移除步驟中以相同的蝕刻劑來移除閘極層260及氧化物半導體層240。所以可減少製程步驟。
根據本發明之另一態樣，係提供一種應用於顯示器之陣列基板。請參照第1D圖，顯示器陣列基板包含基材100、源極130a、汲極130b、氧化物半導體層(即通道層140a)、有機絕緣層(即閘絕緣層150a)、閘極160a、有機保護層180以及畫素電極190a。源極130a與汲極130b設置於基材100上。氧化物半導體層(即通道層140a)設置於源極130a、汲極130b以及位於源極130a與汲極130b間之基材100上。有機絕緣層(即閘絕緣層150a)設置於通道層140a上。閘極160a設置於有機絕緣層上。有機保護層150a覆蓋閘極160a、源極130a、汲極130b及基材100，其中有機保護層150a具有接觸窗182以露出一部分的汲極130b。畫素電極190a設置於露出部分之汲極130b及有機保護層180上，使畫素電極190a透過接觸窗182與汲極130b電性連接。
由此可知，上述實施方式能以4道光罩製程製作顯示器陣列基板，可以減少製程步驟以提高產能與節省運作成本。另外，上述實施方式結合有機絕緣層、有機保護層及氧化物半導體層之結構，可以使陣列基板具有較高的電子移動度特性。
上述顯示器陣列基板也可應用軟性顯示器上，如有機發光二極體顯示器或電泳顯示器。舉例來說，可應用本發明實施方式並結合有機發光二極體元件或電泳元件，來設計有機發光二極體顯示器或電泳顯示器的結構及其製造方法，以提高產能與節省運作成本。
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100a、200a‧‧‧畫素區
100b、200b‧‧‧走線區
110、210‧‧‧剛性基板
120、220‧‧‧可撓性高分子層
130a、230a‧‧‧源極
130b、230b‧‧‧汲極
130c、230c‧‧‧第一連接墊
140、240‧‧‧氧化物半導體層
140a、240a‧‧‧通道層
150‧‧‧有機絕緣層
150a‧‧‧閘絕緣層
160、260‧‧‧閘極層
160a、260a‧‧‧閘極
160b、260b‧‧‧第二連接墊
170a、170b、270a、270b‧‧‧圖案化光阻層
180、280‧‧‧有機保護層
182、282‧‧‧接觸窗
184、284‧‧‧第一開口
186、286‧‧‧第二開口
190a、290a‧‧‧畫素電極
190b、290b‧‧‧透明導電層
250a‧‧‧圖案化有機絕緣層
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1A-1D圖係繪示依照本發明一實施方式的陣列基板之製造方法的各製程階段剖面示意圖。
第2A-2D圖係繪示依照本發明另一實施方式的陣列基板之製造方法的各製程階段剖面示意圖。
100‧‧‧基材
100a‧‧‧畫素區
100b‧‧‧走線區
110‧‧‧剛性基板
120‧‧‧可撓性高分子層
130a‧‧‧源極
130b‧‧‧汲極
130c‧‧‧第一連接墊
140‧‧‧氧化物半導體層
140a‧‧‧通道層
150‧‧‧有機絕緣層
150a‧‧‧閘絕緣層
160a‧‧‧閘極
160b‧‧‧第二連接墊
180‧‧‧有機保護層
182‧‧‧接觸窗
184‧‧‧第一開口
186‧‧‧第二開口
190a‧‧‧畫素電極
190b‧‧‧透明導電層

Claims (17)

  1. 一種陣列基板之製造方法，包含：提供一基材；形成一源極以及一汲極於該基材上；依序形成一半導體層、一有機絕緣層以及一閘極層覆蓋該基材、該源極及該汲極；形成一圖案化光阻層於該閘極層上；移除暴露出該圖案化光阻層外之該閘極層及其下方之該有機絕緣層與該半導體層，以形成一閘極；形成一有機保護層於該閘極、該源極及該汲極上，其中該有機保護層具有一接觸窗以露出一部分之該汲極；以及形成一畫素電極於該有機保護層上，以使該畫素電極透過該接觸窗與該汲極電性連接。
  2. 如請求項1所述之製造方法，其中提供該基材之步驟包含：提供一剛性基板；以及形成一可撓性高分子層於該剛性基板上，其中該源極以及該汲極形成於該可撓性高分子層上。
  3. 如請求項2所述之製造方法，其中在形成該畫素電極於該有機保護層上的步驟後，更包含移除該剛性基板。
  4. 如請求項2所述之製造方法，其中該可撓性高分子層的材質為聚醯亞胺、聚對苯二甲酸乙二醇酯、聚萘二甲酸乙二酯或聚甲基丙烯酸甲酯。
  5. 如請求項1所述之製造方法，其中移除暴露出該圖案化光阻層外之該閘極層及其下方之該有機絕緣層與該半導體層的步驟包含使用一濕式酸蝕刻製程。
  6. 如請求項1所述之製造方法，其中移除暴露出該圖案化光阻層外之該閘極層及其下方之該有機絕緣層與該半導體層的步驟包含使用一乾式蝕刻製程。
  7. 如請求項1所述之製造方法，其中該半導體層的材質包含一材料係選自由氧化鋅(ZnO)、氧化鋅錫(ZnSnO)、氧化鉻錫(CdSnO)、氧化鎵錫(GaSnO)、氧化鈦錫(TiSnO)、氧化銦鎵鋅(InGaZnO)、氧化銅鋁(CuAlO)、氧化鍶銅(SrCuO)以及硫氧化鑭銅(LaCuOS)所組成之群組。
  8. 如請求項1所述之製造方法，其中該有機絕緣層之材質包含聚醯亞胺或聚硅氧烷。
  9. 一種陣列基板之製造方法，包含：提供一基材； 形成一源極以及一汲極於該基材上；形成一半導體層覆蓋該基材、該源極及該汲極；形成一圖案化有機絕緣層於該半導體層上，以定義該半導體層之一通道層；形成一閘極層於該圖案化有機絕緣層以及該半導體層上；形成一圖案化光阻層於該閘極層上，其中該圖案化光阻層位於該圖案化有機絕緣層上方；移除暴露出該圖案化光阻層外之該閘極層及其下方之該半導體層，以形成一閘極以及該通道層；形成一有機保護層於該閘極、該源極及該汲極上，其中該有機保護層具有一接觸窗以露出一部分之該汲極；以及形成一畫素電極於該有機保護層上，以使該畫素電極透過該接觸窗與該汲極電性連接。
  10. 如請求項9所述之製造方法，其中移除暴露出該圖案化光阻層外之該閘極層及其下方之該有機絕緣層與該半導體層的步驟包括：使用相同之一蝕刻劑蝕刻該閘極層以及該半導體層。
  11. 如請求項9所述之製造方法，其中該圖案化光阻層之一面積小於該圖案化有機絕緣層之一面積。
  12. 如請求項9所述之製造方法，其中該有機絕緣層之材質包含聚醯亞胺或聚硅氧烷。
  13. 一種陣列基板，包含：一基材，包含：一剛性基板；以及；一可撓性高分子層完全覆蓋於該剛性基板上；一源極及一汲極，設置於該基材上，其中該源極及該汲極形成於該基板的該可撓性高分子層上；一半導體層，設置於該源極、該汲極以及該基材上；一有機絕緣層，設置於該半導體層上；一閘極，設置於該有機絕緣層上；一有機保護層，覆蓋該閘極、該源極、該汲極及該基材，其中該有機保護層中具有一接觸窗以露出一部分該汲極；以及一畫素電極，設置於該有機保護層上，並透過該接觸窗與該汲極電性連接，其中該半導體層、該有機絕緣層及該閘極具有大致相同之一輪廓。
  14. 如請求項13所述之陣列基板，其中該半導體層的材質包含一材料係選自由氧化鋅(ZnO)、氧化鋅錫(ZnSnO)、氧化鉻錫(CdSnO)、氧化鎵錫(GaSnO)、氧化鈦 錫(TiSnO)、氧化銦鎵鋅(InGaZnO)、氧化銅鋁(CuAlO)、氧化鍶銅(SrCuO)以及硫氧化鑭銅(LaCuOS)所組成之群組。
  15. 如請求項13所述之陣列基板，其中該有機絕緣層之材質包含聚醯亞胺或聚硅氧烷。
  16. 如請求項13所述之陣列基板，其中該有機保護層之材質包含聚醯亞胺或聚硅氧烷。
  17. 如請求項13所述之陣列基板，其中該基材包含一可撓性高分子層，且該可撓性高分子層為聚醯亞胺、聚對苯二甲酸乙二醇酯、聚萘二甲酸乙二酯或聚甲基丙烯酸甲酯。
TW100139964A 2011-11-02 2011-11-02 陣列基板及其製造方法 TWI544263B (zh)

Priority Applications (5)

Application Number Priority Date Filing Date Title
TW100139964A TWI544263B (zh) 2011-11-02 2011-11-02 陣列基板及其製造方法
CN201210005254.3A CN103094203B (zh) 2011-11-02 2012-01-06 阵列基板及其制造方法
US13/530,098 US9165955B2 (en) 2011-11-02 2012-06-21 Array substrate and method for manufacturing the same
US14/845,291 US9614101B2 (en) 2011-11-02 2015-09-04 Array substrate and method for manufacturing the same
US14/859,371 US9564537B2 (en) 2011-11-02 2015-09-21 Array substrate and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW100139964A TWI544263B (zh) 2011-11-02 2011-11-02 陣列基板及其製造方法

Publications (2)

Publication Number Publication Date
TW201319698A TW201319698A (zh) 2013-05-16
TWI544263B true TWI544263B (zh) 2016-08-01

Family

ID=48171456

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100139964A TWI544263B (zh) 2011-11-02 2011-11-02 陣列基板及其製造方法

Country Status (3)

Country Link
US (3) US9165955B2 (zh)
CN (1) CN103094203B (zh)
TW (1) TWI544263B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI544263B (zh) * 2011-11-02 2016-08-01 元太科技工業股份有限公司 陣列基板及其製造方法
TW201427025A (zh) * 2012-12-25 2014-07-01 Hon Hai Prec Ind Co Ltd 薄膜電晶體
WO2015089062A1 (en) * 2013-12-09 2015-06-18 Orthogonal, Inc. Patterning functional materials
CN103824866A (zh) * 2014-03-03 2014-05-28 深圳市华星光电技术有限公司 一种阵列基板及其制备方法、液晶显示面板
CN105118854B (zh) * 2015-07-01 2019-03-01 京东方科技集团股份有限公司 金属氧化物半导体薄膜、薄膜晶体管、制备方法及装置
TW201804613A (zh) * 2016-07-26 2018-02-01 聯華電子股份有限公司 氧化物半導體裝置
CN107978615A (zh) * 2017-11-24 2018-05-01 成都捷翼电子科技有限公司 一种柔性有机薄膜晶体管基板的制造方法
TWI787720B (zh) * 2021-01-25 2022-12-21 友達光電股份有限公司 有機半導體基板

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7285440B2 (en) * 2002-11-25 2007-10-23 International Business Machines Corporation Organic underlayers that improve the performance of organic semiconductors
KR20050080276A (ko) * 2004-02-09 2005-08-12 삼성전자주식회사 박막 트랜지스터 표시판 및 그 제조 방법
US7476908B2 (en) * 2004-05-21 2009-01-13 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
US7888702B2 (en) * 2005-04-15 2011-02-15 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of the display device
TWI301554B (en) * 2005-11-16 2008-10-01 Prime View Int Co Ltd Electronic ink display device
KR101217662B1 (ko) * 2005-12-20 2013-01-02 엘지디스플레이 주식회사 유기 반도체 물질을 이용한 박막트랜지스터와 이를 구비한액정표시장치용 어레이 기판의 제조방법
KR101212152B1 (ko) * 2005-12-29 2012-12-13 엘지디스플레이 주식회사 유기박막트랜지스터 및 그 제조방법
KR101243395B1 (ko) * 2006-04-27 2013-03-13 엘지디스플레이 주식회사 유기 박막 트랜지스터 어레이 기판 및 그 제조 방법
JP4301302B2 (ja) * 2007-02-06 2009-07-22 セイコーエプソン株式会社 半導体装置、半導体装置の製造方法及び電子機器
KR101326129B1 (ko) * 2007-07-24 2013-11-06 삼성디스플레이 주식회사 유기 박막 트랜지스터 표시판 및 그 제조 방법
US7968388B2 (en) * 2007-08-31 2011-06-28 Seiko Epson Corporation Thin-film device, method for manufacturing thin-film device, and display
JP5123141B2 (ja) 2008-11-19 2013-01-16 株式会社東芝 表示装置
JP2010140919A (ja) * 2008-12-09 2010-06-24 Hitachi Ltd 酸化物半導体装置及びその製造方法並びにアクティブマトリクス基板
US8383470B2 (en) * 2008-12-25 2013-02-26 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor (TFT) having a protective layer and manufacturing method thereof
US8461582B2 (en) * 2009-03-05 2013-06-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101937157A (zh) * 2009-07-01 2011-01-05 元太科技工业股份有限公司 可挠式显示装置的制造方法
JP5642447B2 (ja) * 2009-08-07 2014-12-17 株式会社半導体エネルギー研究所 半導体装置
FR2951028B1 (fr) * 2009-10-05 2012-08-03 Commissariat Energie Atomique Memoire organique a double grille et procede de realisation
JP5515660B2 (ja) * 2009-11-13 2014-06-11 セイコーエプソン株式会社 半導体装置用基板の製造方法
JP5397175B2 (ja) * 2009-11-13 2014-01-22 セイコーエプソン株式会社 半導体装置用基板及びその製造方法、半導体装置並びに電子機器
KR101597214B1 (ko) 2010-01-14 2016-02-25 삼성디스플레이 주식회사 박막 트랜지스터 기판 및 그 제조 방법
TWI544263B (zh) 2011-11-02 2016-08-01 元太科技工業股份有限公司 陣列基板及其製造方法

Also Published As

Publication number Publication date
CN103094203A (zh) 2013-05-08
US9614101B2 (en) 2017-04-04
TW201319698A (zh) 2013-05-16
US20150380445A1 (en) 2015-12-31
US20130105789A1 (en) 2013-05-02
US9564537B2 (en) 2017-02-07
US9165955B2 (en) 2015-10-20
US20160013322A1 (en) 2016-01-14
CN103094203B (zh) 2016-02-24

Similar Documents

Publication Publication Date Title
TWI544263B (zh) 陣列基板及其製造方法
JP5209146B2 (ja) 半導体装置およびその製造方法
US8759165B2 (en) Manufacturing method of array substrate
TWI438851B (zh) 陣列基板及製造該陣列基板的方法
WO2017185838A1 (zh) 薄膜晶体管阵列基板及其制备方法、显示装置
US9147700B2 (en) Manufacturing method of array substrate
TWI427784B (zh) 畫素結構的製造方法及有機發光元件的製造方法
WO2013131380A1 (zh) 阵列基板及其制作方法和显示装置
CN110620120B (zh) 阵列基板及其制作方法、显示装置
WO2017020480A1 (zh) 薄膜晶体管及阵列基板的制备方法、阵列基板及显示装置
KR101051586B1 (ko) 2개의 포토 마스크를 이용한 박막 트랜지스터의 제조 방법
US8703514B2 (en) Active array substrate and method for manufacturing the same
CN101950733B (zh) 像素结构的制造方法及有机发光元件的制造方法
CN108711548B (zh) 金属氧化物薄膜晶体管及其制作方法、显示器
KR101200237B1 (ko) 디스플레이용 박막 트랜지스터 및 이의 제조방법
US8420420B2 (en) Method of manufacturing thin film transistor array substrate and structure thereof
TW201322340A (zh) 畫素結構及其製作方法
TWI540737B (zh) 主動元件及其製造方法
WO2022089066A1 (zh) 一种显示基板及其制作方法和显示装置
TW584908B (en) Method of manufacturing IPS-LCD by using 4-mask process
TW201810682A (zh) 薄膜電晶體及其製作方法
WO2014077201A1 (ja) 半導体装置の製造方法および表示装置
US11374036B2 (en) Array substrate, manufacturing method thereof, and display device
CN102254860A (zh) 一种制造薄膜晶体管的方法
US20160056300A1 (en) Thin film transistor and fabricating method thereof