TWI527186B - 半導體封裝及其製造方法 - Google Patents
半導體封裝及其製造方法 Download PDFInfo
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- TWI527186B TWI527186B TW100122795A TW100122795A TWI527186B TW I527186 B TWI527186 B TW I527186B TW 100122795 A TW100122795 A TW 100122795A TW 100122795 A TW100122795 A TW 100122795A TW I527186 B TWI527186 B TW I527186B
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- Prior art keywords
- semiconductor wafer
- substrate
- semiconductor
- wiring board
- corner
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims description 203
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 229920005989 resin Polymers 0.000 claims description 63
- 239000011347 resin Substances 0.000 claims description 63
- 239000000758 substrate Substances 0.000 claims description 55
- 229920001187 thermosetting polymer Polymers 0.000 claims description 47
- 230000002093 peripheral effect Effects 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 16
- 235000012431 wafers Nutrition 0.000 description 127
- 229910000679 solder Inorganic materials 0.000 description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
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- 229910052737 gold Inorganic materials 0.000 description 5
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- 229920000647 polyepoxide Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
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- 229910000420 cerium oxide Inorganic materials 0.000 description 1
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- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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Description
本申請案主張2010年6月29日提出申請之日本專利申請案第2010-147196號之優先權,將其全體內容併入本文為參考資料。
本文所述具體例係關於一種半導體封裝及該半導體封裝之製造方法。
隨著近來使用諸如半導體晶片之半導體裝置之電子設備性能的提高,現需要,例如,提高將半導體晶片安裝於佈線板上之密度及使併入半導體晶片之半導體封裝小型化(節省空間)。
為此,已提出各種用於所謂POP(疊合式封裝(package on package))半導體封裝的結構,其中將多個半導體晶片堆疊於佈線板上。亦已提出多種技術用於POP半導體封裝之製造方法。
然而,在POP半導體封裝中,半導體晶片之外部尺寸需隨其堆疊位置更高而逐漸減小。換言之,會有待堆疊半導體晶片之外部尺寸受限的問題。
已提出圖6所示之半導體封裝100及其製造方法來解決上述問題(參見,例如,JP-A-2002-184936)。更明確言之,半導體封裝100係將第一LSI晶片104安裝於電路板103上,及將較大的第二LSI晶片106安裝於第一LSI晶片104上之半導體裝置。填充第一LSI晶片104與電路板103之間之空間的下填料110自外部周邊突出,且下填料之突出部分的頂表面與第一LSI晶片104之頂表面齊平。以此方式,用於承接較大的第二LSI晶片106之底表面的基底係經形成為可穩定安裝第二LSI晶片106。與晶片外部尺寸相關的限制可放寬,且可穩定地製得具高可靠性的半導體封裝100。
本申請人於試驗基礎上製得圖9所示之半導體封裝200,其具有與半導體封裝100相同的POP結構,並對其進行研究而發現以下問題。
首先,將概述半導體封裝200之製造方法。將金凸塊211形成於第一半導體晶片210之電極上,及將焊料塗層237形成於待與第一半導體晶片210連接之佈線板230的電極232上。隨後將以NCF(非導電膜)203為代表之熱固性樹脂膜203(絕緣樹脂)黏合至佈線板230。此外,元件203並不限於熱固性樹脂膜。舉例來說,元件203可為絕緣膜。然後藉由熱壓接合將第一半導體晶片210之金凸塊211連接至經黏合熱固性樹脂膜203之佈線板230的焊料塗層237。此時,使熱固性樹脂膜203定形至特定程度。然後藉由將其在指定溫度下維持指定時間而使熱固性樹脂膜203完全定形。最後,使第二半導體晶片220晶粒接合至第一半導體晶片210。
在半導體封裝200之具有以上步驟的製造方法中,當藉由熱壓接合使第一半導體晶片210連接至佈線板230時,如由圖7之照片所見(在移除第二半導體晶片220的情況下拍攝),熱固性樹脂膜203自第一半導體晶片210與佈線板230之間之空間的外部周邊流出。熱固性樹脂膜203具有此時其繞膜203之中心以同心方式(圓形地)擴展的性質(見圖7)。
於此製造步驟中發現以下問題。在第二半導體晶片220伸出於第一半導體晶片210(L:伸出長度)的設計中,即在第二半導體晶片220之外部尺寸大於第一半導體晶片210之外部尺寸的情況中,傾向於在相關製造步驟期間在第二半導體晶片220之周邊部分220a(特定言之,轉角部分)的下方形成空穴C,如圖8之照片(圖7中之轉角部分B的放大形式)及圖9之示意截面圖(垂直於圖7之紙面)所示。若形成此等空穴C,則第二半導體晶片220會在藉由打線接合將形成於第二半導體晶片220之周邊部分220a之頂表面上的電極(未圖示)連接至形成於佈線板230上之電極233的步驟中彎曲,因此其連接會變得不穩定。此外,在模製整個結構之步驟中,會在第一半導體晶片210與第二半導體晶片220之間之界面中形成間隙,而增加產生模製空隙的機率。當第二半導體晶片220之伸出長度L較大時,此等問題更為嚴重。
鑑於上述問題,在習知技術中,意欲藉由使用自第一半導體晶片與佈線板之間之空間流出之該部分的熱固性樹脂膜作為基底之部分,藉由減小伸出長度而防止空穴形成。然而,由於所涉及之製程條件及元件尺寸的變化,極難穩定地形成具有指定形狀之基底(形狀取決於流出之樹脂量而定)。另一方面,若嘗試藉由使用大的熱固性樹脂膜來固定足夠寬的基底,則由於熱固性樹脂膜傾向於以同心方式(圓形地)擴展的上述性質,會有過量的樹脂自邊長流出,而導致佈線板之打線接合電極經熱固性樹脂膜之擴展部分覆蓋的問題。
本發明之示例性具體例解決上述缺點及以上未說明之其他缺點。然而,本發明非得要克服上述缺點,因此,本發明之示例性具體例可能未克服任何上述缺點。
根據本發明之一或多個說明性態樣,提供一種半導體封裝。該半導體封裝包括:佈線板;安裝於佈線板上之第一半導體晶片;安裝於第一半導體晶片上之第二半導體晶片,其中當自半導體封裝之厚度方向觀看時,第二半導體晶片之尺寸係大於第一半導體晶片之尺寸;提供於該佈線板與該第二半導體晶片之間及該佈線板與該第一半導體晶片之間,以覆蓋該第一半導體晶片的絕緣樹脂;設置於該佈線板上以面對該第二半導體晶片之表面的基底,其中該絕緣樹脂係提供於該基底與該第二半導體晶片之間以覆蓋該基底。
根據本發明之一或多個說明性態樣,提供一種半導體封裝之製造方法。該方法包括:(a)提供佈線板;(b)於該佈線板上形成基底;(c)將熱固性樹脂膜層壓於該佈線板上以覆蓋該基底;(d)經由透過熱固性樹脂膜將第一半導體晶片壓向佈線板,同時加熱第一半導體晶片,而使該第一半導體晶片透過該熱固性樹脂膜覆晶接合至該佈線板。
本發明之其他態樣及優點將可由以下說明、圖式及申請專利範圍而明白。
以下將參照附圖說明本發明之示例性具體例。在用於說明具體例的所有圖式中,將具有相同功能之元件以相同元件符號表示,並省略重複說明。
以下將說明根據本發明一具體例之半導體封裝1。
圖1係半導體封裝1之示意截面圖。應注意為方便說明起見,於各圖中所示之元件並非始終係根據其實際尺寸或比例繪製。
半導體封裝1係將第一半導體晶片10安裝於佈線板30上及將第二半導體晶片20安裝於第一半導體晶片10上之POP半導體封裝。更明確言之,第一半導體晶片10係透過熱固性樹脂膜3經由熱壓接合覆晶連接至佈線板30,及第二半導體晶片20係經由晶粒接合接合至第一半導體晶片10。
如圖3A所示,佈線板30之頂表面及底表面經形成有用於連接至第一半導體晶片10或供外部連接用之電極32及33。
在第一半導體晶片10中,與佈線板30相對之表面10a設有連接至電極32之連接凸塊11。舉例來說,連接凸塊11可由金製成。
另一方面,第二半導體晶片20之頂表面20e在對應於周邊部分20a之區域中設有電極(未圖示)。該等電極係打線接合至設置於第一半導體晶片10之裝置區域外之佈線板30上的電極33。
半導體封裝1通常係經模製樹脂6模製。然而,半導體封裝1可以非模製形式分配。
第一半導體晶片10係透過熱固性樹脂膜3經由熱壓接合接合至佈線板30。裝置於第一半導體晶片10上之第二半導體晶片20之外部尺寸係大於第一半導體晶片10之外部尺寸,即第二半導體晶片20具有長的伸出(L:伸出長度)。舉例來說,第一半導體晶片10之形狀類似邊長約4毫米長之方形,及第二半導體晶片20之形狀類似邊長約8毫米長之方形。伸出長度約為2毫米。
將頂部未與第二半導體晶片20之底表面20d接觸之類似突出物的基底36提供於第二半導體晶片20之周邊部分20a的正下方。基底36之位置及形狀的實例將參照圖2A-2C作說明。圖2A係半導體封裝1之示意平面圖,其中第二半導體晶片20僅以外圍線指示。稍後將於製造方法之說明中解釋基底36的工作效應。
舉例來說,在對應於第二半導體晶片20之轉角部分20b的位置處將轉角基底36a形成於佈線板30上。若需要,在對應於側面部分20c之位置處提供側面基底36b,其各位於第二半導體晶片20之毗鄰的轉角部分20b之間,而不與轉角基底36a相連。或者,側面基底36b可與轉角基底36a相連。
舉例來說,如圖2B所示,各轉角基底36a係經形成為大致L形。由兩個腳所形成之角度θ大於0°且小於180°。當角度θ大時,各轉角基底36a更類似於直線而非L形。各轉角基底36a之轉角半徑R大於約0.2微米且小於約10微米。如圖2C所示,各轉角基底36a可具有大的截角。又或者,各轉角基底36a可經成形為類似圓形(未圖示)。
另一方面,如圖2A所示,各側面基底36b係沿相關的側面部分20c平直地形成。
舉例來說,轉角基底36a及側面基底36b皆寬至約0.3至0.8毫米,且其寬度之上限等於第一半導體晶片10之外部周邊與佈線板30之電極33(用於打線接合至第二半導體晶片20之電極)之內部周邊之間的距離。轉角基底36a及側面基底36b皆具有大約10微米至數十微米之高度。
在根據此具體例之半導體封裝1中,基底36係經熱固性樹脂膜3覆蓋,在第一半導體晶片10之外部周邊之外之該部分的熱固性樹脂膜3之頂表面係與第一半導體晶片10之頂表面齊平,且在第二半導體晶片20之外部周邊之外之熱固性樹脂膜3的周邊部分具有圓角形狀。
接下來,現將說明半導體封裝1之製造方法。圖3A-3C至圖5A-5C係用於說明半導體封裝1之製造方法的示意截面圖。
首先,如圖3A所示製備佈線板30。佈線板30係使用樹脂板31藉由已知方法製得之印刷佈線板,此處將其製造方法之說明省略。舉例來說,佈線板30包括由銅製成之電極32、於其各者中將鍍金層形成於銅電極32上之電極33、及作為抗焊劑之絕緣層34。
如圖3B所示,將感光性抗蝕劑35塗布至佈線板30之頂表面30a。於透過光罩圖案(未圖示)將感光性抗蝕劑35照射光後,進行顯影及剝除。結果,如圖3C所示,在於稍後步驟中待由第二半導體晶片20之周邊部分20a佔據之區域的正下方形成具有指定形狀的基底36。
基底36係如以上參照圖2A及2B所述而形成。在此具體例中,在對應於待於稍後步驟中設置第二半導體晶片20之轉角部分20b之位置的位置處將轉角基底36a形成於佈線板30之頂表面30a上。且在對應於待於稍後步驟中設置之第二半導體晶片20之各位於毗鄰轉角部分20b之間之側面部分20c之位置的位置處將側面基底36b形成於佈線板30之頂表面30a上,而不與轉角基底36a相連。或者,側面基底36b可經形成為與轉角基底36a相連。只是轉角基底36a可取決於佈線板30之頂表面30a中之電極33(33a)的配置、第一半導體晶片10之形狀、及其他因素來形成。
用於形成基底36之其他方法實例係層壓法(將抗蝕劑與除經遮蓋之基底區域外的區域層壓)、平板衝孔法(使用金屬模頭將除基底部分外之大部分衝孔除去)、及吹磨法(將除基底部分外之大部分吹磨除去)。
接著,如圖4A所示,將焊料塗層37形成於佈線板30之電極32中之待與第一半導體晶片10之連接凸塊11連接的電極32a上。
接著,如圖4B所示,在相關區域之中心將熱固性樹脂膜3層壓於佈線板30之頂表面30a上。更明確言之,將熱固性樹脂膜3層壓於由基底36(36a及36b)所界定之矩形區域中(見圖2A)。亦將熱固性樹脂膜3層壓於基底36之頂表面上。因此,在此具體例中,熱固性樹脂膜3具有矩形形狀。此外,可將熱固性樹脂膜3層壓於佈線板30上,以致熱固性樹脂膜3之側面與基底36之外側對準。然而,熱固性樹脂膜3之形狀可根據基底36之配置適當地改變。
熱固性樹脂膜3係由(例如)環氧熱固性樹脂製成。用於將熱固性樹脂膜3層壓於佈線板30上之一方法實例係真空層壓法。
接著,如圖4C所示,透過熱固性樹脂膜3在指定安裝位置處將第一半導體晶片10置於佈線板30之頂表面30a上,使其之佈線表面10a與佈線板30之頂表面30a相對。然後將接合工具(加熱頭)2壓向與第一半導體晶片10之佈線表面10a相對的表面10b,且邊藉由接合工具2推動第一半導體晶片10邊進行加熱。
結果,夾於第一半導體晶片10與佈線板30之間的熱固性樹脂膜3受壓及擴展,藉此不僅填充第一半導體晶片10與佈線板30之間的空間,並且亦越過基底36之頂表面且自第一半導體晶片10之外部周邊流開。第一半導體晶片10之連接凸塊11分別與佈線板30之電極32a上之焊料塗層37接觸。再者,佈線板30之電極32a上之焊料塗層37透過第一半導體晶片10加熱且藉此熔融。彼此接觸的連接凸塊11及焊料塗層37彼此結合。同時,填充第一半導體晶片10與佈線板30之間之空間的熱固性樹脂膜3經加熱且定形。
此時,熱固性樹脂膜3經成形而覆蓋基底36。使自第一半導體晶片10之外部周邊流出之該部分熱固性樹脂膜3的頂表面成為與第一半導體晶片10之頂表面(與佈線表面10a相對)齊平的平坦表面,而未形成任何階梯或間隙。再者,位在第二半導體晶片20之外部周邊之外之熱固性樹脂膜3的周邊部分具有圓角形狀。
基底36提供以下優點。由於基底36之頂表面與接合工具2之施壓表面之間的距離較佈線板30之頂表面30a之間的距離短,因此增加量的熱固性樹脂膜3自第一半導體晶片10之外部周邊越過基底36流出。
特定言之,由於增加量的熱固性樹脂膜3自第一半導體晶片10之外部周邊越過轉角基底36a流出,因此本身傾向於以同心方式(圓形地)擴展之熱固性樹脂膜3可以大致矩形形式擴展。結果,在第二半導體晶片20之外部尺寸大於第一半導體晶片10之外部尺寸的情況下,熱固性樹脂膜3可到達第二半導體晶片20之外部周邊部分20a(特定而言,轉角部分20b)之最外部正下方的空間,藉此可防止如以上參照圖9所述之空穴的形成。
隨後,如圖5A所示,透過固定元件4將第二半導體晶片20安裝於經如此形成的平坦表面上,使佈線表面20e朝上。舉例來說,於安裝第二半導體晶片20後進行固化,藉此使固定元件4定形且使第二半導體晶片20固定至由第一半導體晶片10之頂表面(與佈線表面10a相對)10b及已自第一半導體晶片10之外部周邊流出之該部分熱固性樹脂膜3之頂表面所組成的平坦表面。
藉由諸如滾筒層壓法或真空層壓法之層壓方法將固定元件4(其係由樹脂材料(例如,環氧樹脂)製成之接合片材)層壓於由第一半導體晶片10之頂表面(與佈線表面10a相對)10b及已自第一半導體晶片10之外部周邊流出之該部分熱固性樹脂膜3之頂表面所組成的平坦表面。或者,固定元件4可為環氧樹脂、聚醯亞胺、或類似黏著劑。
接著,如圖5B所示,藉由已知之打線接合方法經由金線5將設置於第二半導體晶片20之佈線表面20e上的電極(未圖示)連接至佈線板30之電極33(33a)。元件符號21指示當在快速接合步驟中將壓縮接合球壓向設置於第二半導體晶片20之佈線表面20a上的電極時,設置於線5之尖端處之壓縮接合球的變形形式。
接著,如圖5C所示,將模製樹脂絕緣層(密封樹脂層)6以使第一半導體晶片10、第二半導體晶片20、線5等等經其覆蓋之方式形成於佈線板30上。其後經由固化使絕緣層6定形。舉例來說,模製樹脂係含有填料(例如,二氧化矽)之樹脂(於此具體例中為環氧樹脂)。絕緣層6可藉由諸如轉移模製及射出成型之各種方法的任一者形成。
以上已說明根據具體例之半導體封裝1之製造方法的個別步驟。
可藉由將焊料墊或引線接腳連接至設置於佈線板30之底表面中之電極(墊)33(33b)而形成外部連接端子,或可使用電極33(33b)作為外部連接端子。
如上所述,根據所揭示之半導體封裝及製造方法,在透過熱固性樹脂膜安裝於第一半導體晶片上之第二半導體晶片之外部尺寸大於第一半導體晶片之外部尺寸的POP半導體封裝中,熱固性樹脂膜可到達在第二半導體晶片之周邊部分(特定言之,轉角部分)正下方的部分,此使得可防止於該處形成空穴。
結果,在製造方法中,當將設置於第二半導體晶片之頂表面上之電極打線接合至佈線板之電極時,可防止第二半導體晶片之彎曲等等,且可使所得之連接穩定。此外,可抑制於模製步驟中形成模製空隙。
雖然已參照特定示例性具體例展示及描述本發明,但其他實施法係在申請專利範圍之範疇內。熟悉技藝人士當明瞭可於其中進行形式及細節之各種變化,而不脫離如由隨附申請專利範圍所定義之本發明的精神及範疇。
1...半導體封裝
2...接合工具(加熱頭)
3...熱固性樹脂膜
4...固定元件
5...金線
6...模製樹脂
10...第一半導體晶片
10a...第一半導體晶片之表面
11...連接凸塊
20...第二半導體晶片
20a...第二半導體晶片20之周邊部分
20b...第二半導體晶片20之轉角部分
20c...第二半導體晶片20之側面部分
20d...第二半導體晶片20之底表面
20e...第二半導體晶片20之頂表面
21...壓縮接合球的變形形式
30...佈線板
30a...佈線板30之頂表面
31...樹脂板
32...電極
32a...電極
33...電極
33a...電極
34...絕緣層
35...感光性抗蝕劑
36...基底
36a...轉角基底
36b...側面基底
37...焊料塗層
100...半導體封裝
103...電路板
104...第一LSI晶片
106...第二LSI晶片
110...下填料
200...半導體封裝
203...熱固性樹脂膜
210...第一半導體晶片
211...金凸塊
220...第二半導體晶片
220a...第二半導體晶片220之周邊部分
230...佈線板
232...電極
233...電極
237...焊料塗層
B...轉角部分
C...空穴
圖1係根據本發明一具體例之半導體裝置的示意截面圖;
圖2A至2C顯示形成半導體裝置之基底的方式;
圖3A至3C係說明根據具體例之半導體封裝之製造方法的示意截面圖;
圖4A至4C係說明根據具體例之半導體封裝之製造方法的示意截面圖;
圖5A至5C係說明根據具體例之半導體封裝之製造方法的示意截面圖;
圖6係相關技術半導體封裝之示意截面圖;
圖7係說明本申請人基於試驗所製造及研究之半導體封裝之組態及問題的照片;
圖8係說明本申請人基於試驗所製造及研究之半導體封裝之組態及問題的照片;及
圖9係說明本申請人基於試驗所製造及研究之半導體封裝之組態及問題的示意截面圖。
1...半導體封裝
3...熱固性樹脂膜
6...模製樹脂
10...第一半導體晶片
11...連接凸塊
20...第二半導體晶片
20a...第二半導體晶片20之周邊部分
20d...第二半導體晶片20之底表面
21...壓縮接合球的變形形式
30...佈線板
32...電極
32a...電極
33...電極
33a...電極
33b...電極
36...基底
L...伸出長度
Claims (5)
- 一種半導體封裝,其使第一半導體晶片透過熱固性樹脂膜經由覆晶安裝方式而熱壓接合至佈線板上,並使第二半導體晶片搭載於上述第一半導體晶片上而形成;如此之半導體封裝,其特徵在於:上述第二半導體晶片之外部尺寸係大於上述第一半導體晶片之外部尺寸;於上述佈線板上,在較上述第一半導體晶片之外部周邊更外側之位置處,且在上述第二半導體晶片之周邊部分正下方之位置處,設有高度不與該第二半導體晶片之底表面接觸之突出狀的基底;上述熱固性樹脂膜具有包覆上述基底之形狀,較上述第一半導體晶片之外部周邊更外側之位置的頂表面係形成為與該第一半導體晶片之頂表面齊平之平坦面,且配設於較上述第二半導體晶片之外部周邊更外側之周邊部分係形成為圓角形狀;作為上述基底,在對應於上述第二半導體晶片之轉角部分之位置處,設置有轉角基底,並且在對應於毗鄰上述第二半導體晶片之轉角部分間之側面部分之位置處,以與上述轉角基底相連或不相連之方式設置有側面基底。
- 如申請專利範圍第1項之半導體封裝,其中,上述轉角基底係形成為大致呈L形或圓弧形。
- 一種半導體封裝之製造方法,該半導體封裝係於佈線板上搭載有第一半導體晶片,並於該第一半導體晶片上搭載有外部尺寸大於該第一半導體晶片之第二半導體晶片而形成;如此之半導體封裝之製造方法,其具有:於上述佈線板上,在上述第二半導體晶片之周邊部分待設置之位置正下方的位置處,形成高度不與該第二半導體晶片之底表面接觸之突出狀的基底之步驟;透過指定形狀之熱固性樹脂膜經由覆晶安裝方式而將第一半導體晶片熱壓接合至上述佈線板上,上述熱固性樹脂膜係包覆上述基底,使位於較上述第一半導體晶片之外部周邊更外側的頂表面形成為與該第一半導體晶片之頂表面齊平之平坦面,且使配設於較上述第二半導體晶片之外部周邊更外側之周邊部分形成為圓角形狀之步驟;以及於上述第一半導體晶片上搭載上述第二半導體晶片之步驟;上述形成基底之步驟具有:在對應於待設置上述第二半導體晶片之轉角部分之位置的位置處,形成轉角基底之步驟;及在對應於待設置上述第二半導體晶片之毗鄰轉角部分間之側面部分之位置的位置處,以與上述轉角基底相連或不相連之方式形成側面基底之步驟。
- 如申請專利範圍第3項之半導體封裝之製造方法,其中,上述轉角基底係形成為大致呈L形或圓弧形。
- 如申請專利範圍第3或4項之半導體封裝之製造方法,其中,上述搭載第二半導體晶片之步驟,具備有:經由晶粒接合將上述第二半導體晶片接合至上述第一半導體晶片上之步驟;以及經由打線接合將設於上述第二半導體晶片頂表面之電極墊,與在上述佈線板上設於較上述第一半導體晶片之搭載位置更外側之電極墊相連接之步驟。
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