TWI497597B - Substrate handling method - Google Patents

Substrate handling method Download PDF

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Publication number
TWI497597B
TWI497597B TW096123567A TW96123567A TWI497597B TW I497597 B TWI497597 B TW I497597B TW 096123567 A TW096123567 A TW 096123567A TW 96123567 A TW96123567 A TW 96123567A TW I497597 B TWI497597 B TW I497597B
Authority
TW
Taiwan
Prior art keywords
oxide film
nitride film
substrate
processing method
film
Prior art date
Application number
TW096123567A
Other languages
English (en)
Chinese (zh)
Other versions
TW200818316A (en
Inventor
Eiichi Nishimura
Koichi Yatsuda
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200818316A publication Critical patent/TW200818316A/zh
Application granted granted Critical
Publication of TWI497597B publication Critical patent/TWI497597B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)
TW096123567A 2006-06-29 2007-06-28 Substrate handling method TWI497597B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006180184A JP5102467B2 (ja) 2006-06-29 2006-06-29 基板処理方法

Publications (2)

Publication Number Publication Date
TW200818316A TW200818316A (en) 2008-04-16
TWI497597B true TWI497597B (zh) 2015-08-21

Family

ID=39011559

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096123567A TWI497597B (zh) 2006-06-29 2007-06-28 Substrate handling method

Country Status (4)

Country Link
JP (1) JP5102467B2 (ja)
KR (1) KR100880747B1 (ja)
CN (1) CN100514572C (ja)
TW (1) TWI497597B (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8329587B2 (en) * 2009-10-05 2012-12-11 Applied Materials, Inc. Post-planarization densification
CN103403860B (zh) * 2011-03-04 2015-11-25 旭化成微电子株式会社 半导体装置、半导体装置的制造方法
US9093389B2 (en) * 2013-01-16 2015-07-28 Applied Materials, Inc. Method of patterning a silicon nitride dielectric film
JP6073172B2 (ja) * 2013-03-29 2017-02-01 岩谷産業株式会社 エッチング方法
KR102095983B1 (ko) * 2017-08-24 2020-04-02 피에스케이홀딩스 (주) 기판 처리 장치 및 기판 처리 방법
KR200489542Y1 (ko) 2017-09-12 2019-07-04 미라클통상 주식회사 애견용 방석·카시트 겸용 소파
KR102281826B1 (ko) * 2019-07-08 2021-07-23 세메스 주식회사 기판 처리 장치 및 방법
JP7414593B2 (ja) * 2020-03-10 2024-01-16 東京エレクトロン株式会社 基板処理方法及び基板処理装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6534351B2 (en) * 2001-03-19 2003-03-18 International Business Machines Corporation Gate-controlled, graded-extension device for deep sub-micron ultra-high-performance devices
US20040043638A1 (en) * 2002-08-30 2004-03-04 Fujitsu Amd Semiconductor Limited Semiconductor memory device and method for manufacturing semiconductor device
US20050181607A1 (en) * 2003-03-31 2005-08-18 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device
US20060042752A1 (en) * 2004-08-30 2006-03-02 Rueger Neal R Plasma processing apparatuses and methods
US20060057828A1 (en) * 2004-09-10 2006-03-16 Mitsuhiro Omura Method of manufacturing semiconductor device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1539700A (en) * 1976-05-14 1979-01-31 Int Plasma Corp Process for etching sio2
JPS57138139A (en) * 1981-02-19 1982-08-26 Nec Home Electronics Ltd Etching method for insulating film of semiconductor device
JPH0628259B2 (ja) 1982-12-27 1994-04-13 富士通株式会社 半導体装置の製造方法
JPS6276630A (ja) * 1985-09-30 1987-04-08 Toshiba Corp ドライ洗浄方法
US5279705A (en) * 1990-11-28 1994-01-18 Dainippon Screen Mfg. Co., Ltd. Gaseous process for selectively removing silicon nitride film
JPH09171996A (ja) * 1995-12-19 1997-06-30 Toshiba Corp 半導体基板の処理方法及びその処理装置
JP3519066B2 (ja) * 2001-08-27 2004-04-12 忠弘 大見 プラズマプロセス用装置
US7077903B2 (en) 2003-11-10 2006-07-18 International Business Machines Corporation Etch selectivity enhancement for tunable etch resistant anti-reflective layer
KR100541680B1 (ko) * 2003-11-28 2006-01-11 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
US20070209200A1 (en) 2004-03-31 2007-09-13 Tadahiro Ohmi Circuit Board, Method Of Manufacturing Circuit Board, And Display Device Having Circuit Board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6534351B2 (en) * 2001-03-19 2003-03-18 International Business Machines Corporation Gate-controlled, graded-extension device for deep sub-micron ultra-high-performance devices
US20040043638A1 (en) * 2002-08-30 2004-03-04 Fujitsu Amd Semiconductor Limited Semiconductor memory device and method for manufacturing semiconductor device
US20050181607A1 (en) * 2003-03-31 2005-08-18 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device
US20060042752A1 (en) * 2004-08-30 2006-03-02 Rueger Neal R Plasma processing apparatuses and methods
US20060057828A1 (en) * 2004-09-10 2006-03-16 Mitsuhiro Omura Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
KR100880747B1 (ko) 2009-02-02
JP2008010661A (ja) 2008-01-17
JP5102467B2 (ja) 2012-12-19
CN101097865A (zh) 2008-01-02
CN100514572C (zh) 2009-07-15
KR20080001612A (ko) 2008-01-03
TW200818316A (en) 2008-04-16

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