TWI486967B - 用於防止高電壓記憶體干擾之方法及電路 - Google Patents

用於防止高電壓記憶體干擾之方法及電路 Download PDF

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Publication number
TWI486967B
TWI486967B TW097126814A TW97126814A TWI486967B TW I486967 B TWI486967 B TW I486967B TW 097126814 A TW097126814 A TW 097126814A TW 97126814 A TW97126814 A TW 97126814A TW I486967 B TWI486967 B TW I486967B
Authority
TW
Taiwan
Prior art keywords
memory
power domain
output
voltage
oscillator
Prior art date
Application number
TW097126814A
Other languages
English (en)
Chinese (zh)
Other versions
TW200912954A (en
Inventor
Jon S Choy
Yanzhuo Wang
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200912954A publication Critical patent/TW200912954A/zh
Application granted granted Critical
Publication of TWI486967B publication Critical patent/TWI486967B/zh

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
TW097126814A 2007-08-03 2008-07-15 用於防止高電壓記憶體干擾之方法及電路 TWI486967B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/833,545 US7724603B2 (en) 2007-08-03 2007-08-03 Method and circuit for preventing high voltage memory disturb

Publications (2)

Publication Number Publication Date
TW200912954A TW200912954A (en) 2009-03-16
TWI486967B true TWI486967B (zh) 2015-06-01

Family

ID=40337974

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097126814A TWI486967B (zh) 2007-08-03 2008-07-15 用於防止高電壓記憶體干擾之方法及電路

Country Status (6)

Country Link
US (1) US7724603B2 (enExample)
JP (1) JP5335791B2 (enExample)
KR (1) KR101443419B1 (enExample)
CN (1) CN101772809B (enExample)
TW (1) TWI486967B (enExample)
WO (1) WO2009020718A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI392212B (zh) * 2008-09-17 2013-04-01 Holtek Semiconductor Inc 單晶片積體電路的控制電路
US7894285B2 (en) * 2008-11-13 2011-02-22 Micron Technology, Inc. Circuits, systems, and methods for reducing simultaneous switching output noise, power noise, or combinations thereof
JP5348541B2 (ja) * 2009-05-20 2013-11-20 ルネサスエレクトロニクス株式会社 半導体装置
JP2011175710A (ja) * 2010-02-24 2011-09-08 Toshiba Corp 半導体記憶装置
CN103973298B (zh) * 2013-01-28 2017-12-29 恒景科技股份有限公司 振荡起始电路
US9064559B2 (en) * 2013-08-15 2015-06-23 Arm Limited Memory device and method of performing access operations within such a memory device
US10096348B2 (en) * 2015-05-15 2018-10-09 Purdue Research Foundation Memory array with reduced read power requirements and increased capacity
CN110007739B (zh) * 2017-12-29 2023-09-12 华为技术有限公司 一种噪声屏蔽电路及芯片
US10528292B2 (en) 2018-05-22 2020-01-07 Luca De Santis Power down/power-loss memory controller
US11069415B2 (en) 2018-10-05 2021-07-20 Samsung Electronics Co., Ltd. Memory device including charge pump circuit
KR102545174B1 (ko) * 2018-10-05 2023-06-19 삼성전자주식회사 차지 펌프 회로를 포함하는 메모리 장치

Citations (6)

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Publication number Priority date Publication date Assignee Title
US20060092707A1 (en) * 2004-11-03 2006-05-04 Hong-Soo Jeon Bitline bias circuit and nor flash memory device including the bitline bias circuit
US20060114053A1 (en) * 2004-11-30 2006-06-01 Renesas Technology Corp. Charge-pump-type power supply circuit
TW200631027A (en) * 2004-12-16 2006-09-01 Sandisk Corp Memory sensing circuit and method for low voltage operation
US7149132B2 (en) * 2004-09-24 2006-12-12 Ovonyx, Inc. Biasing circuit for use in a non-volatile memory device
US20070081392A1 (en) * 2005-10-10 2007-04-12 Sung-Kug Park Flash memory device and voltage generating circuit for the same
US20070115727A1 (en) * 2005-11-22 2007-05-24 Samsung Electronics Co., Ltd. Flash memory device having pump with multiple output voltages

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US5099297A (en) 1988-02-05 1992-03-24 Emanuel Hazani EEPROM cell structure and architecture with programming and erase terminals shared between several cells
JP2568442B2 (ja) * 1989-07-14 1997-01-08 セイコー電子工業株式会社 半導体集積回路装置
US5345422A (en) 1990-07-31 1994-09-06 Texas Instruments Incorporated Power up detection circuit
JPH06236694A (ja) 1991-05-07 1994-08-23 Intel Corp 高電圧レベル変換回路
JPH05109291A (ja) * 1991-10-14 1993-04-30 Toshiba Corp 不揮発性半導体記憶装置
US5267218A (en) 1992-03-31 1993-11-30 Intel Corporation Nonvolatile memory card with a single power supply input
US5602794A (en) * 1995-09-29 1997-02-11 Intel Corporation Variable stage charge pump
TW423162B (en) * 1997-02-27 2001-02-21 Toshiba Corp Power voltage supplying circuit and semiconductor memory including the same
JPH1196800A (ja) * 1997-09-24 1999-04-09 Hitachi Ltd 半導体集積回路装置
US6445606B1 (en) * 2001-05-10 2002-09-03 Koninklijke Philips Electronics N.V. Secure poly fuse ROM with a power-on or on-reset hardware security features and method therefor
KR100562636B1 (ko) * 2003-12-30 2006-03-20 주식회사 하이닉스반도체 반도체 메모리 소자의 파워업 회로
US7187600B2 (en) * 2004-09-22 2007-03-06 Freescale Semiconductor, Inc. Method and apparatus for protecting an integrated circuit from erroneous operation
KR100591773B1 (ko) * 2004-12-20 2006-06-26 삼성전자주식회사 불휘발성 반도체 메모리 장치 및 그것을 위한 전압 발생회로
KR100648295B1 (ko) * 2005-10-12 2006-11-23 삼성전자주식회사 플래시 메모리 장치 및 그것을 위한 전압 발생회로
US8098089B2 (en) * 2006-07-28 2012-01-17 Stmicroelectronics S.R.L. Voltage booster

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7149132B2 (en) * 2004-09-24 2006-12-12 Ovonyx, Inc. Biasing circuit for use in a non-volatile memory device
US20060092707A1 (en) * 2004-11-03 2006-05-04 Hong-Soo Jeon Bitline bias circuit and nor flash memory device including the bitline bias circuit
US20060114053A1 (en) * 2004-11-30 2006-06-01 Renesas Technology Corp. Charge-pump-type power supply circuit
TW200631027A (en) * 2004-12-16 2006-09-01 Sandisk Corp Memory sensing circuit and method for low voltage operation
US20070081392A1 (en) * 2005-10-10 2007-04-12 Sung-Kug Park Flash memory device and voltage generating circuit for the same
US20070115727A1 (en) * 2005-11-22 2007-05-24 Samsung Electronics Co., Ltd. Flash memory device having pump with multiple output voltages

Also Published As

Publication number Publication date
WO2009020718A1 (en) 2009-02-12
US20090034352A1 (en) 2009-02-05
JP2010536115A (ja) 2010-11-25
CN101772809A (zh) 2010-07-07
JP5335791B2 (ja) 2013-11-06
KR20100066479A (ko) 2010-06-17
TW200912954A (en) 2009-03-16
KR101443419B1 (ko) 2014-09-24
US7724603B2 (en) 2010-05-25
CN101772809B (zh) 2013-02-13

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