TWI462156B - 循環沈積薄膜之方法 - Google Patents

循環沈積薄膜之方法 Download PDF

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TWI462156B
TWI462156B TW100127083A TW100127083A TWI462156B TW I462156 B TWI462156 B TW I462156B TW 100127083 A TW100127083 A TW 100127083A TW 100127083 A TW100127083 A TW 100127083A TW I462156 B TWI462156 B TW I462156B
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film
tantalum
forming
insulating film
germanium
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TW201227807A (en
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Hai Won Kim
Sang Ho Woo
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Eugene Technology Co Ltd
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Description

循環沈積薄膜之方法
本發明所揭示之內容係關於一種循環沈積薄膜之方法，且更具體地說，係指一種循環沈積薄膜之方法，其係形成一含矽絕緣膜。
隨著半導體業界之進展與近來使用者的需求，電子裝置係經更高度整合並具高效率，因此為電子裝置主要組件之半導體裝置亦需經高度整合並具高效能。不過，要完成高度整合半導體裝置的精細結構是困難的。
舉例而言，完成精細結構需要較薄之絕緣膜，但若要將絕緣膜形成為厚度薄之絕緣膜，則膜性質(如：絕緣特性)將會降低。而且，當獲得優異的階梯覆蓋率(step coverage)時，形成厚度薄之薄膜變得更加困難。
本發明之目的在於解決上述問題，並提供一種沈積絕緣膜方法，其係沈積一種具有優異膜性質及階梯覆蓋率之絕緣膜。具體地說，本發明提供一種循環沈積薄膜之方法，該沈積薄膜具有優異膜性質及階梯覆蓋率。
透過下列詳細說明及附圖，將更清楚了解本發明之目的。
本發明之一方面，提供一種循環沈積薄膜之方法，該方法包含：形成矽薄膜步驟，其藉由重複一矽沈積步驟以及一第一清洗步驟而進行，該矽沈積步驟係將矽沈積至一基材上，藉由將一矽前驅物注入至載有該基材之一反應室來進 行，而該第一清洗步驟，用以移除來自該反應室之一未反應之矽前驅物以及一反應副產物；以及形成含矽絕緣膜步驟，係將一電漿氣氛形成於該反應室中而自該矽薄膜形成該含矽絕緣膜。
該形成含矽絕緣膜步驟可包含：注入一種以上之反應氣體，該反應氣體係選自於由：O2 、O3 、N2 及NH3 所組成之群組。
該含矽絕緣膜可為氧化矽膜或氮化矽膜。
該形成含矽絕緣膜步驟可包含：，其係藉由注入一種以上之點火氣體而形成電漿氣氛，該點火氣體選自於由：Ar、He、Kr及Xe所組成之群組。
該點火氣體可以100至3000sccm之流速注入，且該反應氣體以10至500sccm之流速注入。
該形成含矽絕緣膜步驟可使用O2 或O3 作為點火氣體，以形成電漿氣氛。
該方法可進一步包含一第二清洗步驟，用以在進行該形成含矽絕緣膜步驟後，由該反應室移除反應副產物，其中該形成矽薄膜步驟、該形成含矽絕緣膜步驟與該第二清洗步驟係重複進行。
該形成矽薄膜步驟係藉由重複該矽沈積步驟和該第一清洗步驟3至10次來進行。
該形成矽薄膜步驟可於當反應室內壓力維持於0.05Torr至10Torr時進行。
該形成含矽絕緣膜步驟可於當反應室內壓力維持於0.05Torr至10Torr時進行。
該形成矽薄膜步驟可形成包含非晶矽或具有多晶性聚矽特性之矽薄膜。
以下，將參考附圖，詳細介紹根據本發明之發明構思的實施樣態。然而，本發明之發明構思的實施樣態可以各種形式加以修飾，而且本發明的範圍和精神不應解釋為受限於下述之實施樣態。提供根據本發明之發明構思的實施樣態，使該技術領域中熟習該項技術者可更充分理解本發明。在附圖中，類似參考編號係指相似元件。此外，附圖中的各種元件和區域為示意性描述。因此，本發明不僅限於附圖中描述的相對大小或間距。
第1圖係為依據本發明之一實施樣態，說明一種循環沈積薄膜之方法的流程圖。參考第1圖，將一基材載入半導體製造設備之一反應室S100。在載入反應室之基材上沈積一矽薄膜S200，且在步驟S200中，矽沈積步驟S210與第一清洗步驟S220一起進行以沈積該矽薄膜。
在步驟S210中，藉由將一矽前驅物注入至載有該基材之反應室，將矽沈積於該基材上。在矽沈積於該基材上後，在步驟S220中，進行該第一清洗步驟，移除來自該反應室之未反應之矽前驅物以及反應副產物。接著，藉由重複S230矽沈積步驟S210和第一清洗步驟S220，將矽薄膜形成在基材上。
可重複該矽沈積步驟S210和該第一清洗步驟S220，如：3至10次。各矽沈積步驟S210中，可完成一種以上之矽原子層。因此，藉由重複進行該矽沈積步驟S210和該第一清洗步驟S220，可在基材上，形成由具非晶矽或多晶性聚矽特性組成之矽薄膜。具非晶矽或多晶性聚矽特性之矽薄膜可具有數Å或10Å之厚度。
接著，自形成於基材上之矽薄膜，來形成含矽絕緣膜S300。例如，該含矽絕緣膜可為氣化矽膜或氮化矽膜。
為了自該矽薄膜形成含矽絕緣膜，可將一反應氣體注入該反應室，以在反應室內形成電漿氣氛。該反應氣體可為一種以上之氣體，其係選自於由：O2 、O3 、N2 及NH3 所組成之群組。
若含矽絕緣膜為氧化矽膜，該反應氣體可為含氧原子之氣體，如O2 或O3 。若含矽絕緣膜為氮化矽膜，該反應氣體可為含氮原子之氣體，如N2 或NH3 。
或者，為了形成含矽絕緣膜，如：自矽薄膜形成氧化矽膜，可使用O2 或O3 作為點火氣體來形成反應室內的電漿氣氛。
或者，為了形成含矽絕緣膜，如：自該矽薄膜形成氮化矽膜，可使用N2 或NH3 作為點火氣體來形成反應室內的電漿氣氛。
因此，在步驟S400中，進行一第二清洗步驟，以自該反應室移除反應副產物及反應氣體，或點火氣體。
為了獲得具所需厚度之含矽絕緣膜，可重複進行沈積矽薄膜步驟S200、形成含矽絕緣膜步驟S300及第二清洗步驟S400。
在步驟S900中，當含矽並具所需厚度之絕緣膜形成時，可將基材自反應室卸下。
第2圖係為依據本發明之一實施樣態，說明進行一種循環沈積薄膜之方法的半導體製造設備之剖面示意圖。參考第2圖，於一半導體製造設備10之反應室11，設有一導入單元12，以將反應氣體導入。反應氣體藉由導入單元12導入，係可透過一噴頭13噴灑進反應室11。
將用於沈積之基材100置於一夾盤(chuck)14，該夾盤14係由一夾盤座16支撐。如有需要，夾盤14係對基材100加熱，以使基材100具特定溫度。沈積作用藉由半導體 製造設備10進行，且其後，以一排出單元(discharge part)17排出。
而且，為了形成一電漿氣氛，該半導體製造設備10可包含一電漿產生單元18。
第3圖係為依據本發明之一實施樣態，描述一種循環沈積薄膜之方法的示意圖。參考第3圖，重複進行矽前驅物之注入及清洗。重複進行矽前驅物注入及清洗後，形成電漿氣氛。在電漿氣氛已形成之狀態中，如有需要可注入一反應氣體。
如此一來，完成由重複進行矽前驅物注入及清洗步驟至形成電漿氣氛步驟作為一個循環。意即，在重複進行矽前驅物注入及清洗形成矽薄膜後，進行利用形成電漿氣氛來形成絕緣膜步驟，作為一個循環。
因此，可以藉由重複進行矽前驅物注入及清洗，並重複進行形成矽薄膜步驟和形成絕緣膜步驟來實行循環沈積薄膜之方法。
依據本發明之一實施樣態，循環沈積薄膜之方法將基於上述說明，參考第4A至7圖，加以具體描述。以下第4A至7圖中的說明，如有需要可使用第1至3圖之參考編號。
第4A至4C圖係為依據本發明之一實施樣態，說明沈積矽步驟之剖面圖。第4A圖係為依據本發明之一實施樣態，說明注入矽前驅物步驟之剖面圖。
參考第4A圖，將一矽前驅物50注入至載有基材100之反應室11。基材100，舉例來說，可包括：一半導體基材，如：矽或化合物半導體晶圓。或者，基材100可包括：不同於半導體之基材材料，如：玻璃、金屬、陶瓷及石英。
矽前驅物50，舉例來說，可為胺系矽烷(如：雙乙基甲胺基矽烷(bisethylmethylaminosilane,BEMAS)、雙二甲胺 基矽烷(bisdimethylaminosilane,BDMAS)、BEDAS、四乙基甲胺基矽烷(tetrakisethylmethylaminosilane,TEMAS)、四二乙基甲胺基矽烷(tetrakisidimethylaminosilane,TDMAS)及TEDAS；氯系矽烷(如：六氯二矽烷(hexachlorinedisilane,HCD)、或者包括矽及氫之矽烷前驅物。
基材100可維持於約50℃至約600℃之溫度，來與矽前驅物50反應。而且，載有基材100之反應室11內之壓力可維持於約0.05Torr至約10Torr。
第4B圖係為依據本發明之一實施樣態，說明在基材上沈積矽步驟之剖面圖。參考第4B圖，以部分矽前驅物50與基材100反應，可將矽原子置於基材100上，因此可形成一矽層112。該矽層112可由一種以上矽原子層形成。
部分矽前驅物50可與基材100反應，因而形成副產物52。而且，其他部分矽前驅物50可維持在一未反應狀態，不需與基材100反應。
第4C圖係為依據本發明之一實施樣態，說明進行第一清洗步驟之剖面圖。參考第4C圖，該矽層112形成於基材100上，接著可進行一清洗步驟，由反應室11移除剩餘的未反應狀態的矽前驅物50，以及已反應之副產物52。自該反應室11移除剩餘的未反應狀態的矽前驅物50，以及已反應之副產物52之清洗步驟，可稱之為第一清洗步驟。
第一清洗步驟中，基材100可維持於約50℃至約600℃之溫度。而且，載有基材100之反應室11內之壓力維持於0.05Torr至10Torr。意即，在沈積該矽層112及第一清洗步驟期間，基材100之溫度與反應室11內之壓力維持恆定。
第5圖係為依據本發明之一實施樣態，說明沈積矽薄膜步驟之剖面圖。參考第5圖，在基材100上，重複第4A 至C圖之步驟沈積複數矽層112、114及116，形成包含非晶矽或具多晶性聚矽特性之矽薄膜110。
矽薄膜110可具有數Å或10Å之厚度。沈積矽薄膜110步驟和該第一清洗步驟可重複進行3至10次，以使矽薄膜110包含3至10層矽層112、114及116。
以此方式，若形成包括複數矽層112、114及116之矽薄膜110，則矽薄膜110可具有優異的膜性質及階梯覆蓋率。
第6A圖係為依據本發明之一實施樣態，說明由矽薄膜形成含矽絕緣膜步驟之剖面圖。參考第6A圖，將電漿施用於矽薄膜110形成之基材100上。意即，載有基材100之反應室11內形成一電漿氣氛。為了形成電漿氣氛，可使用電感耦合電漿(Inductively Coupled Plasma,ICP)、電容耦合電漿(Capacitively Coupled Plasma,CCP)或微波(Microwave,MW)電漿。此時，可施予約100W至約3kW的功率來形成電漿氣氛。
為了形成電漿氣氛，舉例來說，可注入一種以上之點火氣體，該點火氣體選自於由：Ar、He、Kr及Xe所組成之群組，以及，如：一種以上之反應氣體60，其係選自於由：O2 、O3 、N2 及NH3 所組成之群組。在此例中，點火氣體可以約100sccm至約3000sccm之流速注入。
或者，為了形成電漿氣氛，可注入一種以上之反應氣體60，其選自於由：O2 、O3 、N2 及NH3 所組成之群組。此例中，反應氣體作為點火氣體，因此不會注入個別的點火氣體。
舉例來說，當含氧原子之氣體，如O2 或O3 作為反應氣體60時，矽薄膜110可與反應氣體60中所含氧原子反應，因而形成氧化矽膜。或者，當含氮原子之氣體，如N2 或NH3 作為反應氣體60時，矽薄膜110可與反應氣體60 中所含氮原子反應，因而形成氮化矽膜。
為了將矽薄膜110變成下述在電漿環境的含矽絕緣膜(如：氧化矽膜或氮化矽膜)，可將載有基材100之反應室11內之壓力維持於0.05Torr至10Torr。
第6B圖係為依據本發明之一實施樣態，說明進行含矽第二清洗步驟之剖面圖。參考第6A及B圖，可藉由第二清洗步驟來形成含矽絕緣膜步驟120a，係以第二清洗步驟移除剩餘的反應氣體以及已反應之副產物。含矽絕緣膜120a可為如：氧化矽膜或氮化矽膜。
若在電漿氣氛中形成含矽絕緣膜120a(如：氧化矽膜或氮化矽膜)，則可獲得優異膜性質。尤其是，即使形成具有厚度薄的含矽絕緣膜120a時，含矽絕緣膜120a仍可具優異膜性質。
而且，如同上述，因為矽薄膜110具有優異膜性質及階梯覆蓋率，所以含矽絕緣膜120a也可具優異膜性質及階梯覆蓋率。尤其是，因為含矽絕緣膜120a是形成於在電漿氣氛中，故含矽絕緣膜120a可具更為優異的膜性質。
自該反應室11移除剩餘的未反應狀態之反應氣體60以及已反應之副產物之清洗步驟，可稱之為第二清洗步驟。
第7圖係為依據本發明之一實施樣態，說明含矽絕緣膜之剖面圖。參考第7圖，藉由重複上述第4A圖至第6B圖之步驟，可形成絕緣膜120，其包括複數含矽絕緣膜120a及120b。
若是由第6圖所示的矽薄膜110形成含矽絕緣膜120a，則將矽薄膜110改成來自露出表面之絕緣膜。因此，若矽薄膜110是厚的，則與矽薄膜反應之氧或氮，必需透過形成於矽薄膜表面上之絕緣膜擴散。因此，當矽薄膜110之厚度變厚時，形成絕緣膜之速度變低。
與依次由相對較厚的矽薄膜形成絕緣膜相比，若絕緣膜120相對較厚，則可在形成一相對較薄之矽薄膜後，重複形成含矽絕緣膜之步驟，來降低處理時間。
因此，考量含矽絕緣膜處理時間及所需厚度，可決定重複第4A圖至第6B圖之步驟的次數。
而且，儘管以含兩個含矽絕緣膜120a及120b來說明絕緣膜120，但絕緣膜120可包含三個以上的含矽絕緣膜。
依據本發明之一實施樣態，循環沈積薄膜之方法可形成具有優異膜性質及階梯覆蓋率的絕緣膜(如：氧化矽層或氮化矽層)。
因此，可形成厚度薄的絕緣膜以完成高度整合之半導體裝置，而且由於絕緣膜具有優異的階梯覆蓋率，因此可完成精細結構。而且，由於絕緣膜具良好的膜性質，因此循環沈積薄膜之方法可滿足高度整合之半導體裝置所需之效能。
本發明已透過較佳實施樣態加以描述，但本發明也可以其他實施樣態加以實施。因此，下述申請專利範圍的技術精神和範圍並不限於較佳實施樣態。
由於本發明可以不悖離其精神和必要特徵之方式具體化，亦應理解為上述實施樣態並未被前述說明之任何細節所限制。除非另有說明，如所附申請專利範圍所定義的，在其精神和範圍內應寬廣解釋，且因此落入申請專利範圍界限與範圍的所有變化和修飾，或此等界限與範圍的均等物，因而由所附申請專利範圍所涵蓋。
S100‧‧‧載入基材
S200‧‧‧沉積絕緣膜
S210‧‧‧沉積矽
S220‧‧‧第一清洗
S230‧‧‧重複
S300‧‧‧形成矽絕緣膜
S400‧‧‧第二清洗
S500‧‧‧重複
S600‧‧‧卸下基材
10‧‧‧半導體製造設備
11‧‧‧反應室
12‧‧‧導入單元
13‧‧‧噴頭
14‧‧‧夾盤
16‧‧‧夾盤座
17‧‧‧排出單元
18‧‧‧電漿產生單元
100‧‧‧基材
110‧‧‧矽薄膜
112,114,116‧‧‧矽層
120‧‧‧絕緣膜
120a,120b‧‧‧含矽絕緣膜
50‧‧‧矽前驅物
52‧‧‧副產物
60‧‧‧反應氣體
第1圖係為依據本發明之一實施樣態，說明一種循環沈積薄膜之方法的流程圖。
第2圖係為依據本發明之一實施樣態，說明進行一種循環沈積薄膜之方法的半導體製造設備之剖面示意圖。
第3圖係為依據本發明之一實施樣態，描述一種循環沈積薄膜之方法的示意圖。
第4A至4C圖係為依據本發明之一實施樣態，描述沈積矽步驟之剖面圖。
第5圖係為依據本發明之一實施樣態，說明形成矽薄膜步驟之剖面圖。
第6A圖係為依據本發明之一實施樣態，說明由矽薄膜形成含矽絕緣膜步驟之剖面圖。
第6B圖係為依據本發明之一實施樣態，說明進行第二清洗步驟之剖面圖。
第7圖係為依據本發明之一實施樣態，說明含矽絕緣膜之剖面圖。
S100‧‧‧載入基材
S200‧‧‧沉積絕緣膜
S210‧‧‧沉積矽
S220‧‧‧第一清洗
S230‧‧‧重複
S300‧‧‧形成矽絕緣膜
S400‧‧‧第二清洗
S500‧‧‧重複
S600‧‧‧卸下基材

Claims (9)

  1. 一種沈積薄膜之方法，該方法包含步驟：形成矽薄膜，其係藉由連續重複一矽沈積步驟以及一第一清洗步驟至少兩次，該矽沈積步驟係將矽沈積至一基材上以形成一矽層，其藉由將一矽前驅物注入至載有該基材之一反應室進行，該第一清洗步驟，用以移除來自該反應室之未反應之矽前驅物以及反應副產物，藉此形成一矽薄膜，其包含複數矽層並具有優異膜性質及階梯覆蓋率；以及形成一含矽絕緣膜，其係在形成該矽薄膜後將一電漿氣氛形成於該反應室中而自該矽薄膜形成該含矽絕緣膜，其中該矽薄膜係包含非晶矽或具有多晶性聚矽。
  2. 如申請專利範圍第1項所述之方法，其中該形成含矽絕緣膜步驟包含：注入一種以上之反應氣體，該反應氣體係選自於由：O2 、O3 、N2 及NH3 所組成之群組。
  3. 如申請專利範圍第1項或第2項所述之方法，其中該含矽絕緣膜係為一氧化矽膜或一氮化矽膜。
  4. 如申請專利範圍第2項所述之方法，其中該形成含矽絕緣膜步驟包含：其係藉由注入一種以上之點火氣體而形成電漿氣氛，該點火氣體選自於由：Ar、He、Kr及Xe所組成之群組。
  5. 如申請專利範圍第4項所述之方法，其中該點火氣體以100至3000sccm之流速注入，且該反應氣體以10至500sccm之流速注入。
  6. 如申請專利範圍第1項所述之方法，其中該形成含矽絕緣膜步驟包含：使用O2 或O3 作為一點火氣體以形成該電漿氣氛。
  7. 如申請專利範圍第1項所述之方法，進一步包含 一第二清洗步驟，用以在進行該形成含矽絕緣膜步驟後，由該反應室移除反應副產物，其中該形成矽薄膜步驟、該形成含矽絕緣膜步驟與該第二清洗步驟係重複進行。
  8. 如申請專利範圍第1項所述之方法，其中該形成矽薄膜步驟係當反應室內壓力維持於0.05Torr至10Torr時來進行。
  9. 如申請專利範圍第1項所述之方法，其中該形成含矽絕緣膜步驟係於當反應室內壓力維持於0.05Torr至10Torr時進行。
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US8637411B2 (en) 2010-04-15 2014-01-28 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US8956983B2 (en) 2010-04-15 2015-02-17 Novellus Systems, Inc. Conformal doping via plasma activated atomic layer deposition and conformal film deposition
US9892917B2 (en) 2010-04-15 2018-02-13 Lam Research Corporation Plasma assisted atomic layer deposition of multi-layer films for patterning applications
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US9997357B2 (en) 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US9611544B2 (en) 2010-04-15 2017-04-04 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US20110256734A1 (en) 2010-04-15 2011-10-20 Hausmann Dennis M Silicon nitride films and methods
US9373500B2 (en) 2014-02-21 2016-06-21 Lam Research Corporation Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
US9076646B2 (en) 2010-04-15 2015-07-07 Lam Research Corporation Plasma enhanced atomic layer deposition with pulsed plasma exposure
US9390909B2 (en) 2013-11-07 2016-07-12 Novellus Systems, Inc. Soft landing nanolaminates for advanced patterning
US9685320B2 (en) 2010-09-23 2017-06-20 Lam Research Corporation Methods for depositing silicon oxide
US8647993B2 (en) 2011-04-11 2014-02-11 Novellus Systems, Inc. Methods for UV-assisted conformal film deposition
US8592328B2 (en) * 2012-01-20 2013-11-26 Novellus Systems, Inc. Method for depositing a chlorine-free conformal sin film
KR101416069B1 (ko) * 2012-04-02 2014-07-07 주식회사 아이브이웍스 저온 박막 증착 방법
KR102207992B1 (ko) 2012-10-23 2021-01-26 램 리써치 코포레이션 서브-포화된 원자층 증착 및 등각막 증착
SG2013083241A (en) 2012-11-08 2014-06-27 Novellus Systems Inc Conformal film deposition for gapfill
JP6538300B2 (ja) 2012-11-08 2019-07-03 ノベラス・システムズ・インコーポレーテッドＮｏｖｅｌｌｕｓ Ｓｙｓｔｅｍｓ Ｉｎｃｏｒｐｏｒａｔｅｄ 感受性基材上にフィルムを蒸着するための方法
JP6087609B2 (ja) * 2012-12-11 2017-03-01 東京エレクトロン株式会社 金属化合物膜の成膜方法、成膜装置、および電子製品の製造方法
KR101494274B1 (ko) * 2013-11-08 2015-02-17 주식회사 유진테크 사이클릭 박막 증착 방법 및 반도체 제조 방법, 그리고 비휘발성 메모리 셀
KR101551199B1 (ko) * 2013-12-27 2015-09-10 주식회사 유진테크 사이클릭 박막 증착 방법 및 반도체 제조 방법, 그리고 반도체 소자
US9214334B2 (en) 2014-02-18 2015-12-15 Lam Research Corporation High growth rate process for conformal aluminum nitride
US9478411B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS
US9478438B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor
US9214333B1 (en) 2014-09-24 2015-12-15 Lam Research Corporation Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD
US9589790B2 (en) 2014-11-24 2017-03-07 Lam Research Corporation Method of depositing ammonia free and chlorine free conformal silicon nitride film
US9564312B2 (en) 2014-11-24 2017-02-07 Lam Research Corporation Selective inhibition in atomic layer deposition of silicon-containing films
US10566187B2 (en) 2015-03-20 2020-02-18 Lam Research Corporation Ultrathin atomic layer deposition film accuracy thickness control
US9502238B2 (en) 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch
US10526701B2 (en) 2015-07-09 2020-01-07 Lam Research Corporation Multi-cycle ALD process for film uniformity and thickness profile modulation
US9601693B1 (en) 2015-09-24 2017-03-21 Lam Research Corporation Method for encapsulating a chalcogenide material
US9773643B1 (en) 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10062563B2 (en) 2016-07-01 2018-08-28 Lam Research Corporation Selective atomic layer deposition with post-dose treatment
US10629435B2 (en) 2016-07-29 2020-04-21 Lam Research Corporation Doped ALD films for semiconductor patterning applications
US10074543B2 (en) 2016-08-31 2018-09-11 Lam Research Corporation High dry etch rate materials for semiconductor patterning applications
US10037884B2 (en) 2016-08-31 2018-07-31 Lam Research Corporation Selective atomic layer deposition for gapfill using sacrificial underlayer
US9865455B1 (en) 2016-09-07 2018-01-09 Lam Research Corporation Nitride film formed by plasma-enhanced and thermal atomic layer deposition process
US10454029B2 (en) 2016-11-11 2019-10-22 Lam Research Corporation Method for reducing the wet etch rate of a sin film without damaging the underlying substrate
US10832908B2 (en) 2016-11-11 2020-11-10 Lam Research Corporation Self-aligned multi-patterning process flow with ALD gapfill spacer mask
US10134579B2 (en) 2016-11-14 2018-11-20 Lam Research Corporation Method for high modulus ALD SiO2 spacer
US10176984B2 (en) 2017-02-14 2019-01-08 Lam Research Corporation Selective deposition of silicon oxide
US10559461B2 (en) 2017-04-19 2020-02-11 Lam Research Corporation Selective deposition with atomic layer etch reset
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
US10460930B2 (en) * 2017-11-22 2019-10-29 Lam Research Corporation Selective growth of SiO2 on dielectric surfaces in the presence of copper
US11404275B2 (en) 2018-03-02 2022-08-02 Lam Research Corporation Selective deposition using hydrolysis
KR20200021834A (ko) * 2018-08-21 2020-03-02 주성엔지니어링(주) 박막 형성 장치 및 이를 이용한 박막 형성 방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200501232A (en) * 2002-09-30 2005-01-01 Adv Lcd Tech Dev Ct Co Ltd Substrate processing apparatus and substrate processing method
TW200847278A (en) * 2006-11-30 2008-12-01 Tokyo Electron Ltd Film formation apparatus for semiconductor process and method for using the same
TW200917342A (en) * 2007-08-10 2009-04-16 Micron Technology Inc Semiconductor processing
TW200947527A (en) * 2008-03-14 2009-11-16 Tokyo Electron Ltd Film formation apparatus for semiconductor process and method for using same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100275738B1 (ko) * 1998-08-07 2000-12-15 윤종용 원자층 증착법을 이용한 박막 제조방법
KR20020081902A (ko) * 2001-04-20 2002-10-30 아남반도체 주식회사 산소 라디칼을 이용한 실리콘 산화막의 제조 방법
WO2004009861A2 (en) * 2002-07-19 2004-01-29 Asm America, Inc. Method to form ultra high quality silicon-containing compound layers
US20070212850A1 (en) * 2002-09-19 2007-09-13 Applied Materials, Inc. Gap-fill depositions in the formation of silicon containing dielectric materials
JP4563113B2 (ja) * 2004-08-26 2010-10-13 株式会社日立国際電気 シリコン酸化膜の形成方法、半導体デバイスの製造方法および基板処理装置
KR100734393B1 (ko) 2005-11-28 2007-07-02 주식회사 에이이티 실리콘 박막의 원자층 증착 방법
US7947981B2 (en) * 2007-01-30 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Display device
US20090041952A1 (en) 2007-08-10 2009-02-12 Asm Genitech Korea Ltd. Method of depositing silicon oxide films
JP5233562B2 (ja) * 2008-10-04 2013-07-10 東京エレクトロン株式会社 成膜方法及び成膜装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200501232A (en) * 2002-09-30 2005-01-01 Adv Lcd Tech Dev Ct Co Ltd Substrate processing apparatus and substrate processing method
TW200847278A (en) * 2006-11-30 2008-12-01 Tokyo Electron Ltd Film formation apparatus for semiconductor process and method for using the same
TW200917342A (en) * 2007-08-10 2009-04-16 Micron Technology Inc Semiconductor processing
TW200947527A (en) * 2008-03-14 2009-11-16 Tokyo Electron Ltd Film formation apparatus for semiconductor process and method for using same

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