TWI461349B - Carbon nanotube wiring and its manufacturing method - Google Patents
Carbon nanotube wiring and its manufacturing method Download PDFInfo
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- TWI461349B TWI461349B TW100129369A TW100129369A TWI461349B TW I461349 B TWI461349 B TW I461349B TW 100129369 A TW100129369 A TW 100129369A TW 100129369 A TW100129369 A TW 100129369A TW I461349 B TWI461349 B TW I461349B
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims description 214
- 229910021393 carbon nanotube Inorganic materials 0.000 title claims description 206
- 239000002041 carbon nanotube Substances 0.000 title claims description 206
- 238000004519 manufacturing process Methods 0.000 title claims description 58
- 239000003054 catalyst Substances 0.000 claims description 166
- 230000000149 penetrating effect Effects 0.000 claims description 79
- 238000002161 passivation Methods 0.000 claims description 60
- 229910052751 metal Inorganic materials 0.000 claims description 51
- 239000002184 metal Substances 0.000 claims description 51
- 238000000034 method Methods 0.000 claims description 42
- 230000003197 catalytic effect Effects 0.000 claims description 31
- 229910052732 germanium Inorganic materials 0.000 claims description 13
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 13
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 238000010884 ion-beam technique Methods 0.000 claims description 8
- 229910005883 NiSi Inorganic materials 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 348
- 239000010410 layer Substances 0.000 description 143
- 230000004888 barrier function Effects 0.000 description 36
- 238000005229 chemical vapour deposition Methods 0.000 description 24
- 230000008569 process Effects 0.000 description 18
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 15
- 239000007789 gas Substances 0.000 description 15
- 230000000694 effects Effects 0.000 description 14
- 239000000758 substrate Substances 0.000 description 11
- 238000001020 plasma etching Methods 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- 229910004298 SiO 2 Inorganic materials 0.000 description 8
- 229910052799 carbon Inorganic materials 0.000 description 8
- 238000009413 insulation Methods 0.000 description 8
- 239000004020 conductor Substances 0.000 description 7
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- 239000013039 cover film Substances 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 239000004215 Carbon black (E152) Substances 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 5
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 5
- 238000000231 atomic layer deposition Methods 0.000 description 5
- 239000012159 carrier gas Substances 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 description 5
- 229930195733 hydrocarbon Natural products 0.000 description 5
- 150000002430 hydrocarbons Chemical class 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000004528 spin coating Methods 0.000 description 5
- 229910052721 tungsten Inorganic materials 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910021392 nanocarbon Inorganic materials 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000001737 promoting effect Effects 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 239000011941 photocatalyst Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
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- 229910052707 ruthenium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
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- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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Description
本發明主張日本申請案JP2010-188662(申請日:2010/08/25)之優先權,內容亦參照其全部內容。
本發明關於奈米碳管配線及其製造方法。
最先端裝置使用之LSI配線構造,其之配線及孔徑之微細化被進展著。
使用奈米碳管(CNT:Carbon Nanotube)作為LSI配線之孔徑材料之開發被進行著。奈米碳管,基於各種奈米構造之差異而顯現各樣之量子效應,可以作成絕緣體/半導體/導體。特別是形成奈米碳管之導體時被期待著量化傳導(彈道傳導(ballisTic transport))。因此,奈米碳管可以取代現存之金屬材料(例如Cu配線)作為超低電阻材料使用。
依據一實施形態之奈米碳管配線,係包含:第1導電層;絕緣膜;觸媒底層膜;觸媒鈍化膜;觸媒膜;及複數奈米碳管。上述絕緣膜,係形成於上述第1導電層上,具有由上面至下面予以貫穿之貫穿孔(hole)。上述觸媒底
層膜,係形成於上述貫穿孔內之底面之上述第1導電層上及上述貫穿孔內之側面之上述絕緣膜上。上述觸媒鈍化膜,係形成於上述貫穿孔內之側面之上述觸媒底層膜上。上述觸媒膜,係形成於上述貫穿孔內之底面之上述觸媒底層膜上及上述貫穿孔內之側面之上述觸媒鈍化膜上。上述複數奈米碳管,係形成於上述貫穿孔內,各個之一端係相接於上述貫穿孔內之底面之上述觸媒膜上。
以下參照圖面說明本實施形態。圖面中同一部分附加同一參照符號。
以下參照圖1-6說明第1實施形態之奈米碳管配線之構造及製造方法。第1實施形態,係藉由在貫穿通孔(via hole)內之側面形成觸媒鈍化膜,而降低來自貫穿通孔內之側面之奈米碳管之成長速度之例。
圖1表示第1實施形態之奈米碳管配線之斷面圖。
如圖1所示,配線構造之一例,係在形成有電晶體或電容器等半導體元件(未圖示)的基板10上,形成接觸層100、第1配線層200、導孔(via)層300、及第2配線層400。
接觸層100係被形成於基板10上。接觸層100係由接觸層絕緣膜11及接觸部12構成。
接觸層絕緣膜11係被形成於基板10上,例如由TEOS(Tetraethoxysilane)構成。接觸部12係被形成於接觸層絕緣膜11內,用於電連接形成於基板10之半導體元件以及後述說明之第1配線層200。接觸部12之導電材料係由例如W、Cu或Al之單體金屬構成。另外,為防止接觸部12之導電材料金屬之擴散,於接觸部12與接觸層絕緣膜11之間可以具有金屬阻障層(未圖示)。金屬阻障層係由例如Ta、Ti、Ru、Mn或Co,或者彼等之氮化物構成。
第1配線層200係被形成於接觸層100上。第1配線層200,例如由阻障膜13、配線層絕緣膜14、阻障金屬15及下層配線16構成。
阻障膜13係被形成於接觸層100上,例如由SiCN等對配線層絕緣膜14之加工選擇比高的材料構成。另外,配線層絕緣膜14與接觸層絕緣膜11之加工選擇比極高時,可以不形成阻障膜13。配線層絕緣膜14係被形成於阻障膜13上,例如由SiOC等構成。該配線層絕緣膜14,為降低其介電率亦可為含微小空穴(pore)之膜。下層配線16係介由阻障金屬15形成於配線層絕緣膜14內。下層配線16之導電材料係由例如W、Cu或Al等之單體金屬或者多晶矽構成。阻障金屬15係由例如Ta、Ti、Ru、Mn或Co,或者彼等之氮化物或氧化物構成。
導孔層300,係被形成於第1配線層200上。導孔層300,例如由阻障膜17、導孔層絕緣膜18及導孔(Via)310構成。
阻障膜17係被形成於第1配線層200上,例如由SiCN等對導孔層絕緣膜18之加工選擇比高的材料構成。另外,導孔層絕緣膜18與配線層絕緣膜14之間之加工選擇比極高時,可以不形成阻障膜17。導孔層絕緣膜18係被形成於阻障膜13上,例如由SiOC構成。該導孔層絕緣膜18,為降低其介電率亦可為含微小空穴(pore)之膜。另外,於導孔層絕緣膜18上,可以形成作為保護膜之蓋膜(未圖示)。該蓋膜例如由SiO2或SiOC構成。另外,導孔層絕緣膜18為例如TEOS或不含微小空穴之SiOC時,可以不形成蓋膜。
導孔310,係被形成於貫穿導孔層絕緣膜18的貫穿通孔(via hole)40內,用於將第1配線層200與後述說明之第2配線層400予以電連接。具體言之為,導孔310,係由形成於貫穿通孔40內的觸媒底層膜19、觸媒鈍化膜20、觸媒膜21及複數奈米碳管22構成。
觸媒底層膜19,係形成於貫穿通孔40內之底面之第1配線層200上及貫穿通孔40內之側面之導孔層絕緣膜18上。觸媒底層膜19例如由TaN膜/TiN膜之積層膜,或TaN膜/Ti膜之積層膜構成。TaN膜係形成於貫穿通孔40內之表面,其膜厚例如約5nm。該TaN膜具有擴散阻障性,用於防止下層配線16之Cu與奈米碳管22之成長用
的觸媒膜21之Co之間之相互擴散。另外,TaN膜具有促進奈米碳管22之成長的助長觸媒效應。TiN膜或Ti膜係形成於TaN膜上,其膜厚例如約5nm。TiN膜或Ti膜具有使奈米碳管22之端面成為Ti碳化物予以終結之機能。如此則,可形成良好之奈米碳管22之界面接觸。另外,TiN膜或Ti膜具有促進奈米碳管22之成長的助長觸媒效應。
下層配線16為Cu以外時,於觸媒底層膜19可以不形成TaN膜。此情況下,觸媒底層膜19由TiN膜之單層膜,或Ti膜/TiN膜之積層膜構成。具體言之為,下層配線16例如為W(鎢)時,觸媒底層膜19較好是由TiN膜之單層膜構成。另外,下層配線16例如為多晶矽時,觸媒底層膜19較好是由Ti/TiN之積層膜構成。
如上述說明,觸媒底層膜19具有提升作為觸媒膜21之觸媒效果之同時,具有擴散阻障性,另外,藉由形成良好之奈米碳管22之界面接觸可以提升配線之電氣特性。
觸媒鈍化膜20,係形成於貫穿通孔40內之側面之觸媒底層膜19上。該觸媒鈍化膜20,係由使後述說明之觸媒膜21之觸媒作用鈍化,阻礙奈米碳管22之成長或降低成長度速度之材料構成。具體言之為,觸媒鈍化膜20係例如由Si(多晶矽、非晶質矽)、SiN、SiC、SiCN、Ru或NiSi構成。該觸媒鈍化膜20,未被形成於貫穿通孔40內之底面,僅形成於側面,因此阻礙來自側面之奈米碳管22之成長或降低成長度速度。
例如觸媒鈍化膜20為SiN時,觸媒底層膜19與觸媒膜21不接觸,可以阻礙奈米碳管22之成長或降低成長度速度。另外,例如觸媒鈍化膜20為Si或Ru時,觸媒底層膜19與觸媒膜21不僅不接觸,觸媒鈍化膜20亦與觸媒膜21反應而降低觸媒膜21之觸媒作用。如此則,更能阻礙奈米碳管22之成長或降低成長度速度。
觸媒膜21係被形成於貫穿通孔40內之觸媒底層膜19及觸媒鈍化膜20上。具體言之為,觸媒膜21,係於貫穿通孔40內之底面被形成於觸媒底層膜19上,於側面被形成於觸媒鈍化膜20上。觸媒膜21為奈米碳管22之真正觸媒,例如由Co、Ni或Fe構成。另外,觸媒膜21較好是於分散狀態形成為不連續。如此則,可於貫穿通孔40內成長高密度之奈米碳管22。
複數奈米碳管22係由貫穿通孔40內之底面之觸媒膜21上朝垂直方向延伸(成長)而形成,以填埋貫穿通孔40的方式被形成。亦即,奈米碳管22,其之一端相接於貫穿通孔40內之底面之觸媒膜21,另一端相接於後述說明之第2配線層400而被形成。如此則,奈米碳管22可將第1配線層200與第2配線層400予以電連接。此為觸媒鈍化膜20僅形成於貫穿通孔40內之側面,可抑制來自貫穿通孔40內之側面之奈米碳管22之成長。
第2配線層400係被形成於導孔層300上。第2配線層400,係由阻障膜23、配線層絕緣膜24、阻障金屬25及上層配線26構成,具有和第1配線層200同樣之構
造。
阻障膜23係被形成於導孔層300上,例如由SiCN等對配線層絕緣膜24之加工選擇比高的材料構成。另外,配線層絕緣膜24與導孔層絕緣膜18之加工選擇比極高時,可以不形成阻障膜23。配線層絕緣膜24係被形成於阻障膜23上,例如由SiOC構成。該配線層絕緣膜24,為降低其介電率亦可為含微小空穴之膜。上層配線26係介由阻障金屬25形成於配線層絕緣膜24內。上層配線26之導電材料係由例如W、Cu或Al等之單體金屬或者多晶矽構成。阻障金屬25係由例如Ta、Ti、Ru、Mn或Co,或者彼等之氮化物或氧化物構成。
又,於圖1雖表示配線構造具有2層之配線層(第1配線層200、第2配線層400),但亦可具有3層以上配線層。另外,奈米碳管22係作為第1配線層200與第2配線層400之間之導孔310使用,但亦可作為基板10與第1配線層200之間之接觸層100使用。
圖2A、圖2B、圖3A、圖3B、圖4A、圖4B、圖5A、圖5B、及圖6表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
首先,如圖2A所示,在形成有半導體元件之基板10上,形成接觸層100。具體言之為,在基板10上藉由例如CVD(化學氣相沈積)法形成接觸層絕緣膜11。於接觸層
絕緣膜11藉由例如微影成像技術法形成接觸孔。於該接觸孔藉由例如CVD法填埋接觸部12。此時,為防止接觸部12之導電材料金屬之擴散,於接觸孔表面可以形成阻障金屬(未圖示)。
之後,於接觸層100上,形成第1配線層200。具體言之為,在接觸層100上藉由例如CVD法形成阻障膜13。藉由該阻障膜13統合RIE(反應離子蝕刻)法對第1配線層200之加工深度之均勻性。另外,配線層絕緣膜14與接觸層絕緣膜11之加工選擇比極高時,在不形成阻障膜13之情況下,亦可以充分控制第1配線層200之加工深度。在阻障膜13上藉由例如CVD法形成配線層絕緣膜14。在配線層絕緣膜14上,形成作為RIE及CMP工程之損傷之保護膜的蓋膜(未圖示)。蓋膜可由例如SiO2或SiOC構成。當配線層絕緣膜14為對RIE之損傷耐力較強之膜,例如由TEOS構成時,或者由不含微小空穴之SiOC構成時,可以不形成該蓋膜。
之後,於配線層絕緣膜14上塗布阻劑(未圖示),進行微影成像技術工程。之後,於配線層絕緣膜14藉由RIE加工形成單鑲嵌配線構造。在該鑲嵌配線構造之表面藉由例如CVD法、PVD(物理氣相沈積)法或ALD(原子層沈積)法形成阻障金屬15。於該阻障金屬15上形成作為電鍍之陰極的Cu種膜之後,藉由例如電鍍法形成作為下層配線16之Cu膜。之後,實施Cu膜之熱處理達成結晶組織之穩定化,另外,進行CMP研磨多餘之Cu膜,
完成下層配線16。
之後,如圖2B所示,於第1配線層200上,形成導孔層300。具體言之為,在第1配線層200上形成防止Cu膜之表面擴散用的阻障膜17。於阻障膜17上,藉由例如CVD法或塗布法形成導孔層絕緣膜18。在導孔層絕緣膜18上,形成作為RIE及CMP工程之損傷之保護膜的蓋膜(未圖示)。蓋膜可由例如SiO2或SiOC構成。當導孔層絕緣膜18為對RIE之損傷耐力較強之膜,例如由TEOS構成時,或者由不含微小空穴之SiOC構成時,可以不形成該蓋膜。之後,於導孔層絕緣膜18上,塗布阻劑(未圖示),進行微影成像工程。之後,於導孔層絕緣膜18內,藉由RIE加工形成貫穿導孔層絕緣膜18之貫穿通孔40。
之後,如圖3A所示,於全面藉由例如CVD法或PVD法形成觸媒底層膜19。亦即,觸媒底層膜19,係形成於貫穿通孔40內之底面之第1配線層200上、貫穿通孔40內之側面及貫穿通孔40外之上面(貫穿通孔40以外之平坦部)的導孔層絕緣膜18上。該觸媒底層膜19,例如由TaN膜/TiN膜之積層膜、TaN膜/Ti膜之積層膜、TiN膜之單層膜、或Ti膜/TiN膜之積層膜構成,具有促進奈米碳管22之成長的助長觸媒效應。
之後,如圖3B所示,於全面藉由例如CVD法、PVD法或ALD法形成觸媒鈍化膜20。亦即,觸媒鈍化膜20,係形成於貫穿通孔40內之底面及側面、貫穿通孔40外之
上面之觸媒底層膜19上。該觸媒鈍化膜20,例如由Si(多晶矽、非晶質矽)、SiN、SiC、SiCN、Ru或NiSi構成。此時,觸媒鈍化膜20只要至少形成於貫穿通孔40內之側面即可,可以無須形成於貫穿通孔40內之底面及貫穿通孔40外之上面。
之後,如圖4A所示,藉由並進性(異方性)高的RIE法進行回蝕(etch back)處理。如此則貫穿通孔40內之底面及貫穿通孔40外之上面之觸媒鈍化膜20被實施回蝕。亦即,觸媒鈍化膜20僅殘留於貫穿通孔40內之側面,而由貫穿通孔40內之底面及貫穿通孔40外之上面被除去。換言之,於貫穿通孔40內之底面及貫穿通孔40外之上面,觸媒底層膜19呈露出。
之後,如圖4B所示,於全面形成觸媒膜21。亦即,觸媒膜21,係於貫穿通孔40內之底面及貫穿通孔40外之上面之觸媒底層膜19上,於貫穿通孔40內之側面之觸媒鈍化膜20上被形成。該觸媒膜21,例如由Co、Ni或Fe構成。另外,為成長高密度之奈米碳管22,觸媒膜21較好是於分散狀態形成為不連續。之後,為使觸媒膜21與觸媒鈍化膜20反應,較好是進行例如400℃以上之熱處理。如此則,例如觸媒鈍化膜20為Si(例如多晶矽或非晶質矽)時,貫穿通孔40內之側面之觸媒膜21被實施矽化物化,而降低觸媒作用。
之後,如圖5A所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。CVD法
之碳源係使用甲醇及乙炔等碳化氫系氣體或其混合氣體,載氣可使用氫或稀有氣體。另外,處理溫度之上限為約1000℃,下限為約200℃,成長溫度較好是約350℃。另外,使用遠隔電漿,或者為除去離子、電子而於基板10上部設置電極施加0~±100V程度之電壓為較好。
此時,如上述說明,於貫穿通孔40內之側面被形成觸媒鈍化膜20。因此,來自貫穿通孔40內之側面之奈米碳管22之成長不產生或顯著變慢。因此,奈米碳管22係由貫穿通孔40內之底面及貫穿通孔40外之上面之觸媒膜21上成長。亦即,於貫穿通孔40內,奈米碳管22可以其之一端相接於貫穿通孔40內之底面,朝垂直方向延伸(成長)而形成。
之後,如圖5B所示,於全面藉由旋轉塗布形成SOD膜50。該SOD膜50係由例如SiO2構成。此時,SOD膜50,係含浸於貫穿通孔40外之上面之複數奈米碳管22之端部之間及由貫穿通孔40內突出之複數奈米碳管22之端部之間,而將複數奈米碳管22予以固定。
之後,如圖6所示,藉由CMP針對含浸有SOD膜50的貫穿通孔40外之上面之複數奈米碳管22以及由貫穿通孔40內突出之複數奈米碳管22進行研磨,使平坦化。
之後,如圖1所示,於導孔層300上形成由阻障膜23、配線層絕緣膜24、阻障金屬25及上層配線26構成之第2配線層400。該第2配線層400係藉由和第1配線層200同樣之工程形成。如此則,可形成本實施形態之奈米
碳管配線。
又,本實施形態中,說明以奈米碳管22作為第1配線層200與第2配線層400之間之導孔310予以形成之製造工程,但奈米碳管22作為基板10與第1配線層100之間之接觸層100予以形成亦可。
依據上述第1實施形態,於奈米碳管配線之製造工程,於貫穿通孔40內(或接觸孔內)之底面及側面、貫穿通孔40外之上面形成觸媒底層膜19之後,僅於貫穿通孔40內之側面形成觸媒鈍化膜20。如此則,來自貫穿通孔40內之側面之奈米碳管22之成長不會發生、或者顯著變慢。亦即,貫穿通孔40內,會被直接有助於電子傳導之底面所成長之複數奈米碳管22填埋。因此,可以減低導孔310之電阻,可提升配線構造之電氣特性。
以下參照圖7A、圖7B、圖8A、圖8B、圖9A及圖9B說明第2實施形態之奈米碳管配線之製造方法。第2實施形態,係不僅在貫穿通孔內之側面、在貫穿通孔外之上面亦形成觸媒鈍化膜,而降低來自貫穿通孔外之上面之奈米碳管之成長速度之例。又,於第2實施形態,和上述第1實施形態同樣之點省略其說明,僅說明不同之點。
圖7A、圖7B、圖8A、圖8B、圖9A及圖9B表示第
2實施形態之奈米碳管配線之製造工程之斷面圖。
首先,進行至第1實施形態之圖3A之工程。亦即,在導孔層絕緣膜18中之貫穿通孔40內之底面及側面、貫穿通孔40外之上面形成觸媒底層膜19。
之後,如圖7A所示,於全面藉由例如CVD法、PVD法或ALD法形成觸媒鈍化膜20。亦即,觸媒鈍化膜20,係形成於貫穿通孔40內之底面及側面、貫穿通孔40外之上面之觸媒底層膜19上。該觸媒鈍化膜20,例如由多晶矽、非晶質矽、SiN、SiC、SiCN、Ru或NiSi構成。此時,藉由成膜速度較快之CVD法、PVD法或ALD法,以使觸媒鈍化膜20之膜厚於貫穿通孔40外之上面較貫穿通孔40內之底面成為更厚而被形成。
之後,如圖7B所示,藉由並進性(異方性)高的RIE法進行回蝕(etch back)處理。如此則貫穿通孔40內之底面及貫穿通孔40外之上面之觸媒鈍化膜20被實施回蝕。此時,觸媒鈍化膜20,因為於貫穿通孔40外之上面被形成較厚之膜厚而殘留。亦即,觸媒鈍化膜20殘留於貫穿通孔40內之側面及貫穿通孔40外之上面,而由貫穿通孔40內之底面被除去。換言之,於貫穿通孔40內之底面,觸媒底層膜19呈露出。
之後,如圖8A所示,於全面形成觸媒膜21。亦即,觸媒膜21,係於貫穿通孔40內之底面之觸媒底層膜19上、貫穿通孔40內之側面及貫穿通孔40外之上面之觸媒鈍化膜20上被形成。該觸媒膜21,例如由Co、Ni或Fe
構成。另外,為成長高密度之奈米碳管22,觸媒膜21較好是於分散狀態形成為不連續。之後,為使觸媒膜21與觸媒鈍化膜20反應,較好是進行例如400℃以上之熱處理。如此則,例如觸媒鈍化膜20為Si時,貫穿通孔40內之側面及貫穿通孔40外之上面之觸媒膜21被實施矽化物化,而降低觸媒作用。
之後,如圖8B所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。CVD法之碳源係使用甲醇及乙炔等碳化氫系氣體或其混合氣體,載氣可使用氫或稀有氣體。
此時,如上述說明,於貫穿通孔40內之側面及貫穿通孔40外之上面被形成觸媒鈍化膜20。因此,來自貫穿通孔40內之側面及貫穿通孔外之上面之奈米碳管22之成長不會發生,或顯著變慢。因此,奈米碳管22僅由貫穿通孔40內之底面成長。亦即,貫穿通孔外之上面,奈米碳管22之密度變小。
之後,如圖9A所示,於全面藉由旋轉塗布形成SOD膜50。該SOD膜50係由例如SiO2構成。此時,SOD膜50,係形成於貫穿通孔40外之上面,而將由貫穿通孔40內突出之複數奈米碳管22予以固定。
之後,如圖6所示,藉由CMP針對被SOD膜50固定的由貫穿通孔40內突出之複數奈米碳管22進行研磨,使平坦化。之後,如圖1所示,於導孔層300上藉由和第1配線層200同樣之工程形成第2配線層400。如此則,可
形成本實施形態之奈米碳管配線。
依據上述第2實施形態,可獲得和第1實施形態同樣之效果。
另外,於本實施形態中,係於貫穿通孔40內(或接觸孔內)之底面及側面、貫穿通孔40外之上面形成觸媒底層膜19之後,於貫穿通孔40內之側面及貫穿通孔40外之上面形成觸媒鈍化膜20。如此則,不僅來自貫穿通孔40內之側面、就連來自貫穿通孔40外之上面之奈米碳管22之成長亦不會發生、或者顯著變慢。亦即,貫穿通孔40外之上面之奈米碳管22之密度變小。因此,於貫穿通孔40外之上面容易形成SOD膜50,使由貫穿通孔40內之突出之複數奈米碳管22被固定。因此容易進行多餘之奈米碳管22之CMP處理。
另外,來自貫穿通孔40外之上面之奈米碳管22之成長被抑制,可以減少應除去之奈米碳管22之量。如此則,即使對CMP之藥液處理之耐性較強的奈米碳管22,亦可以機械研磨成份為主而容易進行CMP處理。
另外,貫穿通孔40內之奈米碳管22以高密度被形成,藉由導孔層絕緣膜18予以固定。因此,可以控制貫穿通孔40內之奈米碳管22之成長速度或成長時間,可以縮短多餘而突出上部之奈米碳管22之長度,如此則,奈米碳管22之大部分會被導孔層絕緣膜18固定。因此,無
須藉由SOD膜50來固定奈米碳管22,可以直接進行CMP處理。
圖9B表示第2實施形態之奈米碳管配線之製造方法之變形例。
如圖9B所示,於貫穿通孔40內形成奈米碳管22之後,取代SOD膜50,而於全面形成金屬膜90亦可。本實施形態中,貫穿通孔40外之上面之奈米碳管22之密度小,因此即使不容易含浸於奈米碳管22間之金屬膜90,亦可將由貫穿通孔40內突出之複數奈米碳管22予以固定。金屬膜90,例如可由W、Al、或Ti構成。因此,可以藉由容易控制之金屬CMP來研磨被固定之奈米碳管22。
以下參照圖10-圖12說明第3實施形態之奈米碳管配線之製造方法。第3實施形態,係說明作為導孔而形成奈米碳管及金屬之例。又,於第3實施形態中省略和上述各實施形態同樣之點,僅說明不同之點。
圖10表示第3實施形態之奈米碳管配線之斷面圖。
如圖10所示,第3實施形態之奈米碳管配線之構造,其和各實施形態之不同點在於:導孔310係由觸媒底層膜19、觸媒鈍化膜20、觸媒膜21、奈米碳管22及金屬
110構成。
觸媒底層膜19,係形成於貫穿通孔40內之底面及側面之導孔層絕緣膜18上。觸媒鈍化膜20,係形成於貫穿通孔40內之側面之觸媒底層膜19上。觸媒膜21係形成於貫穿通孔40內之觸媒底層膜19上及觸媒鈍化膜20上。
複數奈米碳管22係由貫穿通孔40內之底面之觸媒膜21上朝垂直方向延伸(成長)而形成。亦即,奈米碳管22,其之一端相接於貫穿通孔內之底面之觸媒膜21,另一端至貫穿通孔內之中途為止而被形成。貫穿通孔40之深度例如約為2μm時,奈米碳管22係直至其下部側之約1.5μm之高度為止被形成。
金屬110,係形成於貫穿通孔40內之奈米碳管22上,以填埋貫穿通孔40之上部側的方式被形成。另外,金屬110,係於上部相接於第2配線層400而被形成。亦即,金屬110係於貫穿通孔40內,而且於奈米碳管22與第2配線層400之間被形成。金屬110較好是由容易和奈米碳管22起反應而形成金屬碳化物的金屬構成,例如由Ti構成。於金屬110與奈米碳管22之境界形成金屬碳化物,則可以形成良好之界面接觸構造,可減低接觸電阻。
圖11A、圖11B、及圖12表示第3實施形態之奈米碳管配線之製造工程之斷面圖。
首先,進行至第2實施形態之圖8A之工程為止。亦即,在全面形成觸媒膜21。
之後,如圖11A所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。CVD法之碳源係使用甲醇及乙炔等碳化氫系氣體或其混合氣體,載氣可使用氫或稀有氣體。此時,控制奈米碳管22之導孔速度及成長時間,而使奈米碳管22由貫穿通孔40內之底面至下部側之中途為止被形成。
之後,如圖11B所示,於全面形成金屬110。亦即,金屬110,係填埋奈米碳管22上之貫穿通孔40內,另外,亦形成於貫穿通孔40外之上面。又,於金屬110之形成之前,對奈米碳管22之前端部(上端部)進行使用O2或CO之去灰處理或使用He、Ar之銑削處理為較好。如此則,可使奈米碳管22之前端部成為開放端,奈米碳管22之全部之多壁(mulTi-wall)將有助於電氣傳導。因此,更能降低導孔電阻。
之後,如圖12所示,藉由CMP針對貫穿通孔40外之上面及貫穿通孔40上之多餘之金屬110進行研磨,使平坦化。之後,如圖1所示,於導孔層300藉由和第1配線層200同樣之工程形成第2配線層400。如此則,形成本實施形態之奈米碳管配線。
依據上述第3實施形態,可獲得和第1實施形態同樣
之效果。
另外,於本實施形態中,係於貫穿通孔40內之下部側形成奈米碳管22之後,於殘餘之上部側填埋金屬110。如此則,於貫穿通孔40內,奈米碳管22之成長速度較慢之區域等之間隙可以完全被金屬110填埋。特別是如圖10之虛線所示,貫穿通孔40為階段構造時,即使來自下位面與上位面之奈米碳管22之成長速度相同時,於下位面側之上部會產生間隙。實際上,該階段構造,可藉由阻障膜17與導孔層絕緣膜18間之境界來形成。於此種間隙形成金屬110,可以將貫穿通孔40內完全填埋,可提升電氣特性。
以下參照圖13A、圖13B、圖14A、圖14B及圖15說明第4實施形態之奈米碳管配線之製造方法。第4實施形態,係說明在奈米碳管形成之前,由貫穿通孔外之上面除去觸媒膜及觸媒底層膜之例。又,於第4實施形態中省略和上述各實施形態同樣之點之說明,僅說明不同之點。
圖13A、圖13B、圖14A、圖14B及圖15表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
首先,進行至第1實施形態之圖4B之工程為止。亦即,於全面形成觸媒膜21。此時,觸媒膜21,係於貫穿
通孔40內之底面及貫穿通孔40外之上面,形成於觸媒底層膜19上。
之後,如圖13A所示,於全面形成有機膜120。該有機膜120,例如由藉由CVD法形成之碳膜,或藉由塗布法形成之有機系材料(阻劑)構成。此時,有機膜120,係覆蓋至少貫穿通孔40外之上面之觸媒膜21而被形成。
之後,如圖13B所示,藉由CMP針對貫穿通孔40外之上面之有機膜120進行研磨,使平坦化。如此則,貫穿通孔40外之上面之觸媒膜21及觸媒底層膜19被除去。此時,貫穿通孔40內被填埋有機膜120,CMP之黏結劑不會侵入貫穿通孔40內。
之後,如圖14A所示,藉由O2、Co、H2或N2等之去灰處理除去貫穿通孔40內之有機膜120。
之後,如圖14B所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。CVD法之碳源係使用甲醇及乙炔等碳化氫系氣體或其混合氣體,載氣可使用氫或稀有氣體。
此時,如上述說明,於貫穿通孔外之上面未形成觸媒膜21及觸媒底層膜19。因此,來自貫穿通孔外之上面之奈米碳管22之成長不會產生。另外,於貫穿通孔40內之側面被形成觸媒鈍化膜20,因此,來自貫穿通孔40內之奈米碳管22之成長不會產生或顯著變慢。因此,奈米碳管22僅由貫穿通孔40內之底面成長。
之後,如圖15所示,於全面藉由旋轉塗布形成SOD
膜50。該SOD膜50係由例如SiO2構成。此時,SOD膜50,係於貫穿通孔40外之上面被形成,而將由貫穿通孔40內突出之複數奈米碳管22予以固定。
之後,如圖6A所示,藉由CMP針對被SOD膜50固定的由貫穿通孔40內突出之複數奈米碳管22進行研磨,使平坦化。之後,如圖1所示,於導孔層300上藉由和第1配線層200同樣之工程形成第2配線層400。如此則,可形成本實施形態之奈米碳管配線。
依據上述第4實施形態,可獲得和第1實施形態同樣之效果。
另外,於本實施形態中,係於奈米碳管22之形成之前,除去貫穿通孔40外之上面之觸媒底層膜19及觸媒膜21。如此則,來自貫穿通孔40外之上面之奈米碳管22之成長不會發生。因此,於貫穿通孔40外之上面容易被形成SOD膜50,可使由貫穿通孔40內突出之複數奈米碳管22被固定。因此,容易進行多餘之奈米碳管22之CMP處理。
另外,來自貫穿通孔40外之上面之奈米碳管22之成長可以被抑制,因此,可以減少應除去之奈米碳管22之量。如此則,即使對CMP之藥液處理之耐性較強的奈米碳管22,亦可以機械研磨成份為主而容易進行CMP處理。
另外,貫穿通孔40內之奈米碳管22以高密度被形成,藉由導孔層絕緣膜18予以固定。因此,可以控制貫穿通孔40內之奈米碳管22之成長速度或成長時間,可以縮短多餘而突出上部之奈米碳管22之長度,如此則,奈米碳管22之大部分會被導孔層絕緣膜18固定。因此,無須藉由SOD膜50來固定奈米碳管22,可以直接進行CMP處理。
又,如圖9B所示,和第2實施形態同樣,於貫穿通孔40內形成奈米碳管22之後,取代SOD膜50,而全面形成金屬膜90亦可。另外,和第3實施形態同樣,於貫穿通孔40內之下部側形成奈米碳管22之後,於剩餘之上部側填埋金屬110亦可。
以下參照圖16A、圖16B、圖17A、圖17B及圖18說明第5實施形態之奈米碳管配線之製造方法。第5實施形態,係說明在奈米碳管形成之前,由貫穿通孔外之上面除去觸媒底層膜之例。又,於第5實施形態中省略和上述各實施形態同樣之點之說明,僅說明不同之點。
圖16A、圖16B、圖17A、圖17B及圖18表示第5實施形態之奈米碳管配線之製造工程之斷面圖。
首先,進行至第1實施形態之圖4A之工程為止。亦
即,貫穿通孔40之底面及貫穿通孔40外之上面之觸媒鈍化膜20係被除去。
之後,如圖16A所示,於全面形成有機膜120。該有機膜120,例如由藉由CVD法形成之碳膜,或藉由塗布法形成之有機系材料(阻劑)構成。此時,有機膜120,係覆蓋至少貫穿通孔40外之上面之觸媒底層膜19而被形成。
之後,如圖16B所示,藉由CMP針對貫穿通孔40外之上面之有機膜120進行研磨,使平坦化。如此則,貫穿通孔40外之上面之觸媒底層膜19被除去。
之後,如圖17A所示,藉由O2、Co、H2或N2等之去灰處理除去貫穿通孔40內之有機膜120之後,於全面形成觸媒膜21。此時,觸媒膜21,係於貫穿通孔40外之上面,以其間不存在觸媒底層膜19的方式被形成。
之後,如圖17B所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。CVD法之碳源係使用甲醇及乙炔等碳化氫系氣體或其混合氣體,載氣可使用氫或稀有氣體。
此時,如上述說明,於貫穿通孔外之上面未形成觸媒底層膜19。因此,來自貫穿通孔外之上面之奈米碳管22之成長不會產生。另外,於貫穿通孔40內之側面被形成觸媒鈍化膜20,因此,來自貫穿通孔40內之奈米碳管22之成長不會產生或顯著變慢。因此,奈米碳管22僅由貫穿通孔40內之底面成長。
之後,如圖18所示,於全面藉由旋轉塗布形成SOD膜50。該SOD膜50係由例如SiO2構成。此時,SOD膜50,係於貫穿通孔40外之上面被形成,而將由貫穿通孔40內突出之複數奈米碳管22予以固定。
之後,如圖6A所示,藉由CMP針對被SOD膜50固定的貫穿通孔40上之多餘之複數奈米碳管22進行研磨,使平坦化。此時,貫穿通孔40外之上面之觸媒膜21亦被除去。之後,如圖1所示,於導孔層300上藉由和第1配線層200同樣之工程形成第2配線層400。如此則,可形成本實施形態之奈米碳管配線。
依據上述第5實施形態,可獲得和第1實施形態同樣之效果。
另外,於本實施形態中,係於奈米碳管22之形成之前,除去貫穿通孔40外之上面之觸媒底層膜19。如此則,可獲得和第4實施形態同樣之效果。
以下參照圖19A、圖19B、圖20、圖21A、圖21B、圖22A及圖22B說明第6實施形態之奈米碳管配線之製造方法。第6實施形態,係說明在奈米碳管形成之前,由貫穿通孔外之上面除去觸媒膜之例。又,於第6實施形態中省略和上述各實施形態同樣之點之說明,僅說明不同之
點。
圖19A、圖19B及圖20表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
首先,進行至第1實施形態之圖4B之工程為止。亦即,於全面形成觸媒膜21。此時,該觸媒膜21,係於貫穿通孔40內之底面及貫穿通孔40外之上面,於觸媒底層膜19上被形成。
之後,如圖19A所示,於貫穿通孔40外之上面,以斜角(由對於射入面之傾斜方向)照射離子束。具體言之為,離子束,係以不射入貫穿通孔40內之底面之程度的斜角被照射。該離子束可以照射例如Ar之電漿射束。如此則,貫穿通孔40外之上面之觸媒膜21被除去。此時,離子束以斜角射入,因此離子束40之開口部(上部)附近之側面之觸媒膜21亦被除去。
之後,如圖19B所示,於貫穿通孔40內藉由例如CVD法形成成為電氣傳導層之複數奈米碳管22。
此時,如上述說明,於貫穿通孔外之上面未形成觸媒膜21。因此,來自貫穿通孔外之上面之奈米碳管22之成長不會產生。另外,於貫穿通孔40內之側面被形成觸媒鈍化膜20,因此,來自貫穿通孔40內之奈米碳管22之成長不會產生或顯著變慢。因此,奈米碳管22僅由貫穿通孔40內之底面成長。
之後,如圖20所示,於全面藉由旋轉塗布形成SOD膜50。該SOD膜50係由例如SiO2構成。此時,SOD膜50,係於貫穿通孔40外之上面被形成,而將由貫穿通孔40內突出之複數奈米碳管22予以固定。
之後,如圖6所示,藉由CMP針對被SOD膜50固定的貫穿通孔40上之多餘之複數奈米碳管22進行研磨,使平坦化。之後,如圖1所示,於導孔層300上藉由和第1配線層200同樣之工程形成第2配線層400。如此則,可形成本實施形態之奈米碳管配線。
依據上述第5實施形態,可獲得和第1實施形態同樣之效果。
另外,於本實施形態中,係於奈米碳管22之形成之前,於貫穿通孔40外之上面以斜角照射離子束。如此而使貫穿通孔40外之上面之觸媒膜21被除去。因此,可獲得和第4實施形態同樣之效果。
另外,之後,如圖21A所示,貫穿通孔40有可能具有推拔形狀。該貫穿通孔40之推拔角為85度以下時,在觸媒鈍化膜20之形成後進行回蝕處理時,貫穿通孔40之開口部附近之側面之觸媒鈍化膜20亦被除去。
之後,如圖21B所示,於全面形成觸媒膜21。此時,觸媒膜21,係於貫穿通孔40之開口部附近之側面,以其間不存在觸媒鈍化膜20的方式被形成於觸媒底層膜
19上,作為觸媒被活化。結果,來自貫穿通孔40之側面之奈米碳管22被形成。
相對於此,本實施形態中,係如圖22A所示,以斜角照射離子束,可以除去貫穿通孔40之開口部附近(上部側)之側面之觸媒膜21。亦即,藉由回蝕而於貫穿通孔40之開口部附近之側面,觸媒鈍化膜20被除去時,形成於該區域之觸媒膜21亦可以被除去。因此,如圖22B所示,可以抑制來自貫穿通孔40之側面之奈米碳管22之成長。
以上依據實施形態具體說明本發明,但是本發明並不限定於上述實施形態,在不脫離其要旨之情況下可做各種變更實施。另外,在不脫離本發明精神之情況下,可將方法以及系統之一部分予以省略、取代或變更。伴隨產生之申請專利範圍以及其之等效者亦包含於本發明之範疇內。
10‧‧‧基板
11‧‧‧接觸層絕緣膜
12‧‧‧接觸部
13‧‧‧阻障膜
14‧‧‧配線層絕緣膜
15‧‧‧阻障金屬
16‧‧‧下層配線
17‧‧‧阻障膜
18‧‧‧導孔層絕緣膜
19‧‧‧觸媒底層膜
20‧‧‧觸媒鈍化膜
21‧‧‧觸媒膜
22‧‧‧奈米碳管
23‧‧‧阻障膜
24‧‧‧配線層絕緣膜
25‧‧‧阻障金屬
26‧‧‧上層配線
40‧‧‧貫穿通孔
100‧‧‧接觸層
200‧‧‧第1配線層
300‧‧‧導孔層
310‧‧‧導孔
400‧‧‧第2配線層
圖1表示第1實施形態之奈米碳管配線之構造斷面圖。
圖2A表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖2B表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖3A表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖3B表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖4A表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖4B表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖5A表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖5B表示第1實施形態之奈米碳管配線之製造工程之斷面圖。
圖6表示第1實施形態之奈米碳管配線之製造工程之斷面圖。圖7A表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖7B表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖8A表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖8B表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖9A表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖9B表示第2實施形態之奈米碳管配線之製造工程之斷面圖。
圖10表示第3實施形態之奈米碳管配線之構造斷面
圖。
圖11A表示第3實施形態之奈米碳管配線之製造工程之斷面圖。
圖11B表示第3實施形態之奈米碳管配線之製造工程之斷面圖。
圖12表示第3實施形態之奈米碳管配線之製造工程之斷面圖。
圖13A表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
圖13B表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
圖14A表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
圖14B表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
圖15表示第4實施形態之奈米碳管配線之製造工程之斷面圖。
圖16A表示第5實施形態之奈米碳管配線之製造工程之斷面圖。
圖16B表示第5實施形態之奈米碳管配線之製造工程之斷面圖。
圖17A表示第5實施形態之奈米碳管配線之製造工程之斷面圖。
圖17B表示第5實施形態之奈米碳管配線之製造工程
之斷面圖。
圖18表示第5實施形態之奈米碳管配線之製造工程之斷面圖。
圖19A表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖19B表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖20表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖21A表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖21B表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖22A表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
圖22B表示第6實施形態之奈米碳管配線之製造工程之斷面圖。
10‧‧‧基板
11‧‧‧接觸層絕緣膜
12‧‧‧接觸部
13‧‧‧阻障膜
14‧‧‧配線層絕緣膜
15‧‧‧阻障金屬
16‧‧‧下層配線
17‧‧‧阻障膜
18‧‧‧導孔層絕緣膜
19‧‧‧觸媒底層膜
20‧‧‧觸媒鈍化膜
21‧‧‧觸媒膜
22‧‧‧奈米碳管
23‧‧‧阻障膜
24‧‧‧配線層絕緣膜
25‧‧‧阻障金屬
26‧‧‧上層配線
40‧‧‧貫穿通孔
100‧‧‧接觸層
200‧‧‧第1配線層
300‧‧‧導孔層
310‧‧‧導孔
400‧‧‧第2配線層
Claims (18)
- 一種奈米碳管配線,其特徵為包含:第1導電層;絕緣膜,形成於上述第1導電層上,具有由上面至下面予以貫穿之貫穿孔;觸媒底層膜,形成於上述貫穿孔內之底面之上述第1導電層上及上述貫穿孔內之側面之上述絕緣膜上;觸媒鈍化膜,形成於上述貫穿孔內之側面之上述觸媒底層膜上;觸媒膜,形成於上述貫穿孔內之底面之上述觸媒底層膜上及上述貫穿孔內之側面之上述觸媒鈍化膜上;及複數奈米碳管,形成於上述貫穿孔內,各個之一端相接於上述貫穿孔內之底面之上述觸媒膜上。
- 如申請專利範圍第1項之配線,其中另包含:第2導電層,被形成於上述絕緣膜上;上述複數奈米碳管之各個之另一端,係相接於上述第2導電層。
- 如申請專利範圍第1項之配線,其中另包含:第2導電層,被形成於上述絕緣膜上;及金屬膜,係在上述貫穿孔內,而且被形成於上述複數奈米碳管與上述第2導電層之間;上述複數奈米碳管之各個之另一端,係相接於上述金屬膜。
- 如申請專利範圍第3項之配線,其中上述金屬膜,係具有Ti;上述複數奈米碳管之各個之另一端,係Ti碳化物。
- 如申請專利範圍第3項之配線,其中上述複數奈米碳管之各個之另一端為開放端。
- 如申請專利範圍第1項之配線,其中上述觸媒底層膜,係具有Ta、Ti、TaN或TiN;上述觸媒膜,係具有Co、Ni、或Fe;上述觸媒鈍化膜,係具有Si、SiN、SiC、SiCN、Ru或NiSi。
- 如申請專利範圍第1項之配線,其中上述觸媒底層膜,係具有Ti、或TiN;上述複數奈米碳管之各個之另一端,係Ti碳化物。
- 如申請專利範圍第1項之配線,其中上述觸媒鈍化膜,係具有多晶矽或非晶質矽;上述觸媒膜係被矽化物化。
- 如申請專利範圍第1項之配線,其中上述貫穿孔為孔徑自下部側至上部側變大之推拔形狀;上述觸媒膜,係未被形成於上述貫穿孔內之上部側之側面。
- 一種奈米碳管配線之製造方法,其特徵為包含:於第1導電層上形成絕緣膜;於上述絕緣膜內,形成貫穿上述絕緣膜之貫穿孔; 於上述貫穿孔內之底面之上述第1導電層上及上述貫穿孔內之側面之上述絕緣膜上,形成觸媒底層膜;於上述貫穿孔內之側面之上述觸媒底層膜上,形成觸媒鈍化膜;於上述貫穿孔內之底面之上述觸媒底層膜上及上述貫穿孔內之側面之上述觸媒鈍化膜上,形成觸媒膜;及由上述貫穿孔內之底面之上述觸媒膜上,成長複數奈米碳管。
- 如申請專利範圍第10項之方法,其中形成上述觸媒膜之後,對上述貫穿孔內之側面之上述觸媒鈍化膜及上述觸媒膜進行熱處理。
- 如申請專利範圍第10項之方法,其中形成上述觸媒鈍化膜時,上述觸媒鈍化膜亦被形成於上述貫穿孔外之上面。
- 如申請專利範圍第12項之方法,其中成長上述複數奈米碳管時,係使上述複數奈米碳管由上述貫穿孔突出而予以形成;成長上述複數奈米碳管之後,於全面形成金屬膜而將突出之上述複數奈米碳管予以固定;藉由金屬CMP研磨上述金屬膜以及上述突出之上述複數奈米碳管。
- 如申請專利範圍第12項之方法,其中成長上述複數奈米碳管時,係使上述複數奈米碳管不 由上述貫穿孔突出而予以形成;成長上述複數奈米碳管之後,以填埋上述貫穿孔內的方式,在上述複數奈米碳管上形成金屬膜。
- 如申請專利範圍第10項之方法,其中形成上述觸媒膜時,上述觸媒膜亦被形成於上述貫穿孔外之上面;形成上述觸媒膜後,除去上述貫穿孔外之上面之上述觸媒膜。
- 如申請專利範圍第15項之方法,其中上述貫穿孔外之上面之上述觸媒膜之除去,係藉由對上述貫穿孔外之上面以斜角照射之離子束來進行。
- 如申請專利範圍第10項之方法,其中形成上述觸媒底層膜時,上述觸媒底層膜亦被形成於上述貫穿孔外之上面;形成上述觸媒底層膜後,除去上述貫穿孔外之上面之上述觸媒底層膜。
- 如申請專利範圍第17項之方法,其中上述貫穿孔外之上面之上述觸媒底層膜之除去,係以覆蓋上述貫穿孔外之上面之上述觸媒底層膜的方式形成有機膜,藉由CMP研磨上述貫穿孔外之上面之上述有機膜及上述觸媒底層膜而進行。
Applications Claiming Priority (1)
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CN102403304B (zh) * | 2011-12-06 | 2016-03-16 | 上海集成电路研发中心有限公司 | 一种互连结构及其制作方法 |
US8883639B2 (en) * | 2012-01-25 | 2014-11-11 | Freescale Semiconductor, Inc. | Semiconductor device having a nanotube layer and method for forming |
JP5694272B2 (ja) | 2012-10-25 | 2015-04-01 | 株式会社東芝 | 半導体装置及びその製造方法 |
US8860228B2 (en) * | 2012-12-26 | 2014-10-14 | Stmicroelectronics Pte. Ltd. | Electronic device including electrically conductive vias having different cross-sectional areas and related methods |
JP5624600B2 (ja) | 2012-12-27 | 2014-11-12 | 株式会社東芝 | 配線及び半導体装置の製造方法 |
JP5813682B2 (ja) | 2013-03-08 | 2015-11-17 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP5921475B2 (ja) * | 2013-03-22 | 2016-05-24 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP6175931B2 (ja) * | 2013-06-21 | 2017-08-09 | 富士通株式会社 | 導電構造及びその製造方法、電子装置及びその製造方法 |
JP2015032662A (ja) | 2013-08-01 | 2015-02-16 | 株式会社東芝 | 半導体装置及びその製造方法 |
WO2015126139A1 (en) * | 2014-02-19 | 2015-08-27 | Samsung Electronics Co., Ltd. | Wiring structure and electronic device employing the same |
JP6330415B2 (ja) | 2014-03-27 | 2018-05-30 | 富士通株式会社 | 半導体装置の製造方法 |
JP5893096B2 (ja) * | 2014-08-04 | 2016-03-23 | 株式会社東芝 | 半導体装置の製造方法 |
JP2016063097A (ja) * | 2014-09-18 | 2016-04-25 | 株式会社東芝 | カーボンナノチューブ配線構造およびその製造方法 |
JP6317232B2 (ja) * | 2014-10-29 | 2018-04-25 | 東京エレクトロン株式会社 | 選択成長方法および基板処理装置 |
JP2018049944A (ja) * | 2016-09-21 | 2018-03-29 | 東芝メモリ株式会社 | 半導体装置の製造方法および半導体製造装置 |
CN107744827A (zh) * | 2017-10-20 | 2018-03-02 | 阜阳师范学院 | 一种高效g‑C3N4/g‑C3N4I光催化剂构建及其制备和应用 |
US11705363B2 (en) * | 2021-03-19 | 2023-07-18 | Samsung Electronics Co., Ltd | Fully aligned via integration with selective catalyzed vapor phase grown materials |
US20230061022A1 (en) * | 2021-08-27 | 2023-03-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Contact structure for semiconductor device |
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US20060292861A1 (en) * | 2004-02-26 | 2006-12-28 | International Business Machines Corporation | Method for making integrated circuit chip having carbon nanotube composite interconnection vias |
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JP4115252B2 (ja) | 2002-11-08 | 2008-07-09 | シャープ株式会社 | 半導体膜およびその製造方法ならびに半導体装置およびその製造方法 |
US20100244262A1 (en) | 2003-06-30 | 2010-09-30 | Fujitsu Limited | Deposition method and a deposition apparatus of fine particles, a forming method and a forming apparatus of carbon nanotubes, and a semiconductor device and a manufacturing method of the same |
JP2007091484A (ja) * | 2005-09-26 | 2007-04-12 | Sonac Kk | カーボンファイバの製造方法および基板ユニット |
KR100721020B1 (ko) * | 2006-01-20 | 2007-05-23 | 삼성전자주식회사 | 콘택 구조체를 포함하는 반도체 소자 및 그 형성 방법 |
KR100822799B1 (ko) | 2006-04-25 | 2008-04-17 | 삼성전자주식회사 | 나노크기의 도전성 구조물을 위한 선택적인 촉매 형성 방법및 선택적인 나노크기의 도전성 구조물 형성 방법 |
DE102007050843A1 (de) * | 2006-10-26 | 2008-05-21 | Samsung Electronics Co., Ltd., Suwon | Integrierte Schaltung mit Kohlenstoffnanoröhren und Verfahren zu deren Herstellung unter Verwendung von geschützten Katalysatorschichten |
FR2910706B1 (fr) * | 2006-12-21 | 2009-03-20 | Commissariat Energie Atomique | Element d'interconnexion a base de nanotubes de carbone |
JP5181512B2 (ja) | 2007-03-30 | 2013-04-10 | 富士通セミコンダクター株式会社 | 電子デバイスの製造方法 |
JP5233147B2 (ja) * | 2007-03-30 | 2013-07-10 | 富士通セミコンダクター株式会社 | 電子デバイス及びその製造方法 |
KR100827524B1 (ko) * | 2007-04-06 | 2008-05-06 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
FR2917893B1 (fr) * | 2007-06-22 | 2009-08-28 | Commissariat Energie Atomique | Procede de fabrication d'une connexion electrique a base de nanotubes de carbone |
FR2933106B1 (fr) * | 2008-06-27 | 2010-12-24 | Commissariat Energie Atomique | Procede d'obtention de tapis de nanotubes de carbone sur substat conducteur ou semi-conducteur |
JP2011204769A (ja) | 2010-03-24 | 2011-10-13 | Toshiba Corp | 半導体装置及びその製造方法 |
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US20060292861A1 (en) * | 2004-02-26 | 2006-12-28 | International Business Machines Corporation | Method for making integrated circuit chip having carbon nanotube composite interconnection vias |
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US8487449B2 (en) | 2013-07-16 |
TW201221466A (en) | 2012-06-01 |
US20120049370A1 (en) | 2012-03-01 |
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KR20120019378A (ko) | 2012-03-06 |
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