TWI425582B - 形成自組裝之電氣接觸結構的方法 - Google Patents

形成自組裝之電氣接觸結構的方法 Download PDF

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Publication number
TWI425582B
TWI425582B TW95127201A TW95127201A TWI425582B TW I425582 B TWI425582 B TW I425582B TW 95127201 A TW95127201 A TW 95127201A TW 95127201 A TW95127201 A TW 95127201A TW I425582 B TWI425582 B TW I425582B
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Taiwan
Prior art keywords
particles
contact
contact pad
self
particle
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TW95127201A
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English (en)
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TW200729365A (en
Inventor
David K Fork
Thomas Hantschel
Michael L Chabinyc
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Palo Alto Res Ct Inc
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Publication of TW200729365A publication Critical patent/TW200729365A/zh
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Publication of TWI425582B publication Critical patent/TWI425582B/zh

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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Description

形成自組裝之電氣接觸結構的方法
本發明關於電氣接觸結構的形成方法,其參考資料包括同在審查中(copending)之美國申請案(申請案號:略)(代理人檔號20041271Q),申請名稱為"A System Including Self-Assembled Interconnections";以及另一申請案(申請案號:略)(代理人檔號20041271Q1),申請名稱為"A Method Of Fabricating Self-Assembled Electrical Interconnections"。這些申請案的申請標的(subject matter)係以引用的方式而納入本文。
平面顯示器組裝涉及耦合電子驅動晶片至安裝在玻璃基板上電路的一種複雜方法。通常平面顯示器使用「晶片在玻璃上」(Chip-on-glass,COG)之接合技術,以將縱欄與橫列驅動電路,連接至裝於玻璃上的顯示電子元件。COG接合技術通常使用「異向性導電膜」(anisotropic conducting film,ACF)膠帶,其含有以黏著劑固定在一起之導電微粒分散物。一篇標題為"Micropitch connection using anisotropic conductive materials for driver IC attachment to a liquid crystal display"之文獻(IBM Journal of Research and Development,第42卷,編號3/4,1998),其說明使用ACF膠帶,且其所有內容係以引用的方式併入本發明申請案中。特別地是,該文獻說明,在驅動晶片仍為晶圓型式時,將金凸塊施加於驅動晶片之接觸墊。然後,該晶片從晶圓上被切割下來。
施加凸塊至晶圓之技術,為一涉及多次方法步驟的昂貴方法,包含濺鍍薄金屬膜、曝光微影之光罩、電鍍及化學蝕刻。這些方法係用於製造小像素之顯示器(諸如攜帶式裝置所使用者)所需的微間距凸塊。對於較粗的間距凸塊而言,無電流電鍍法可避免曝光微影光罩方法,並提供較簡易且較不昂貴的凸塊沈積方式。然而,無電流電鍍提供有限的間距,並涉及電鍍相當數量之金屬。
在組裝過程中,ACF膠帶係用以施加至接觸墊,或顯示器邊緣之接觸點。驅動晶片被加壓並接合至ACF膠帶的另一面。接合過程中所施加的熱與壓力,會造成膠帶黏著劑的熔解與流動。理想方式係將微粒夾合於顯示器接點與驅動晶片接點間,以形成電氣接觸。不幸地是,黏著劑流動可"流出"ACF薄膜中的一些微粒,所沖出的微粒可能累積在相鄰的接觸墊之間,並引起電氣短路。
第二個問題來自於ACF膠帶中異向性微粒僅具有限的順應性。不可壓縮的,較大的異向性之微粒,可能在驅動晶片與接觸墊間形成大的間隙。在顯示器接觸墊與驅動晶片接點間的大間隙,可能在相鄰的顯示器接觸墊與相應之相鄰的驅動晶片接點間,形成斷路的相鄰接觸。
另一種電子內連型式為焊料凸塊。在焊料凸塊晶圓水平封裝中,焊料凸塊或球係藉由電鍍、網版印刷或真空球體放置而置於晶圓的電氣接觸墊上。雖然焊料凸塊可避免ACF膠帶的問題,但是焊料凸塊製造涉及包含光罩製造、網版或真空容器製造等非再固化工程(non-recurring engineering)花費。
因此,經改良之內連晶片(特指具有凸塊接點的晶片)方法為必要的。
本發明為一種自組裝內連結構的形成方法,首先使一接觸墊形成於基板之上,該接觸墊暴露於多個微粒,接觸墊表面與溶液微粒係經選擇的,以使至少一個微粒接合於接觸墊;其次,移除未接合於接觸墊的微粒,將正對的接觸墊壓合於接合至接觸墊的微粒中,以於二個接觸墊間形成電氣連接。
有關前揭自組裝內連結構的用途,其中之一為用於顯示器裝置。特別地是,前揭方法可使用於連接驅動晶片至顯示器裝置定址線,更特別地係指安裝在諸如玻璃之類的透明基板上的定址線。
有關前揭自組裝內連結構的另一種用途,為用於取代焊料凸塊。特別地是,前揭方法可用於將含有焊料,或者之後塗佈焊料的凸塊,然後裝附於積體電路接觸墊。
如前揭說明之本發明一種新穎的電子元件內連方法。該方法使用自組裝內連微粒以耦合電子元件,而形成一電子總成。
第1-4圖表示一基本的內連形成方法。在第1圖中,一電氣接觸或接觸墊104耦合至一電氣線路108。在此所使用的"線路"及"電氣線路"係廣泛地定義為「設計成承載電流的任何導體,包含而不限定為,被印刷與積體化之電路線圖、線路、及可撓性內連」。在此所使用的"接觸墊"係廣泛定義為「另一電氣導體可連接於其間,以使電流可在接觸墊與該另一導體間流動的任一點」。雖然接觸墊本身可由任一導體製成,但通常由諸如金、銅、鋁或銦錫之金屬氧化物所製成。電氣線路或線圖108將接觸墊104耦合於附加的電子元件(未示於圖中)。該線路之其餘鄰接於基板,或被嵌入一絕緣基板112中。在一實例中,線路或線圖係耦合一接觸墊於顯示器驅動積體電路晶片。一第二線路或線圖係連接一第二接觸墊於顯示器系統的一定址線。定址線係耦合於顯示器系統的電晶體或像素元件。當連接二個接觸墊以形成內連時,來自顯示器驅動積體電路的訊號可傳遞至顯示器系統像素元件。
可使用複數種方法而將微粒接合至接觸墊104。例示之方法可含靜電、磁力、表面張力或化學力。在第2圖中,接合層204係選擇性地黏著於接觸墊104。在一實施例中,接觸墊104為具有硫醇化合物接合層的金製接觸墊。在一通用之有機硫醇化合物的化學式,RSH,其中R代表具有一硫醇基取代物的有機單位。該硫醇基可與金製接觸墊反應,而形成共價裝附的接合層204。在某些狀況下,有機硫醇可在表面反應,而形成具有單一分子厚度的薄層(通常稱為自組裝單層)。
應注意地是,雖然金元素為特別適用作為於裝附微粒的接觸墊金屬,但是諸如銅與鋁的其他接觸金屬,亦可輕易地適用於前揭方法中。鋁與銅基墊金屬化的實例步驟可包含(1)使用溶劑與酸以清洗有機物、氧化矽和/或氮化物的接觸墊;(2)使用鹼或酸基蝕刻液移除氧化鋁或氧化銅;(3)使用鋅酸鹽或鈀以活化鋁或銅;(4)使用氧化鋁基電鍍溶液,無電流鎳電鍍一薄鎳層;以及(5)使用氰化物或硫酸鹽基溶液;以電鍍一薄金層。
在一實施例中,可選擇性地施加一視需要而選用的薄層(未示於圖中)於基板112表面(而非施加於接觸墊104)。該視需要而選用的薄層,可抑止微粒裝附於非接觸墊區域。
在接合層204沈積之後,接觸墊104可被沖洗以移除任何未被接合的殘留物。其次,接觸墊104可暴露於選擇性地裝附在接觸墊之自由移動的微粒。在此所使用的"自由移動"係廣泛定義為「未接合於固體中的任何微粒」。因此,"自由移動的微粒"可導入至諸如氣溶膠(aerosol)、微粒雲或含有該微粒的流體。含有該微粒的流體,可為膠質懸浮溶液,或諸如攪拌的其他技術,可用於保持微粒在溶液中之懸浮性。在此所使用的"微粒"係廣泛定義為「尺寸由數十奈米至數百微米的固體」。在此所使用的"微粒"係「由一個以上原子與一個以上分子所組成」,因此單一原子和/或分子不應視為一微粒。微粒通常由一百個以上的原子組成。在此所使用的"微粒"應具有至少一個超過一奈米的尺寸。"尺寸"通常被理解為定位在任意方向之任意物件的高、長或寬度。由另一種方式視之,在此使用的定義為尺寸乃微粒表面上之任何二個選擇點的直線距離。
為提高微粒黏著性,微粒304一旦接合時,可藉由電鍍額外的金屬於微粒304上,而進一步將其固著於電氣接點104或"凸塊"。該電鍍會形成無電流電鍍或有電流電鍍金屬連接於微粒與接觸墊或"凸塊"間。無電流電鍍無須使用額外的光罩便得以選擇性施加金屬於接點結構上,並避免電極裝附於基板上。在一實施例中,接合層204可於電鍍步驟前便藉由諸如紫外光臭氧暴露或氧氣電漿灰化的步驟而至少部分移除。未損傷微粒304下方之接合層部位的接合層204定向部分移除法,可於基板轉置於電鍍浴期間,保持微粒304的裝附。
第4圖表示一第二接點404接觸於已接合微粒304的完整內連結構。於後續固化的液態黏著劑或其他非導電膜408係將上層412接合於底層基板。當使用前揭技術製造顯示器時,上層412可為顯示器的一部分,且下層接觸墊104係耦合於控制顯示器的驅動晶片。
諸多接合法可用於移動及裝附微粒至接觸墊上。微粒與接觸墊可被塗佈至少含有一對活性分子之薄層(504與511)(第5圖)。在一實施例中,微粒上的薄層包含乙炔官能基,且接觸墊上的薄層包含疊氮基。於存在銅基觸媒時,這些基將藉由雙極性加成反應而形成三唑基。在另一實施例中,該活性對包含羧酸酐及胺類。
在交連結分子吸附後,第6圖表示使用清洗步驟以移除過剩的微粒。典型的清洗步驟實例包含光皂化、臭氧清洗及其他熟知的清洗法。
第7圖表示裝附至微球體712塗佈物708的低熔點(低於200℃)之銀奈米微粒704。在一實施例中,塗佈物708為位於聚合物微球體712上的金塗佈物。接觸墊表面可經處理,以使銀奈米微粒716黏著於金屬接點720,而不黏著於相鄰氯化物/聚合物保護層724。
第8圖表示鬆弛黏著至金屬接點720上之奈米微粒716的奈米微粒。奈米微粒804在加熱時會熔解並熔合而形成強接合於微球體712與金屬接點720之間。保護層724上的微球體形成會在清洗期間剝離之微弱且易破壞的黏著性。
第6-8圖表示安置並形成鏈結的化學技術,然而內連自組成不應限定於化學接合技術。第9-10圖表示使用磁性微粒904控制較小磁性微粒的移動。第9圖表示裝附於接觸墊的較大磁性微粒904。磁性微粒可為諸如塗佈有一鎳層(提供磁性)及一金層的聚合物球體。再者,第9圖表示鄰近較大微粒的較小磁性微粒908。
第10圖表示使用磁化的較大微粒,以將較小微粒吸引至較大微粒。施加磁場會於微粒中導致磁雙極,而產生交互吸引。微粒一旦接觸後便藉由其表面性質而彼此吸附,並於外加磁場消失後仍彼此吸附。
自組裝內連的一項應用,為平面顯示器之製造。第1-4圖說明一種由幾乎與支撐基板平行之接觸墊形成內連的方法。前揭內連方法,係依賴黏著微粒,以形成接點於周圍基板上方。然而,在部分執行方式中,微粒尺寸太小而無法於二個接觸表面間形成足夠的間隙,且經墊高的接點(通常稱為凸塊)可能較佳。因而,第11-19圖說明使用自組裝技術及結合習用製造技術,以形成經墊高的接觸凸塊。經墊高的接觸凸塊會增加支撐各接點之基板間的間隙。因此,經墊高的接點特別適用於形成顯示器。
在第11圖中,接觸墊基座1108耦合至為基板材料1112所支撐的金屬導體1104。當顯示器形成時,顯示器驅動電路,通常形成於矽晶圓的晶片上,因此矽為通用的基板材料,雖然其他材料亦可使用。介電保護層1116可保護該電子電路。
在部分實施例中,諸如第1-4圖,接觸墊基座1108作為其上沈積著微粒的接觸墊。然而,在另一替代的實施例中,其係沈積額外的接觸墊材料,以形成墊高的接觸凸塊。在第11圖中,電鍍陰極種子層1120係形成於接觸墊基座1108上。種子層1120通常由金製成,惟可為可形成接觸墊於其上的任何材料。
第12-13圖表示接觸凸塊1304的形成。在第12圖中,接觸墊基座1108周圍的光阻層1204係經圖樣化。在第13圖中,沈積於光阻劑間隙中的導體材料係形成接觸凸塊1304。
第14-16圖表示微粒裝附於接觸墊。該裝附可使用多種自組裝方法完成,包含但不限定於第5-10圖所述的裝附方法。在第14圖中,添加微粒接合塗佈物1404於一接觸1304之上表面1308。當暴露於含有微粒的液體或氣體時,微粒1504會黏著於接合塗佈物1404,如第15圖所示。
微粒1504在上表面1308自組裝後便可導電。導電微粒可由用於製造ACF膠帶之微粒的多種技術以進行製造,並可由諸如JCI USA公司(一家Nippon Chemical Industrial公司的子公司),於1311 MamaroneckAvenue,Suite 145,White Plains,NY 10605所購得。這些微粒可由一芯部與一披覆材料所組成。芯部材料可為有機物,諸如聚苯乙烯、聚甲基丙酸甲酯、苯胍胺等,或亦可為無機物,諸如鎳、銅、氧化矽或石墨。披覆材料可為金屬,諸如金膜,或金位於鎳上之雙層金屬。典型微粒尺寸範圍為1-50微米。
在另一實施例中,微粒1504在上表面1308自組裝後亦可為非導電性。例如,可由有機微粒(聚苯乙烯、乳膠)、無機微粒(氧化矽)及生化分子(蛋白質、DNA)自組裝之二維與三維膠質晶體。典型的微粒尺寸範圍為5 nm至5 mm。例如,Lee等人在Adv.Mater.2002,14,No.8,pp.572-7(在此以引用的方式併入本案)之說明,在圖樣化聚合物複層上自組織之羧化乳膠球叢聚的形成方法。如Lee等人在Chem.Mater.2003,15,4583-9所示,其得以自組裝非導電性微粒(例如,二氧化矽或聚苯乙烯),並接著在微粒上施加選擇性無電流金屬電鍍。
可使用將微粒1504接合於接合塗佈物1404的各種方法。其中一種方法,諸如乳膠或鐵弗龍的疏水性微粒係懸浮於親水性(水性)溶液中。接合塗佈1404產生一疏水性區域,其由水性溶液中吸引出疏水性微粒。
在另一種替代性方法中,第13圖的結構係暴露於含硫醇化合物的浴槽中,該化合物通常為對金具有高親和力的化學通式RSH。當接觸墊由金製成時(在接觸凸塊1304的狀況),硫醇化合物會黏著於金接觸墊。在沖洗晶圓時,可由含有光阻層1204的其他晶圓區,移除硫醇化合物。其次,將晶圓暴露在含有金表面微粒之膠質懸浮物的溶液中。其次,將金表面微粒接合於硫醇接合層,而非其他晶圓區。
使用導電性固著或接合分子,以實施電鍍步驟,其有助於強化微粒裝附於其個別凸塊或接觸墊。在一實施例中,含有聚噻吩主鏈與化學接合官能側鏈(諸如硫醇或胺類)的導電聚合物,可用以形成接合層1404至接觸墊1304上。在另一實施例中,接合層1404可由有電鍍導電性聚合物所組成。適當的導電聚合物包含以乙烯二氧噻吩(PEDOT)為基底者。已知形成PEDOT衍生物薄膜的電化學方法,亦可使用。
在第16圖中,接合塗佈物1404至少部分被移除。在某些實施例中,在微粒1504始初接合至接觸墊1304之後,額外的微粒1504金屬電鍍可進一步地固著微粒至接觸凸塊。該電鍍會形成無電流電鍍或有電流電鍍金屬,於微粒1504與凸塊1304之間連接。該電鍍可緊密固著微粒1504至凸塊1304頂端,但非固著於凸塊側邊。
在所述的實施例中,該電鍍會形成一於凸塊上方之正形層(Conformal layer,1508)及許多凸塊上的微粒。在此使用的"正形層"係廣泛定義為「非定向性成長的塗佈物或薄層」。因此,正形層通常具有相當均勻的厚度,因為該薄層通常在正形層成長(或接合)的所有表面上以近乎相當的速率進行成長。因此,通常維持著凸塊與微粒的輪廓。
該正形層1508實質地形成一連續塗佈物於暴露在電鍍浴的接觸凸塊表面與微粒表面。所以,微粒1504係以機械及電氣方式連接至凸塊1304。當使用有電流電鍍時,電鍍僅發生於電流之流動處,亦即裝附於基板之電鍍電極的導電路徑處。當使用無電流電鍍時,電鍍僅發生於電鍍溶液反應的表面。該反應通常僅限於接觸區內的材料(接點本身及接合於接點的微粒)。
在第17圖中,光阻層1204已移除;在第18圖中,種子層1120已移除,而留下高於基板表面之墊高的接觸墊或"接觸凸塊"1304。在第19圖中,一第二接觸墊1904經由微粒1504耦合至接觸凸塊1304,而使電流得以在接觸墊1904與接觸凸塊1304間流動。一非導電性黏著劑1918填充第一基板1112與第二基板1908間的剩餘空間。在一般的顯示器結構中,接觸墊1904安裝於玻璃基板1908上,並耦合至顯示器定址線或資料線。定址線可耦合至液晶顯示器,諸如薄膜電晶體(TFT)的電子或電路元件,或者用以改變顯示器系統中之透光率、光輸出或光反射率的其他像素元件。諸如視訊處理卡上之電路的驅動電路(用於控制像素元件的開關)係耦合至接觸凸塊1304。
第18-19圖的實例表示高於基板表面的墊高的接觸凸塊1304。更上位的實例,如第4圖所示,墊高的接觸墊並非絕對必要。墊高接觸墊提供額外的公差(tolerances),但同時更難製造。使用諸如第20-22圖所示的較大微粒,可減少對墊高的接觸墊的需求。第20-22圖表示使用大型焊料球作為"導電微粒"。
第20-22圖的結構可用於將焊料凸塊或球體置於基板及晶片上。金表面焊料球,可用於自組裝,因為如前所述,它有諸多表面處理,使用金表面,可以改善微粒的自組裝性。此外,如第20圖所示,施加於接點2008的表面處理2004,可將焊料球2103就定位。第21圖表示表面處理2004,使焊料球2103黏著至接點2008。如第22圖所示,一旦焊料球2103被裝附後,加熱後回流焊料之步驟,將加強焊料/接觸墊的接合。
前揭裝附焊料的方法,可與標準表面安裝技術(Surface Mount Technology,SMT)方法併同使用,以裝附元件至印刷電路板上。相較於傳統的焊料方法,前揭方法將降低非再固化工程(non-recurring engineering)的成本(特指有關製作網版或電鍍光罩的工程成本)。
至此所揭的實例微粒,皆為球體形狀。在最簡易的型式中,自組裝內連製造期間,所使用的微粒可與製作異性向導電膜(ACF)膠帶期間所使用的微粒係相同的。然而,並非必要使用這樣的微粒,或者,該微粒必需為球體。特別地,亦可使用橢圓形、不規則形、金字塔形及具有尖點的其他形狀。當第二接觸墊將微粒夾合於第一接觸墊與第二接觸墊之間時,尖點可提供用以提高電氣接觸的可破裂或可順應結構,對填充較大彈性體的微粒,其特別希冀順應性,較典型較小微粒佳。特別地是,20微米的接觸墊間距晶片於玻璃結構上時為所希冀的;具有約10微米尺寸且墊高的約10微米的接觸墊,可能係特別有用。
第23-28圖表示一種用於形成專用微粒的方法。在第23圖中,施加一分離層2304與一種子層2302於基板2308上。基板2308包含在希冀的微粒形狀中具有坑洞2312。例如,可使用諸如氫氧化鉀的蝕刻劑,而以異向性矽蝕刻法形成金字塔形坑洞於矽基板上。在第24圖中,圖樣化光阻劑2404定義出微粒安置處。第25圖表示電鍍於基板2308坑洞2312中的微粒2504。
在電鍍微粒之後,第26圖表示光阻劑2404已移除。在第27圖中,所暴露的微粒2504表面係使用諸如化學機械拋光(CMP)的技術進行平坦化。蝕刻移除過剩的種子金屬層(該步驟未示於圖中)。在一實施例中,該蝕刻暴露出於微粒2504底面2704的不同材料(相較於其他微粒表面)。暴露在不同表面上的不同材料,得以選擇性地將底面黏著於接觸墊接合表面。因此,在自組裝期間,得以控制微粒位向。例如,可設計金字塔結構,以使金字塔底座由一不同之材料所組成,而僅將金字塔基座黏著於接觸墊。因此,該金字塔能自組裝,以使可破碎的金字塔尖端朝上。在第28圖中,一分離蝕刻係由基板釋出微粒2504。其次,可收集該微粒並用於前揭的自組裝方法。
在內連製造期間,可使用不同尺寸的微粒。在本發明的一實施例中,其希冀導入至少二種尺寸的微粒。第一種尺寸的較大微粒,可形成高於基板表面的凸塊。導入較小尺寸的微粒,可粗化表面,以提供完成或提高電氣接觸的滲入性粗糙度。第二種尺寸之微粒的功能,類似於嵌入玻璃接合上之晶片用的異向性導電膜(ACF)的微粒。第29-34圖表示自組裝接觸凸塊結構及接觸壓力集中粗糙度的系統。
第29-32圖表示藉由自組裝墊高的凸塊結構至接觸墊上而形成墊高的凸塊結構。第29圖表示接觸墊2904的形成,而第30圖表示沈積一接合層3004於接觸墊2904上。在第31圖中,表面對接合層3004具有化學親和力的大型微粒3104係黏著於接合層3004。數種該化學親和力的機構已說明如前,包含,但不限於聚噻吩-硫醇與胺的交互作用。
在第32圖中,視需要而將大型微粒3104電鍍定位,例如藉由浸漬結構於無電流電鍍浴中,以形成一正形金屬層3204於微粒與接觸墊上。其次,施加一第二微粒接合層(未示於圖中)於電鍍表面。第33圖表示"自組裝"或接合於該第二微粒接合層之較小的第二組微粒3304。該較小微粒的直徑通常為1至10微米。第34圖表示藉由諸如無電流電鍍法,形成額外的正形電鍍金屬層3404,以視需要而將較小微粒電鍍定位。所示的結構提供具有接觸壓力粗糙度的完整自組裝"接觸凸塊"。
雖然第29-34圖表示在加入接觸壓力粗糙度前的凸塊結構組裝,但是應瞭解地是,在另一實施例中,該大型微粒3104在接合於接觸墊前,可先覆以較小微粒並接合於其上。因此,在大型"凸塊"微粒覆以較小的"接觸粗糙度"微粒而形成"粗凸塊結構"之後,整個粗化的凸塊結構係自組裝於該接觸墊上。
在前揭說明的各細節當中,其已提供包含微粒材料、微粒形狀、表面處理、接合層組成物、接觸墊材料及不同尺寸的多種細節。應瞭解地是,該細節係以舉例的方式提供,並為協助瞭解本發明之用。然而,該細節並不希冀且不應作為本發明的限制。本發明應受限於申請專利範圍,如其原始說明、並可為其修正、變化、更換、修改、改良、相當者;以及在此揭示之實施例與教導的實質相當者,包含目前未預見或未查知者及諸如可能來自本案申請人/專利權人與其他人者。例如,向來係使用光阻劑作為光罩材料,然而亦可使用諸如蠟的其他類型光阻劑,且諸如印刷之光微影以外的圖樣化方法可取代之。
104...接觸墊
108...電氣線路
112...基板
204...接合層
304...微粒
404...第二接點
408...非導電膜
412...上層
504、511...反應性分子
704、716、804...奈米微粒
708...塗佈物
712...微球體
720...金屬接點
724...保護層
904、908...磁性微粒
1104...金屬導體
1108...接觸墊基座
1112...基板材料
1116...介電保護層
1120、2302...種子層
1204、2404...光阻層
1304...接觸
1308...上表面
1404...接合塗佈物
1504、2504...微粒
1508...正形層
1904、2904...接觸墊
1908...第二基板
2004...表面處理
2008...接點
2103...焊料球
2304...分離層
2308...基板
2312...坑洞
第1-4圖表示一基本的內連形成方法。
第5圖表示用於接合接觸墊之兩活性分子的一般化學反應方法。
第6圖表示一種移除過剩微粒的方法。
第7-8圖表示使用低熔點銀奈米微粒,以輔助裝附微球粒於一塗佈物。
第9-10圖表示使用磁場以移動和/或接合磁性微粒至接觸墊。
第11-19圖表示,在通常可用於顯示器製造程序中,形成墊高的接觸墊、並形成自組裝內連於該墊高的接觸墊的步驟。
第20-22圖表示使用自組裝以安置並接合大型焊料凸塊於接觸墊之技術。
第23-28圖表示一種製造專用微粒之方法,該微粒可用於自組裝方法中。
第29-34圖表示一種對於自組裝地接觸凸塊結構及接觸壓力集中粗糙度之系統。
104...接觸墊
108...電氣線路
112...基板
204...接合層
304...微粒
404...第二接點
408...非導電膜
412...上層

Claims (23)

  1. 一種形成自組裝電氣接觸構造的方法,其包含下列步驟:形成接觸墊於基板上,該接觸墊包括一由複數個第一反應性分子所形成的外層;將該基板暴露於複數個可自由移動的第一微粒,該等第一微粒具有大於10微米的尺寸,該等第一微粒之全部的外表面包括由複數個第二反應性分子所形成的對應外層,使得當該等第一反應性分子及該等第二反應性分子接觸時,該等第一反應性分子及該等第二反應性分子形成一共價鍵,將該等第一微粒接合至該接觸墊,在接合至該接觸墊之後,該等第一微粒的一部分產生一不平坦的表面,其包括接觸粗糙度且在該接觸墊之緊鄰圍繞觸墊之區域上方延伸;及暴露該等第一微粒於可自由移動但尺寸小於該等第一微粒之尺寸的複數個第二微粒,該等第二微粒包括由複數個第三反應性分子所形成的外層,使得當該等第二反應性分子與該等第三反應性分子接觸時,形成相應的分子,將該等第二微粒接合至該等第一微粒之表面,接合該等第二微粒以產生由該等第一微粒所形成之粗糙外表面。
  2. 如申請專利範圍第1項的方法,更包含將一相對的接觸壓入接合於該接觸墊的至少一個微粒上,如此使 該相對的接觸墊與該接觸墊之間形成了電氣連接。
  3. 如申請專利範圍第1項的方法,其中該等第一微粒位於氣體載體中。
  4. 如申請專利範圍第1項的方法,其中該等第一微粒及該等第二微粒覆有導電表面。
  5. 如申請專利範圍第1項的方法,其中該等第一微粒具有彈性芯部。
  6. 如申請專利範圍第1項的方法,更包含下列步驟:選擇性地電鍍一金屬至該等複數個微粒與該接觸墊之上。
  7. 如申請專利範圍第6項的方法,其中該等複數個微粒係非導體。
  8. 如申請專利範圍第1項的方法,其中該接觸墊為一高起的凸塊。
  9. 如申請專利範圍第1項的方法,其中該等第一微粒的形狀為非對稱性,以使當該等微粒接合於該接觸墊時,形成一尖銳的接觸粗糙度。
  10. 如申請專利範圍第1項的方法,其中選擇該接觸墊表面與該等第一微粒,以使該接觸墊與該等第一微粒在接觸時會形成共價鍵。
  11. 如申請專利範圍第10項的方法,其中該接觸墊係經接合劑處理,以使微粒黏著於該接觸墊。
  12. 如申請專利範圍第11項的方法,其中該接合劑為有機硫醇。
  13. 如申請專利範圍第11項的方法,其中該接合劑為具有自 由胺基的聚合物薄膜。
  14. 如申請專利範圍第1項的方法,其中該等微粒為球形。
  15. 如申請專利範圍第1項的方法,其中磁場係用於吸引該等第一微粒並將其接合於該接觸墊。
  16. 如申請專利範圍第1項的方法,更包含下列步驟:移除未接合至該接觸墊之該第第一微粒。
  17. 如申請專利範圍第1項的方法,其中該等第一微粒係大致呈球形。
  18. 如申請專利範圍第17項的方法,其中該等第二微粒係大致呈球形。
  19. 一種形成自組裝電氣接觸結構之方法,其包括下列步驟:形成接觸墊於基板上;暴露該基板於含有可自由移動之複數第一微粒的溶液,該接觸墊之表面與該等第一微粒之表面係經選擇,以致該等複數個第一微粒之至少一個微粒接合於該接觸墊,其中,在該至少一個第一微粒及接觸墊間之接合係共價鍵;移除未接合於該接觸墊的該等第一微粒,以使至少一個第一微粒包括一個高點,其高於比其他在表面鄰近的高點還高以產生一不平坦的表面,該高點高於接觸墊之表面上方至少10微米;將該至少一個第一微粒暴露至具有1至10微米之尺寸的複數個第二微粒,該等第二微粒之尺寸小於該至少 一個第一微粒,以黏附至該至少一個第一微粒,並藉此將該至少一個第一微粒之表面粗糙化;及將相對的接觸件壓入於該至少一個第一微粒及複數個第二微粒,以致該相對的接觸件與該接觸墊間形成電氣連接。
  20. 一種自組裝電氣接觸結構,包含有:位於基板上的一接觸墊;複數個第一微粒,經由接合至該接觸墊的共價鍵而自組裝在該接觸墊上,其中該等第一微粒係藉由非固態介質而可自由移動,該等第一微粒具有足夠的尺寸,以致該等第一微粒形成不平坦表面,每一單獨的第一微粒包括一高點,使得其在緊接圍繞該等第一微粒的表面上之任一點高於該接觸墊,由每一單獨的第一微粒形成一接觸粗糙度;以及複數個第二微粒,在尺寸上小於接合至自組裝至該接觸墊上之該等第一微粒,該等第二微粒的尺寸在1至10微米之間,該等第二微粒將自組裝至該接觸墊上之第一微粒之表面粗糙化。
  21. 如申請專利範圍第20項的自組裝電氣接觸結構,更包含有:一相對的接觸件,其被壓入於該等微粒中,以致該相對的接觸件與該接觸墊間經由該等微粒形成電氣連接。
  22. 如申請專利範圍第20項的自組裝電氣接觸結構,其中該等微粒為球形。
  23. 如申請專利範圍第20項的自組裝電氣接觸結構,其中該等微粒形狀為非對稱性,以形成一尖銳的接觸粗糙。
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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7550846B2 (en) * 2005-12-21 2009-06-23 Palo Alto Research Center Conductive bump with a plurality of contact elements
DE102006016276B3 (de) * 2006-03-31 2007-07-12 Siemens Ag Verfahren zum Aufbringen von Lotpartikeln auf Kontaktflächen sowie hierfür geeignete Lotpartikel und Bauteile mit Kontaktflächen
US7749327B2 (en) * 2007-11-01 2010-07-06 Micron Technology, Inc. Methods for treating surfaces
US8618647B2 (en) * 2011-08-01 2013-12-31 Tessera, Inc. Packaged microelectronic elements having blind vias for heat dissipation
EP2701189B1 (en) * 2012-08-24 2016-01-20 Imec Substrate, fabrication method of such a substrate, method of self-assembly of such substrates and device obtained thereof
KR102006637B1 (ko) 2013-03-20 2019-10-01 한국전자통신연구원 범프의 형성 방법 및 이를 포함하는 반도체 소자의 형성방법
EP2836056A4 (en) * 2013-06-12 2015-12-16 Meiko Electronics Co Ltd METHOD FOR PRODUCING A HEAT-DISABLE PLATE
KR102032271B1 (ko) 2013-08-09 2019-10-16 한국전자통신연구원 전자기기의 접합구조
US9142475B2 (en) 2013-08-13 2015-09-22 Intel Corporation Magnetic contacts
GB2523983A (en) * 2013-12-17 2015-09-16 Conpart As Bonded assemblies with pre-deposited polymer balls on demarcated areas and methods of forming such bonded assemblies
KR200475949Y1 (ko) * 2014-08-28 2015-01-19 주식회사앤제이컴퍼니 실내오락용 블록형 패드
CN105659375B (zh) 2014-09-26 2021-08-24 英特尔公司 柔性封装架构
US9942986B1 (en) 2016-09-23 2018-04-10 Apple Inc. System with field-assisted conductive adhesive bonds
CN110098199B (zh) * 2019-05-05 2022-04-05 深圳市华星光电半导体显示技术有限公司 显示面板及显示装置
DE102020124955A1 (de) * 2020-09-24 2022-03-24 Sphera Technology Gmbh Elektronikeinheit mit einem integrierten Schaltkreis und Verfahren zu deren Herstellung

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5225966A (en) * 1991-07-24 1993-07-06 At&T Bell Laboratories Conductive adhesive film techniques
US5508144A (en) * 1993-11-19 1996-04-16 At&T Corp. Process for fabricating a device
US5565280A (en) * 1990-02-14 1996-10-15 Particle Interconnect, Inc. Electrical interconnect using particle enhanced joining of metal surfaces
US5834335A (en) * 1995-09-28 1998-11-10 Texas Instruments Incorporated Non-metallurgical connection between an integrated circuit and a circuit board or another integrated circuit
US6326241B1 (en) * 1997-12-29 2001-12-04 Visteon Global Technologies, Inc. Solderless flip-chip assembly and method and material for same
WO2004015760A1 (ja) * 2002-08-09 2004-02-19 Jsr Corporation 異方導電性コネクターおよび導電性ペースト組成物、プローブ部材並びにウエハ検査装置およびウエハ検査方法
US20040137725A1 (en) * 2003-01-10 2004-07-15 Nanofilm Technologies International Pte Ltd Copper interconnects
US6770369B1 (en) * 1999-02-22 2004-08-03 Nippon Chemical Industrial Co., Ltd. Conductive electrolessly plated powder, its producing method, and conductive material containing the plated powder
US6849948B2 (en) * 2003-03-05 2005-02-01 Au Optronics Corporation Contact structure and manufacturing method thereof
US6858527B2 (en) * 2003-04-14 2005-02-22 Intel Corporation Method to increase electromigration resistance of copper using self-assembled organic thiolate monolayers

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6045219A (ja) 1983-08-23 1985-03-11 Toshiba Corp アクテイブマトリクス型表示装置
US5001542A (en) 1988-12-05 1991-03-19 Hitachi Chemical Company Composition for circuit connection, method for connection using the same, and connected structure of semiconductor chips
JPH04364734A (ja) * 1991-06-12 1992-12-17 Seiko Epson Corp 突起電極の形成方法
JPH0562981A (ja) * 1991-06-18 1993-03-12 Oki Electric Ind Co Ltd 半導体素子の突起電極形成方法とその接続方法
US6652808B1 (en) 1991-11-07 2003-11-25 Nanotronics, Inc. Methods for the electronic assembly and fabrication of devices
JPH0669278A (ja) * 1992-08-18 1994-03-11 Toshiba Corp 半導体素子の接続方法
US5616206A (en) 1993-06-15 1997-04-01 Ricoh Company, Ltd. Method for arranging conductive particles on electrodes of substrate
US6569496B1 (en) 1998-03-30 2003-05-27 International Business Machines Corporation CVD of metals capable of receiving nickel or alloys thereof using inert contact
JP3570280B2 (ja) * 1999-03-18 2004-09-29 セイコーエプソン株式会社 半導体素子の突起電極構造およびその形成方法
WO2002009175A2 (en) 2000-07-20 2002-01-31 President And Fellows Of Harvard College Self-assembled electrical networks
US6991958B2 (en) * 2001-03-05 2006-01-31 The Trustees Of Columbia University In The City Of New York Solid-state electric device
US6417025B1 (en) 2001-04-02 2002-07-09 Alien Technology Corporation Integrated circuit packages assembled utilizing fluidic self-assembly
US6858481B2 (en) * 2001-08-13 2005-02-22 Advanced Micro Devices, Inc. Memory device with active and passive layers
US6974604B2 (en) 2001-09-28 2005-12-13 Hrl Laboratories, Llc Method of self-latching for adhesion during self-assembly of electronic or optical components
EP1464080B1 (de) 2002-01-18 2007-09-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur herstellung einer verbundvorrichtung
US7176146B2 (en) * 2002-02-01 2007-02-13 William Marsh Rice University Method of making a molecule-surface interface
US6693384B1 (en) 2002-02-01 2004-02-17 Alien Technology Corporation Interconnect structure for electronic devices
JP4010846B2 (ja) 2002-03-29 2007-11-21 富士通日立プラズマディスプレイ株式会社 フラットディスプレイパネル用前面フィルム及びこれを用いたフラットディスプレイ装置、並びに、プラズマディスプレイパネル用前面フィルム及びこれを用いたプラズマディスプレイ装置
KR100939615B1 (ko) 2002-12-13 2010-02-01 엘지디스플레이 주식회사 색재현성과 휘도를 증가시킨 반투과형 액정표시장치 및이의 구동방법
US20040156177A1 (en) 2003-02-12 2004-08-12 Matsushita Electric Industrial Co., Ltd. Package of electronic components and method for producing the same
JP2005054240A (ja) * 2003-08-05 2005-03-03 Fuji Photo Film Co Ltd 導電性フィルムおよびその作製方法
US6989325B2 (en) 2003-09-03 2006-01-24 Industrial Technology Research Institute Self-assembled nanometer conductive bumps and method for fabricating
JP2005108870A (ja) * 2003-09-26 2005-04-21 Sekisui Chem Co Ltd Icチップ、icチップの製造方法、半導体パッケージ及び液晶表示装置
JP3997991B2 (ja) * 2004-01-14 2007-10-24 セイコーエプソン株式会社 電子装置
TWI239574B (en) * 2004-03-18 2005-09-11 Ind Tech Res Inst The method of conductive particles dispersing

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5565280A (en) * 1990-02-14 1996-10-15 Particle Interconnect, Inc. Electrical interconnect using particle enhanced joining of metal surfaces
US5225966A (en) * 1991-07-24 1993-07-06 At&T Bell Laboratories Conductive adhesive film techniques
US5508144A (en) * 1993-11-19 1996-04-16 At&T Corp. Process for fabricating a device
US5834335A (en) * 1995-09-28 1998-11-10 Texas Instruments Incorporated Non-metallurgical connection between an integrated circuit and a circuit board or another integrated circuit
US6326241B1 (en) * 1997-12-29 2001-12-04 Visteon Global Technologies, Inc. Solderless flip-chip assembly and method and material for same
US6770369B1 (en) * 1999-02-22 2004-08-03 Nippon Chemical Industrial Co., Ltd. Conductive electrolessly plated powder, its producing method, and conductive material containing the plated powder
WO2004015760A1 (ja) * 2002-08-09 2004-02-19 Jsr Corporation 異方導電性コネクターおよび導電性ペースト組成物、プローブ部材並びにウエハ検査装置およびウエハ検査方法
US20040137725A1 (en) * 2003-01-10 2004-07-15 Nanofilm Technologies International Pte Ltd Copper interconnects
US6849948B2 (en) * 2003-03-05 2005-02-01 Au Optronics Corporation Contact structure and manufacturing method thereof
US6858527B2 (en) * 2003-04-14 2005-02-22 Intel Corporation Method to increase electromigration resistance of copper using self-assembled organic thiolate monolayers

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