TWI420570B - 以光阻熱回流處理技術於半導體基板上形成圖形的方法 - Google Patents

以光阻熱回流處理技術於半導體基板上形成圖形的方法 Download PDF

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TWI420570B
TWI420570B TW097149988A TW97149988A TWI420570B TW I420570 B TWI420570 B TW I420570B TW 097149988 A TW097149988 A TW 097149988A TW 97149988 A TW97149988 A TW 97149988A TW I420570 B TWI420570 B TW I420570B
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semiconductor substrate
pattern
photoresist layer
thermal reflow
forming
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TW201025417A (en
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Edward Yi Chang
Chia Ta Chang
Shih Kuang Hsiao
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Univ Nat Chiao Tung
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/16Oxides
    • C30B29/20Aluminium oxides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/36Carbides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08Etching
    • C30B33/10Etching in solutions or melts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Description

以光阻熱回流處理技術於半導體基板上形成圖形的方法
本發明為一種形成半導體機基板圖形的方法,特別是一種以光阻熱回流處理技術於半導體基板上形成圖形的方法。
傳統上,於半導體基板上製作圖形時,會使用乾式蝕刻法形成所需的圖形,而乾式蝕刻法雖可蝕刻出高密度及高蝕刻深、寬比率的圖形,但仍無法蝕刻出具有傾斜角度,且所蝕刻的輪廓具有平滑、平整且均勻之圓柱狀圖形。
如傳統的半導體基板之圖形形成方式,其蝕刻過程如下圖之第1A圖、第1B圖以及第1C圖之習知技藝圖所示。其中如第1A圖所示,於半導體基板(Substrate)101上形成蝕刻遮罩(Hard Mask)102。再如第1B圖所示,於蝕刻遮罩102上形成光阻層103。最後如第1C圖所示,以乾蝕刻技術,使用光阻層103進行蝕刻且除去蝕刻遮罩102,以及蝕刻半導體基板101,最後形成所需的圖形。而習知技術所蝕刻出的半導體基板圖形,其圖形無法具有特定的傾斜角度,且所蝕刻的輪廓亦無法平整。
當半導體基板若具有特定傾斜角度,如圓柱狀之蝕刻圖形,且當其應用於發光二極體元件時,一般咸信認為可增加光的外部萃取效率,且進而可提升元件的輸出功率。
此外,以溼式蝕刻半導體基板所形成的圖形化半導體基板,雖可提供傾斜角度之蝕刻圖形,但卻無法蝕刻出高密度以及高蝕刻的深、寬比率;且亦無法蝕刻出輪廓平滑、平整以及均勻之圖形。
如中華民國專利資料庫所提供的專利編號公開號第I236773號之專利,其所形成之半導體基板的蝕刻圖形為洞形狀圖形。其所形成的圖形密度與蝕刻後的深、寬比率較低,且無法具有特定的圓柱狀傾斜角度。
又經搜尋中華民國專利編號公開號第200601582號之專利,其所進行之圖形化半導體基板的方法同前所述。其所形成的圖形密度與蝕刻後的深、寬比率較低,且無法具有特定的圓柱狀傾斜角度。
故於目前所發表的文獻中,倘使用乾式蝕刻法所製作的半導體基板產生的圖形,亦皆無法蝕刻出兼具傾斜角度、高密度、高蝕刻深、寬比率,且無法蝕刻出具有平滑、平整輪廓之柱狀圖形。而此結果亦會嚴重影響半導體基板圖形化成長之磊晶品質及應用於元件上的特性。
故而,為因應圖形化半導體基板技術之生產需求,尚需發展相關製造的製程技術,並節省製造人力與製造時間等成本,且能有效形成各式的圖形化半導體基板,以達到節能減碳之目的。
本發明為一種以光阻熱回流處理技術於半導體基板上形成圖形的方法。
相較於習知技藝中的圖形化半導體基板,本發明可形成兼具有高密度,高蝕刻深、寬比,以及具有平滑的蝕刻輪廓,平整之比柱狀圖形,並具有特定傾斜角度圖形之半導體基板,故可大幅增加元件的特性。
本發明藉由控制不同之光阻熱回流處理的時間,可形成出不同圖形間距之半導體基板,且達到形成具有極小線寬之半導體基板。
本發明可改良半導體製程中的黃光微影技術,進而改善半導體基板經蝕刻後的圖形,可且進一步以控制光阻熱回流處理的時間,改變光阻的形狀,故可以縮小半導體基板所具有的圖形間距。
本發明可有效的降低磊晶過程中所產生的差排密度,且可提升磊晶的品質,而對於發光二極體元件,本發明可增進加光的外部萃取效率,進而提高發光二極體的元件輸出功率。
故而,關於本發明之優點與精神可以藉由以下發明詳述及所附圖式得到進一步的瞭解。
本發明為一種以光阻熱回流處理技術於半導體基板上形成圖形的方法,詳細步驟如下所示:本發明係使用光阻熱回流處理技術,藉以於半導體基板上形成圓形圖案,而其流程如第2A圖至第2D圖所示。
如第2A圖所示,於半導體基板(Substrate)201上形成蝕刻遮罩(Hard Mask)202。而半導體基板的材料包括了如:藍寶石(Sapphire),矽基板(Si),碳化矽(SiC)等半導體基板。
如第2B圖所示,於蝕刻遮罩(Hard Mask)202上形成光阻層203。
如第2C圖所示,對光阻層203進行熱回流處理技術(Thermal Reflow Technique),使光阻層203產生形變,成為圓弧形狀的光阻層203。其熱回流之溫度約達150℃至180℃之間。且以控制光阻熱回流的時間,其熱回流之時間約達30秒至120秒之間,藉以形成不同圖形間距之光阻圖形。
如第2D圖所示,以半導體黃光微影製程中的乾蝕刻技術,如電漿蝕刻方式,且使用光阻層203以進行蝕刻蝕刻遮罩202,以及半導體基板201等,而可於半導體基板201上形成具有圓形的圖案。故於半導體基板上的圖形兼俱有高密度、高蝕刻深寬比、蝕刻輪廓平滑、並帶有傾斜角度之柱狀圖形。其圖形亦可形成線寬,該線寬可極微小化,而達到0.3微米(μm )至1微米。
第3圖為電子顯微鏡下,藍寶石半導體基板圖形之蝕刻結果,其蝕刻輪廓平整、均勻、並帶有傾斜角度。
本發明為一種改善黃光微影步驟的技術,利用乾式蝕刻方法可蝕刻出具有傾斜角度、蝕刻輪廓平滑、均勻、高密度與高蝕刻深、寬比圖形基板。更可以控制光阻熱回流技術之時間,形成不同圖形間距之圖形化基板,以達到極小線寬之圖形化基板。
本發明與一般習知技術之圖形化基板比較,本發明可形成兼具高密度、高蝕刻深、寬比、蝕刻輪廓平滑、並具有傾斜角度圖形之半導體基板,且藉由控制不同光阻熱回流處理技術時間,形成不同圖形間距之圖形化基板,達到極小線寬之圖形化基板。
以上所述僅為本發明之較佳實施例而已,並非用以限定本發明之申請專利範圍;凡其它未脫離本發明所揭示之精神下所完成之等效改變或修飾,均應包含在下述之申請專利範圍內。
101...半導體基板
102...蝕刻遮罩
103...光阻層
201...半導體基板
202...蝕刻遮罩
203...光阻層
第1A至第1C圖所示為習知技藝圖。
第2A至第2D圖所示為本發明之較佳實施例圖。
第3圖為本發明之電子顯微鏡圖形。
201...半導體基板
202...蝕刻遮罩
203...光阻層

Claims (6)

  1. 一種以熱回流處理技術使光阻層產生形變而於半導體基板上形成圖形的方法,至少包含:形成一蝕刻遮罩於一半導體基板上且該蝕刻遮罩上具有一光阻層,其中該半導體基板係由藍寶石半導體基板,矽基半導體基板,以及碳化矽半導體基板群組中所選出;進行一熱回流處理,係對該光阻層進行該熱回流處理,成為具有一特定形狀光阻層,其中該熱回流處理之溫度包含約151℃至180℃之間,該熱回流處理之時間包含約30秒至120秒之間;進行電漿蝕刻該蝕刻遮罩以及該半導體基板,係藉由該特定形狀光阻層以進行蝕刻,以於該半導體基板上形成一特定圖形。
  2. 根據申請專利範圍第1項之方法,其中該特定圖形包含一柱狀圖形。
  3. 根據申請專利範圍第2項之方法,其中該柱狀圖形的間距包含0.3微米至1微米。
  4. 一種以熱回流處理技術使光阻層產生形變而於半導體基板上形成圖形的方法,至少包含:形成一蝕刻遮罩於一半導體基板上,其中該半導體基板係由藍寶石半導體基板,矽基半導體基板,以及碳化矽半導體基板群組中所選出; 形成一光阻層於該蝕刻遮罩上;進行一熱回流處理,係對該光阻層進行該熱回流處理以使該光阻層產生形變,成為具有一特定形狀光阻層,其中該熱回流處理之溫度包含約151℃至180℃之間,該熱回流處理之時間包含約30秒至120秒之間;進行電漿蝕刻該蝕刻遮罩以及該半導體基板,係藉由該特定形狀光阻層以進行蝕刻,以於該半導體基板上形成一特定圖形。
  5. 根據申請專利範圍第1項之方法,其中該特定圖形包含一柱狀圖形。
  6. 根據申請專利範圍第5項之方法,其中該柱狀圖形的間距包含0.3微米至1微米。
TW097149988A 2008-12-22 2008-12-22 以光阻熱回流處理技術於半導體基板上形成圖形的方法 TWI420570B (zh)

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US12/385,525 US20100159708A1 (en) 2008-12-22 2009-04-10 Method for forming required pattern on semiconductor substrate by thermal reflow technique

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US20040146807A1 (en) * 2003-01-27 2004-07-29 Samsung Electronics Co., Ltd. Method of fabricating microlens array

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US5316640A (en) * 1991-06-19 1994-05-31 Matsushita Electric Industrial Co., Ltd. Fabricating method of micro lens
US5417799A (en) * 1993-09-20 1995-05-23 Hughes Aircraft Company Reactive ion etching of gratings and cross gratings structures
JP3393286B2 (ja) * 1995-09-08 2003-04-07 ソニー株式会社 パターンの形成方法
KR100823031B1 (ko) * 2006-12-21 2008-04-17 동부일렉트로닉스 주식회사 이미지 센서 제조방법
KR101449000B1 (ko) * 2007-09-06 2014-10-13 엘지이노텍 주식회사 반도체 발광소자 및 그 제조방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6168906B1 (en) * 1998-05-26 2001-01-02 The Charles Stark Draper Laboratory, Inc. Micromachined membrane with locally compliant and stiff regions and method of making same
US20040146807A1 (en) * 2003-01-27 2004-07-29 Samsung Electronics Co., Ltd. Method of fabricating microlens array

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