TWI397616B - 利用有機表面鈍化及微差電鍍延遲進行由底部往上電鍍 - Google Patents
利用有機表面鈍化及微差電鍍延遲進行由底部往上電鍍 Download PDFInfo
- Publication number
- TWI397616B TWI397616B TW098139365A TW98139365A TWI397616B TW I397616 B TWI397616 B TW I397616B TW 098139365 A TW098139365 A TW 098139365A TW 98139365 A TW98139365 A TW 98139365A TW I397616 B TWI397616 B TW I397616B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- passivation film
- trench
- via structure
- seed layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
- H10P14/47—Electrolytic deposition, i.e. electroplating; Electroless plating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
- H10W20/0765—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches the thin functional dielectric layers being temporary, e.g. sacrificial layers
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Electroplating Methods And Accessories (AREA)
- Chemically Coating (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11754008P | 2008-11-24 | 2008-11-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201026911A TW201026911A (en) | 2010-07-16 |
| TWI397616B true TWI397616B (zh) | 2013-06-01 |
Family
ID=42196702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098139365A TWI397616B (zh) | 2008-11-24 | 2009-11-19 | 利用有機表面鈍化及微差電鍍延遲進行由底部往上電鍍 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8293647B2 (https=) |
| JP (1) | JP5409801B2 (https=) |
| KR (1) | KR101368308B1 (https=) |
| CN (1) | CN102224574B (https=) |
| TW (1) | TWI397616B (https=) |
| WO (1) | WO2010059857A2 (https=) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10256142B2 (en) | 2009-08-04 | 2019-04-09 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| US12444651B2 (en) | 2009-08-04 | 2025-10-14 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| JP5667485B2 (ja) * | 2011-03-17 | 2015-02-12 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法、及び半導体装置 |
| US20130051530A1 (en) * | 2011-08-30 | 2013-02-28 | Fujifilm Corporation | High Aspect Ratio Grid for Phase Contrast X-ray Imaging and Method of Making the Same |
| CN102798471B (zh) * | 2011-10-19 | 2015-08-12 | 清华大学 | 一种红外探测器及其制备方法 |
| US8754531B2 (en) * | 2012-03-14 | 2014-06-17 | Nanya Technology Corp. | Through-silicon via with a non-continuous dielectric layer |
| CN113862634A (zh) | 2012-03-27 | 2021-12-31 | 诺发系统公司 | 钨特征填充 |
| US11437269B2 (en) | 2012-03-27 | 2022-09-06 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| US10381266B2 (en) | 2012-03-27 | 2019-08-13 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| KR101972969B1 (ko) * | 2012-08-20 | 2019-04-29 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
| CN104112697B (zh) * | 2013-04-18 | 2017-09-15 | 中芯国际集成电路制造(上海)有限公司 | 一种改善铜填充质量的方法 |
| JP6187008B2 (ja) * | 2013-08-07 | 2017-08-30 | 大日本印刷株式会社 | 金属充填構造体の製造方法及び金属充填構造体 |
| US9899234B2 (en) | 2014-06-30 | 2018-02-20 | Lam Research Corporation | Liner and barrier applications for subtractive metal integration |
| US9349637B2 (en) * | 2014-08-21 | 2016-05-24 | Lam Research Corporation | Method for void-free cobalt gap fill |
| US9997405B2 (en) | 2014-09-30 | 2018-06-12 | Lam Research Corporation | Feature fill with nucleation inhibition |
| US9859124B2 (en) * | 2015-04-17 | 2018-01-02 | Taiwan Semiconductor Manufacturing Company Ltd | Method of manufacturing semiconductor device with recess |
| US10170320B2 (en) | 2015-05-18 | 2019-01-01 | Lam Research Corporation | Feature fill with multi-stage nucleation inhibition |
| US20160351493A1 (en) * | 2015-05-27 | 2016-12-01 | Macronix International Co., Ltd. | Semiconductor device and manufacturing method for the same |
| JP7125343B2 (ja) * | 2015-10-23 | 2022-08-24 | アプライド マテリアルズ インコーポレイテッド | 表面毒化処理によるボトムアップ式間隙充填 |
| US10438847B2 (en) | 2016-05-13 | 2019-10-08 | Lam Research Corporation | Manganese barrier and adhesion layers for cobalt |
| US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
| US10211099B2 (en) | 2016-12-19 | 2019-02-19 | Lam Research Corporation | Chamber conditioning for remote plasma process |
| US10242879B2 (en) | 2017-04-20 | 2019-03-26 | Lam Research Corporation | Methods and apparatus for forming smooth and conformal cobalt film by atomic layer deposition |
| WO2020118100A1 (en) | 2018-12-05 | 2020-06-11 | Lam Research Corporation | Void free low stress fill |
| SG11202108725XA (en) | 2019-02-13 | 2021-09-29 | Lam Res Corp | Tungsten feature fill with inhibition control |
| US11781215B2 (en) * | 2019-06-18 | 2023-10-10 | Tokyo Electron Limited | Substrate processing method of forming a plating film in a recess |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060105534A1 (en) * | 2004-01-29 | 2006-05-18 | International Business Machines Corporation | High Q factor integrated circuit inductor |
| TW200814199A (en) * | 2006-07-18 | 2008-03-16 | Applied Materials Inc | New scheme for copper filling in vias and trenches |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3959874A (en) * | 1974-12-20 | 1976-06-01 | Western Electric Company, Inc. | Method of forming an integrated circuit assembly |
| US6380096B2 (en) * | 1998-07-09 | 2002-04-30 | Applied Materials, Inc. | In-situ integrated oxide etch process particularly useful for copper dual damascene |
| KR100323875B1 (ko) | 1999-06-29 | 2002-02-16 | 박종섭 | 반도체 소자의 금속 배선 형성 방법 |
| US6410418B1 (en) * | 1999-08-18 | 2002-06-25 | Advanced Micro Devices, Inc. | Recess metallization via selective insulator formation on nucleation/seed layer |
| KR100331570B1 (ko) * | 2000-06-13 | 2002-04-06 | 윤종용 | 전기도금법을 이용한 반도체 메모리 소자의 커패시터제조방법 |
| US6787460B2 (en) * | 2002-01-14 | 2004-09-07 | Samsung Electronics Co., Ltd. | Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses and conductive contacts so formed |
| KR100465063B1 (ko) * | 2002-04-01 | 2005-01-06 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 형성방법 |
| US7628897B2 (en) * | 2002-10-23 | 2009-12-08 | Applied Materials, Inc. | Reactive ion etching for semiconductor device feature topography modification |
| US20040248375A1 (en) * | 2003-06-04 | 2004-12-09 | Mcneil John | Trench filling methods |
| KR100998963B1 (ko) | 2003-07-21 | 2010-12-09 | 매그나칩 반도체 유한회사 | 반도체 소자의 rf 인덕터 제조 방법 |
| KR100599434B1 (ko) * | 2003-10-20 | 2006-07-14 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 형성방법 |
| KR20050056383A (ko) | 2003-12-10 | 2005-06-16 | 매그나칩 반도체 유한회사 | 반도체 소자의 금속배선 형성방법 |
| CN100565815C (zh) * | 2004-10-08 | 2009-12-02 | 西尔弗布鲁克研究有限公司 | 从蚀刻沟槽中移除聚合物涂层的方法 |
| KR100632552B1 (ko) | 2004-12-30 | 2006-10-11 | 삼성전기주식회사 | 내부 비아홀의 필 도금 구조 및 그 제조 방법 |
| JP2006274369A (ja) | 2005-03-29 | 2006-10-12 | Ebara Corp | 基板配線形成方法、基板配線形成装置、及びめっき抑制物質転写スタンプ |
| JP2007009247A (ja) * | 2005-06-28 | 2007-01-18 | Ebara Corp | 基板処理装置及び基板処理方法 |
| JP2007149824A (ja) * | 2005-11-25 | 2007-06-14 | Ebara Corp | 成膜方法及び成膜装置 |
| US7709320B2 (en) * | 2006-06-28 | 2010-05-04 | International Business Machines Corporation | Method of fabricating trench capacitors and memory cells using trench capacitors |
| US20080026555A1 (en) * | 2006-07-26 | 2008-01-31 | Dubin Valery M | Sacrificial tapered trench opening for damascene interconnects |
| US7560222B2 (en) * | 2006-10-31 | 2009-07-14 | International Business Machines Corporation | Si-containing polymers for nano-pattern device fabrication |
| US7915115B2 (en) * | 2008-06-03 | 2011-03-29 | International Business Machines Corporation | Method for forming dual high-k metal gate using photoresist mask and structures thereof |
-
2009
- 2009-11-18 US US12/620,818 patent/US8293647B2/en not_active Expired - Fee Related
- 2009-11-19 JP JP2011537626A patent/JP5409801B2/ja not_active Expired - Fee Related
- 2009-11-19 KR KR1020117014681A patent/KR101368308B1/ko not_active Expired - Fee Related
- 2009-11-19 CN CN200980147108.0A patent/CN102224574B/zh not_active Expired - Fee Related
- 2009-11-19 TW TW098139365A patent/TWI397616B/zh not_active IP Right Cessation
- 2009-11-19 WO PCT/US2009/065193 patent/WO2010059857A2/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060105534A1 (en) * | 2004-01-29 | 2006-05-18 | International Business Machines Corporation | High Q factor integrated circuit inductor |
| TW200814199A (en) * | 2006-07-18 | 2008-03-16 | Applied Materials Inc | New scheme for copper filling in vias and trenches |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5409801B2 (ja) | 2014-02-05 |
| WO2010059857A3 (en) | 2010-08-19 |
| JP2012510162A (ja) | 2012-04-26 |
| CN102224574B (zh) | 2014-06-11 |
| US8293647B2 (en) | 2012-10-23 |
| KR20110102374A (ko) | 2011-09-16 |
| TW201026911A (en) | 2010-07-16 |
| CN102224574A (zh) | 2011-10-19 |
| KR101368308B1 (ko) | 2014-02-26 |
| US20100130007A1 (en) | 2010-05-27 |
| WO2010059857A2 (en) | 2010-05-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |