TWI395843B - 矽基板及其製造方法 - Google Patents

矽基板及其製造方法 Download PDF

Info

Publication number
TWI395843B
TWI395843B TW098105989A TW98105989A TWI395843B TW I395843 B TWI395843 B TW I395843B TW 098105989 A TW098105989 A TW 098105989A TW 98105989 A TW98105989 A TW 98105989A TW I395843 B TWI395843 B TW I395843B
Authority
TW
Taiwan
Prior art keywords
substrate
less
ruthenium
carbon
atoms
Prior art date
Application number
TW098105989A
Other languages
English (en)
Chinese (zh)
Other versions
TW200944626A (en
Inventor
Kazunari Kurita
Shuichi Omote
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Publication of TW200944626A publication Critical patent/TW200944626A/zh
Application granted granted Critical
Publication of TWI395843B publication Critical patent/TWI395843B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/798Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being provided in or under the channel regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Solid State Image Pick-Up Elements (AREA)
TW098105989A 2008-02-29 2009-02-25 矽基板及其製造方法 TWI395843B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008049847A JP5568837B2 (ja) 2008-02-29 2008-02-29 シリコン基板の製造方法

Publications (2)

Publication Number Publication Date
TW200944626A TW200944626A (en) 2009-11-01
TWI395843B true TWI395843B (zh) 2013-05-11

Family

ID=40793293

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098105989A TWI395843B (zh) 2008-02-29 2009-02-25 矽基板及其製造方法

Country Status (6)

Country Link
US (1) US7915145B2 (cg-RX-API-DMAC7.html)
EP (1) EP2096667B1 (cg-RX-API-DMAC7.html)
JP (1) JP5568837B2 (cg-RX-API-DMAC7.html)
KR (1) KR101073419B1 (cg-RX-API-DMAC7.html)
CN (1) CN101521199B (cg-RX-API-DMAC7.html)
TW (1) TWI395843B (cg-RX-API-DMAC7.html)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5343371B2 (ja) * 2008-03-05 2013-11-13 株式会社Sumco シリコン基板とその製造方法
JP2010034128A (ja) * 2008-07-25 2010-02-12 Sumco Corp ウェーハの製造方法及び該方法により得られたウェーハ
DE102010027411A1 (de) * 2010-07-15 2012-01-19 Osram Opto Semiconductors Gmbh Halbleiterbauelement, Substrat und Verfahren zur Herstellung einer Halbleiterschichtenfolge
KR20120032329A (ko) * 2010-09-28 2012-04-05 삼성전자주식회사 반도체 소자
JP5825931B2 (ja) * 2011-08-25 2015-12-02 グローバルウェーハズ・ジャパン株式会社 固体撮像素子の製造方法
US8713966B2 (en) 2011-11-30 2014-05-06 Corning Incorporated Refractory vessels and methods for forming same
CN103094216A (zh) * 2013-01-11 2013-05-08 无锡华润上华科技有限公司 一种nor闪存器件的退火工艺及nor闪存器件
CN103077927A (zh) * 2013-01-11 2013-05-01 无锡华润上华科技有限公司 一种nor闪存器件的退火工艺及nor闪存器件
CN103065944B (zh) * 2013-01-14 2015-06-24 武汉新芯集成电路制造有限公司 一种便携式器件晶圆的制造方法
US8907494B2 (en) 2013-03-14 2014-12-09 International Business Machines Corporation Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures
JP6260100B2 (ja) * 2013-04-03 2018-01-17 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP6020342B2 (ja) 2013-05-10 2016-11-02 信越半導体株式会社 シリコンエピタキシャルウェーハ及びシリコンエピタキシャルウェーハの製造方法
WO2015186288A1 (ja) * 2014-06-02 2015-12-10 株式会社Sumco シリコンウェーハおよびその製造方法
JP6366383B2 (ja) * 2014-06-27 2018-08-01 株式会社ディスコ 加工装置
DE102016209008B4 (de) * 2016-05-24 2019-10-02 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe aus einkristallinem Silizium, Vorrichtung zur Herstellung einer Halbleiterscheibe aus einkristallinem Silizium und Halbleiterscheibe aus einkristallinem Silizium
JP6531729B2 (ja) * 2016-07-19 2019-06-19 株式会社Sumco シリコン試料の炭素濃度評価方法、シリコンウェーハ製造工程の評価方法、シリコンウェーハの製造方法およびシリコン単結晶インゴットの製造方法
US10326013B2 (en) 2016-11-23 2019-06-18 Microchip Technology Incorporated Method of forming a field-effect transistor (FET) or other semiconductor device with front-side source and drain contacts
US10522367B2 (en) * 2017-03-06 2019-12-31 Qualcomm Incorporated Gettering layer formation and substrate
TWI673834B (zh) * 2018-09-26 2019-10-01 矽品精密工業股份有限公司 電子封裝件及其製法
DE102020132289A1 (de) * 2020-12-04 2022-06-09 Vishay Semiconductor Gmbh Verfahren zum herstellen einer fotodiode
FR3122524B1 (fr) * 2021-04-29 2025-02-21 St Microelectronics Crolles 2 Sas Procédé de fabrication de puces semiconductrices

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5571373A (en) * 1994-05-18 1996-11-05 Memc Electronic Materials, Inc. Method of rough polishing semiconductor wafers to reduce surface roughness
US20040166684A1 (en) * 2003-02-20 2004-08-26 Yasuo Koike Silicon wafer and method for manufacturing the same
US20060022321A1 (en) * 2004-07-28 2006-02-02 Renesas Technology Corp. Semiconductor chip having gettering layer, and method for manufacturing the same
US20070207595A1 (en) * 2006-02-15 2007-09-06 Kazunari Kurita Method for producing silicon wafer

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140632A (en) * 1980-04-01 1981-11-04 Nec Corp Method for giving strain to semiconductor wafer
JPS5721826A (en) * 1980-07-15 1982-02-04 Nec Corp Manufacture of semiconductor single crystal wafer
JP2726583B2 (ja) * 1991-11-18 1998-03-11 三菱マテリアルシリコン株式会社 半導体基板
JP3384506B2 (ja) * 1993-03-30 2003-03-10 ソニー株式会社 半導体基板の製造方法
JP4613886B2 (ja) 1993-03-30 2011-01-19 ソニー株式会社 固体撮像素子の製造方法、及び半導体基板の製造方法
JP2719113B2 (ja) * 1994-05-24 1998-02-25 信越半導体株式会社 単結晶シリコンウェーハの歪付け方法
JP3534207B2 (ja) * 1995-05-16 2004-06-07 コマツ電子金属株式会社 半導体ウェーハの製造方法
JPH11162991A (ja) * 1997-12-01 1999-06-18 Nec Corp 半導体装置の製造方法
JP3582569B2 (ja) * 1998-02-10 2004-10-27 三菱住友シリコン株式会社 シリコンウェーハの裏面ゲッタリング処理方法
JP4048481B2 (ja) * 2002-10-04 2008-02-20 沖電気工業株式会社 電子ビーム近接露光方法
JP3732472B2 (ja) * 2002-10-07 2006-01-05 沖電気工業株式会社 Mosトランジスタの製造方法
JP4943636B2 (ja) * 2004-03-25 2012-05-30 エルピーダメモリ株式会社 半導体装置及びその製造方法
JP2006073580A (ja) * 2004-08-31 2006-03-16 Sumco Corp シリコンエピタキシャルウェーハ及びその製造方法
JP4885548B2 (ja) * 2006-01-20 2012-02-29 株式会社ディスコ ウェーハの研磨方法
JP4867518B2 (ja) * 2006-08-03 2012-02-01 株式会社デンソー 半導体装置の製造方法
JP2008049847A (ja) 2006-08-24 2008-03-06 Mazda Motor Corp 自動車用シート装置
JP2009094326A (ja) * 2007-10-10 2009-04-30 Disco Abrasive Syst Ltd ウェーハの研削方法
JP2009259959A (ja) * 2008-04-15 2009-11-05 Sumco Corp 薄厚シリコンウェーハおよびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5571373A (en) * 1994-05-18 1996-11-05 Memc Electronic Materials, Inc. Method of rough polishing semiconductor wafers to reduce surface roughness
US20040166684A1 (en) * 2003-02-20 2004-08-26 Yasuo Koike Silicon wafer and method for manufacturing the same
US20060022321A1 (en) * 2004-07-28 2006-02-02 Renesas Technology Corp. Semiconductor chip having gettering layer, and method for manufacturing the same
US20070207595A1 (en) * 2006-02-15 2007-09-06 Kazunari Kurita Method for producing silicon wafer

Also Published As

Publication number Publication date
CN101521199B (zh) 2012-05-23
CN101521199A (zh) 2009-09-02
TW200944626A (en) 2009-11-01
EP2096667B1 (en) 2013-05-08
US7915145B2 (en) 2011-03-29
US20090218661A1 (en) 2009-09-03
EP2096667A2 (en) 2009-09-02
JP5568837B2 (ja) 2014-08-13
KR20090093854A (ko) 2009-09-02
JP2009206431A (ja) 2009-09-10
KR101073419B1 (ko) 2011-10-17
EP2096667A3 (en) 2011-06-15

Similar Documents

Publication Publication Date Title
TWI395843B (zh) 矽基板及其製造方法
TWI412083B (zh) 矽基板及其製造方法
US20090226736A1 (en) Method of manufacturing silicon substrate
TW201003764A (en) Thin silicon wafer and method of manufacturing the same
TWI442478B (zh) 矽基板及其製造方法
JPWO2009075257A1 (ja) シリコン基板とその製造方法
JPWO2009075288A1 (ja) シリコン基板とその製造方法
JP2011054622A (ja) シリコン基板とその製造方法
TWI436429B (zh) 製造磊晶矽晶圓的方法以及磊晶矽晶圓
JP5401808B2 (ja) シリコン基板とその製造方法
JP5401809B2 (ja) シリコン基板とその製造方法
JP2011023533A (ja) シリコン基板とその製造方法
JP2011054654A (ja) 薄厚化デバイス素子用シリコンウェーハの製造方法