JPS56140632A - Method for giving strain to semiconductor wafer - Google Patents

Method for giving strain to semiconductor wafer

Info

Publication number
JPS56140632A
JPS56140632A JP4261480A JP4261480A JPS56140632A JP S56140632 A JPS56140632 A JP S56140632A JP 4261480 A JP4261480 A JP 4261480A JP 4261480 A JP4261480 A JP 4261480A JP S56140632 A JPS56140632 A JP S56140632A
Authority
JP
Japan
Prior art keywords
abrasing
wafers
surface plate
strain
cloth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4261480A
Other languages
Japanese (ja)
Inventor
Tsuneo Hamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4261480A priority Critical patent/JPS56140632A/en
Publication of JPS56140632A publication Critical patent/JPS56140632A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To enable back side strain to be given uniformly to a great deal of wafers by abrasing the back surface of semiconductor wafers using abrasing particles and abrasing cloth in a simple manner. CONSTITUTION:The abrasing cloth 4 is adhered to a surface plate 5 to form one body. A plurality of the wafers 3 are fixed to the wafer fixing surface plate 1 via a bonding agent which is supplied on the top of the wafers. When the surface plate 5 is rotated in the direction of an arrow, the surface plate 1 is rotated in the direction of an arrow. The wafers 3 are abraised by the abrasing cloth 4. In this way, in order to prevent the rise in temperatures and to control the magnitude of strain, abrasing liquid 6 wherein abrasing particles are resolved is supplied, and a great deal of strain can be uniformly given to the back sides of the wafers 3.
JP4261480A 1980-04-01 1980-04-01 Method for giving strain to semiconductor wafer Pending JPS56140632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4261480A JPS56140632A (en) 1980-04-01 1980-04-01 Method for giving strain to semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4261480A JPS56140632A (en) 1980-04-01 1980-04-01 Method for giving strain to semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS56140632A true JPS56140632A (en) 1981-11-04

Family

ID=12640891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4261480A Pending JPS56140632A (en) 1980-04-01 1980-04-01 Method for giving strain to semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS56140632A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62255059A (en) * 1986-04-30 1987-11-06 Speedfam Co Ltd Back damage device
JPS62255058A (en) * 1986-04-30 1987-11-06 Speedfam Co Ltd Back damage device
US4879258A (en) * 1988-08-31 1989-11-07 Texas Instruments Incorporated Integrated circuit planarization by mechanical polishing
EP0684638A2 (en) * 1994-05-24 1995-11-29 Shin-Estu Handotai Company Limited Method for inducing damage to wafers
US6022807A (en) * 1996-04-24 2000-02-08 Micro Processing Technology, Inc. Method for fabricating an integrated circuit
US6443815B1 (en) 2000-09-22 2002-09-03 Lam Research Corporation Apparatus and methods for controlling pad conditioning head tilt for chemical mechanical polishing
US6471566B1 (en) 2000-09-18 2002-10-29 Lam Research Corporation Sacrificial retaining ring CMP system and methods for implementing the same
US6640155B2 (en) 2000-08-22 2003-10-28 Lam Research Corporation Chemical mechanical polishing apparatus and methods with central control of polishing pressure applied by polishing head
US6652357B1 (en) 2000-09-22 2003-11-25 Lam Research Corporation Methods for controlling retaining ring and wafer head tilt for chemical mechanical polishing
US7481695B2 (en) 2000-08-22 2009-01-27 Lam Research Corporation Polishing apparatus and methods having high processing workload for controlling polishing pressure applied by polishing head
EP2096667A3 (en) * 2008-02-29 2011-06-15 Sumco Corporation Silicon substrate and manufacturing method thereof

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62255058A (en) * 1986-04-30 1987-11-06 Speedfam Co Ltd Back damage device
JPS62255059A (en) * 1986-04-30 1987-11-06 Speedfam Co Ltd Back damage device
US4879258A (en) * 1988-08-31 1989-11-07 Texas Instruments Incorporated Integrated circuit planarization by mechanical polishing
EP0684638A2 (en) * 1994-05-24 1995-11-29 Shin-Estu Handotai Company Limited Method for inducing damage to wafers
EP0684638A3 (en) * 1994-05-24 1996-10-16 Shin Estu Handotai Company Lim Method for inducing damage to wafers.
US6022807A (en) * 1996-04-24 2000-02-08 Micro Processing Technology, Inc. Method for fabricating an integrated circuit
US7481695B2 (en) 2000-08-22 2009-01-27 Lam Research Corporation Polishing apparatus and methods having high processing workload for controlling polishing pressure applied by polishing head
US6640155B2 (en) 2000-08-22 2003-10-28 Lam Research Corporation Chemical mechanical polishing apparatus and methods with central control of polishing pressure applied by polishing head
US6471566B1 (en) 2000-09-18 2002-10-29 Lam Research Corporation Sacrificial retaining ring CMP system and methods for implementing the same
US6443815B1 (en) 2000-09-22 2002-09-03 Lam Research Corporation Apparatus and methods for controlling pad conditioning head tilt for chemical mechanical polishing
US6976903B1 (en) 2000-09-22 2005-12-20 Lam Research Corporation Apparatus for controlling retaining ring and wafer head tilt for chemical mechanical polishing
US6652357B1 (en) 2000-09-22 2003-11-25 Lam Research Corporation Methods for controlling retaining ring and wafer head tilt for chemical mechanical polishing
EP2096667A3 (en) * 2008-02-29 2011-06-15 Sumco Corporation Silicon substrate and manufacturing method thereof

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