JPS6476728A - Method of securing semiconductor element - Google Patents

Method of securing semiconductor element

Info

Publication number
JPS6476728A
JPS6476728A JP62234343A JP23434387A JPS6476728A JP S6476728 A JPS6476728 A JP S6476728A JP 62234343 A JP62234343 A JP 62234343A JP 23434387 A JP23434387 A JP 23434387A JP S6476728 A JPS6476728 A JP S6476728A
Authority
JP
Japan
Prior art keywords
securing
substrate
semiconductor element
gold
silicon eutectic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62234343A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Akimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamaguchi Ltd
Original Assignee
NEC Yamaguchi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamaguchi Ltd filed Critical NEC Yamaguchi Ltd
Priority to JP62234343A priority Critical patent/JPS6476728A/en
Publication of JPS6476728A publication Critical patent/JPS6476728A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75302Shape
    • H01L2224/75303Shape of the pressing surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE:To alloy gold-silicon eutectic crystal while holding a semiconductor element and the securing section of a substrate in parallel and to homogeneously adhere the element to the securing section of the substrate by forming the element attracting face of a conveying and securing jig for conveying and securing the element to the substrate of a soft member. CONSTITUTION:A conveying and securing jig 6 machined in a predetermined size is held by a holder 5 at the top of the element securing section of a semiconductor element securing substrate disposed on a substrate heater 1, and has a necessary load regulating function. The jig 6 is so formed on the side of the element attracting face for attracting a semiconductor element 4 of a soft member 7 as to be elastically deformed to hold the element 4 and the securing section of a semiconductor element securing substrate 2 in parallel upon reception of a load necessary to form gold-silicon eutectic alloy from the holder 5. Thus, the element 4 and the securing section of the substrate 2 can be always maintained in parallel at the time of bonding gold-silicon eutectic crystal, thereby aiding the gold-silicon eutectic crystal bond.
JP62234343A 1987-09-17 1987-09-17 Method of securing semiconductor element Pending JPS6476728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234343A JPS6476728A (en) 1987-09-17 1987-09-17 Method of securing semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234343A JPS6476728A (en) 1987-09-17 1987-09-17 Method of securing semiconductor element

Publications (1)

Publication Number Publication Date
JPS6476728A true JPS6476728A (en) 1989-03-22

Family

ID=16969504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234343A Pending JPS6476728A (en) 1987-09-17 1987-09-17 Method of securing semiconductor element

Country Status (1)

Country Link
JP (1) JPS6476728A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006339437A (en) * 2005-06-02 2006-12-14 Shibaura Mechatronics Corp Device and method for mounting electronic component
JP2010114244A (en) * 2008-11-06 2010-05-20 Lintec Corp Sheet peeling device and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006339437A (en) * 2005-06-02 2006-12-14 Shibaura Mechatronics Corp Device and method for mounting electronic component
JP2010114244A (en) * 2008-11-06 2010-05-20 Lintec Corp Sheet peeling device and method

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