JPS57120352A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57120352A JPS57120352A JP56006598A JP659881A JPS57120352A JP S57120352 A JPS57120352 A JP S57120352A JP 56006598 A JP56006598 A JP 56006598A JP 659881 A JP659881 A JP 659881A JP S57120352 A JPS57120352 A JP S57120352A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- metal
- bump
- bonding
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To effectively and rigidly bond the lead of an external circuit to a bump at the bonding time by flattening the top recess of the bump with the same metal as bonding metal plated on the lead. CONSTITUTION:A metal 7 plated on the lead 6 of an external circuit is adhered to the recess at the center of a bump 1 so that the recess becomes flat. In this manner, the contact with the lead 8 becomes large at the time of bonding with the lead 8, and the lead 8 is contacted widely with the same metal 7 adhered to the bump 1 as the metal placed on the lead. Accordingly, the diffusion of the pressure applied at the bonding time is accelerated to prevent the mechanical damage due to the load pressure applied to the semiconductor device. Further, the lead 8 can be effectively and rigidly bonded by the ready solid diffusion of the plating metal to the adhering metal to the bump 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56006598A JPS57120352A (en) | 1981-01-19 | 1981-01-19 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56006598A JPS57120352A (en) | 1981-01-19 | 1981-01-19 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57120352A true JPS57120352A (en) | 1982-07-27 |
Family
ID=11642763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56006598A Pending JPS57120352A (en) | 1981-01-19 | 1981-01-19 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57120352A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5575449A (en) * | 1993-10-13 | 1996-11-19 | Tachi-S Co., Ltd. | Slide rail device for seat |
US6879027B2 (en) * | 2000-11-30 | 2005-04-12 | Kabushiki Kaisha Shinkawa | Semiconductor device having bumps |
-
1981
- 1981-01-19 JP JP56006598A patent/JPS57120352A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5575449A (en) * | 1993-10-13 | 1996-11-19 | Tachi-S Co., Ltd. | Slide rail device for seat |
US6879027B2 (en) * | 2000-11-30 | 2005-04-12 | Kabushiki Kaisha Shinkawa | Semiconductor device having bumps |
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