TWI392056B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TWI392056B
TWI392056B TW098106059A TW98106059A TWI392056B TW I392056 B TWI392056 B TW I392056B TW 098106059 A TW098106059 A TW 098106059A TW 98106059 A TW98106059 A TW 98106059A TW I392056 B TWI392056 B TW I392056B
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TW
Taiwan
Prior art keywords
semiconductor device
conductive member
manufacturing
gas
film
Prior art date
Application number
TW098106059A
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English (en)
Chinese (zh)
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TW200952119A (en
Inventor
Takaaki Matsuoka
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Tokyo Electron Ltd
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Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200952119A publication Critical patent/TW200952119A/zh
Application granted granted Critical
Publication of TWI392056B publication Critical patent/TWI392056B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW098106059A 2008-03-12 2009-02-25 半導體裝置及其製造方法 TWI392056B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6924408P 2008-03-12 2008-03-12

Publications (2)

Publication Number Publication Date
TW200952119A TW200952119A (en) 2009-12-16
TWI392056B true TWI392056B (zh) 2013-04-01

Family

ID=41062143

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098106059A TWI392056B (zh) 2008-03-12 2009-02-25 半導體裝置及其製造方法

Country Status (5)

Country Link
US (1) US8278205B2 (enExample)
JP (1) JP5143769B2 (enExample)
KR (1) KR20090097827A (enExample)
CN (1) CN101533799B (enExample)
TW (1) TWI392056B (enExample)

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US8778810B2 (en) * 2009-06-26 2014-07-15 Tokyo Electron Limited Plasma treatment method
US9340880B2 (en) 2009-10-27 2016-05-17 Silcotek Corp. Semiconductor fabrication process
KR101512579B1 (ko) * 2010-10-05 2015-04-15 실코텍 코포레이션 내마모성 코팅, 물건 및 방법
US20120273948A1 (en) * 2011-04-27 2012-11-01 Nanya Technology Corporation Integrated circuit structure including a copper-aluminum interconnect and method for fabricating the same
US11292924B2 (en) 2014-04-08 2022-04-05 Silcotek Corp. Thermal chemical vapor deposition coated article and process
WO2017040623A1 (en) 2015-09-01 2017-03-09 Silcotek Corp. Thermal chemical vapor deposition coating
CN107887323B (zh) 2016-09-30 2020-06-05 中芯国际集成电路制造(北京)有限公司 互连结构及其制造方法
KR102616489B1 (ko) 2016-10-11 2023-12-20 삼성전자주식회사 반도체 장치 제조 방법
CN108231659B (zh) 2016-12-15 2020-07-07 中芯国际集成电路制造(北京)有限公司 互连结构及其制造方法
CN106783730B (zh) * 2016-12-28 2020-09-04 上海集成电路研发中心有限公司 一种形成空气隙/铜互连的方法
JP6441989B2 (ja) * 2017-04-27 2018-12-19 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、基板処理装置、プログラムおよび記録媒体
US11161324B2 (en) 2017-09-13 2021-11-02 Silcotek Corp. Corrosion-resistant coated article and thermal chemical vapor deposition coating process
CN113924636A (zh) * 2019-05-20 2022-01-11 朗姆研究公司 作为SiCxOy的成核层的SixNy
WO2020252306A1 (en) 2019-06-14 2020-12-17 Silcotek Corp. Nano-wire growth
US12473635B2 (en) 2020-06-03 2025-11-18 Silcotek Corp. Dielectric article
US11978668B2 (en) 2021-09-09 2024-05-07 Samsung Electronics Co., Ltd. Integrated circuit devices including a via and methods of forming the same
US20250273454A1 (en) * 2024-02-28 2025-08-28 Applied Materials, Inc. Microwave assisted passivation layer removal

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TW200536051A (en) * 2004-04-30 2005-11-01 Taiwan Semiconductor Mfg Reliability improvement of sioc etch stop with trimethylsilane gas passivation in cu damascene interconnects
US20060046479A1 (en) * 2004-04-19 2006-03-02 Applied Materials, Inc. Adhesion improvement for low k dielectrics to conductive materials

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JPH08213343A (ja) * 1995-01-31 1996-08-20 Sony Corp 半導体装置およびその製造方法
EP1077479A1 (en) * 1999-08-17 2001-02-21 Applied Materials, Inc. Post-deposition treatment to enchance properties of Si-O-C low K film
JP2001185549A (ja) * 1999-12-24 2001-07-06 Toshiba Corp 半導体装置の製造方法
KR100762863B1 (ko) * 2000-06-30 2007-10-08 주식회사 하이닉스반도체 확산방지 티타늄-실리콘-질소 막을 이용한 구리금속배선방법
JP2002319618A (ja) * 2001-04-20 2002-10-31 Anelva Corp 配線用Ｃｕ膜の形成方法及び形成装置
JP2003045960A (ja) * 2001-08-01 2003-02-14 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4293752B2 (ja) * 2002-02-28 2009-07-08 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP2003347299A (ja) * 2002-05-24 2003-12-05 Renesas Technology Corp 半導体集積回路装置の製造方法
JP2004071956A (ja) 2002-08-08 2004-03-04 Toshiba Corp 半導体装置の製造方法
JP4454242B2 (ja) * 2003-03-25 2010-04-21 株式会社ルネサステクノロジ 半導体装置およびその製造方法
CN100499030C (zh) * 2003-12-04 2009-06-10 东京毅力科创株式会社 半导体基板导电层表面的净化方法
JP4473824B2 (ja) * 2005-01-21 2010-06-02 株式会社東芝 半導体装置の製造方法
US8211794B2 (en) * 2007-05-25 2012-07-03 Texas Instruments Incorporated Properties of metallic copper diffusion barriers through silicon surface treatments

Patent Citations (2)

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US20060046479A1 (en) * 2004-04-19 2006-03-02 Applied Materials, Inc. Adhesion improvement for low k dielectrics to conductive materials
TW200536051A (en) * 2004-04-30 2005-11-01 Taiwan Semiconductor Mfg Reliability improvement of sioc etch stop with trimethylsilane gas passivation in cu damascene interconnects

Also Published As

Publication number Publication date
CN101533799B (zh) 2011-10-05
KR20090097827A (ko) 2009-09-16
TW200952119A (en) 2009-12-16
US8278205B2 (en) 2012-10-02
JP5143769B2 (ja) 2013-02-13
JP2009218585A (ja) 2009-09-24
US20090230558A1 (en) 2009-09-17
CN101533799A (zh) 2009-09-16

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