JP5143769B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP5143769B2
JP5143769B2 JP2009041598A JP2009041598A JP5143769B2 JP 5143769 B2 JP5143769 B2 JP 5143769B2 JP 2009041598 A JP2009041598 A JP 2009041598A JP 2009041598 A JP2009041598 A JP 2009041598A JP 5143769 B2 JP5143769 B2 JP 5143769B2
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Japan
Prior art keywords
manufacturing
conductive member
semiconductor device
gas
insulating film
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Expired - Fee Related
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JP2009041598A
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English (en)
Japanese (ja)
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JP2009218585A5 (enExample
JP2009218585A (ja
Inventor
孝明 松岡
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009041598A 2008-03-12 2009-02-25 半導体装置およびその製造方法 Expired - Fee Related JP5143769B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6924408P 2008-03-12 2008-03-12
US61/069,244 2008-03-12

Publications (3)

Publication Number Publication Date
JP2009218585A JP2009218585A (ja) 2009-09-24
JP2009218585A5 JP2009218585A5 (enExample) 2012-09-20
JP5143769B2 true JP5143769B2 (ja) 2013-02-13

Family

ID=41062143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009041598A Expired - Fee Related JP5143769B2 (ja) 2008-03-12 2009-02-25 半導体装置およびその製造方法

Country Status (5)

Country Link
US (1) US8278205B2 (enExample)
JP (1) JP5143769B2 (enExample)
KR (1) KR20090097827A (enExample)
CN (1) CN101533799B (enExample)
TW (1) TWI392056B (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8778810B2 (en) * 2009-06-26 2014-07-15 Tokyo Electron Limited Plasma treatment method
US9340880B2 (en) 2009-10-27 2016-05-17 Silcotek Corp. Semiconductor fabrication process
KR101512579B1 (ko) * 2010-10-05 2015-04-15 실코텍 코포레이션 내마모성 코팅, 물건 및 방법
US20120273948A1 (en) * 2011-04-27 2012-11-01 Nanya Technology Corporation Integrated circuit structure including a copper-aluminum interconnect and method for fabricating the same
US11292924B2 (en) 2014-04-08 2022-04-05 Silcotek Corp. Thermal chemical vapor deposition coated article and process
WO2017040623A1 (en) 2015-09-01 2017-03-09 Silcotek Corp. Thermal chemical vapor deposition coating
CN107887323B (zh) 2016-09-30 2020-06-05 中芯国际集成电路制造(北京)有限公司 互连结构及其制造方法
KR102616489B1 (ko) 2016-10-11 2023-12-20 삼성전자주식회사 반도체 장치 제조 방법
CN108231659B (zh) 2016-12-15 2020-07-07 中芯国际集成电路制造(北京)有限公司 互连结构及其制造方法
CN106783730B (zh) * 2016-12-28 2020-09-04 上海集成电路研发中心有限公司 一种形成空气隙/铜互连的方法
JP6441989B2 (ja) * 2017-04-27 2018-12-19 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置、プログラムおよび記録媒体
US11161324B2 (en) 2017-09-13 2021-11-02 Silcotek Corp. Corrosion-resistant coated article and thermal chemical vapor deposition coating process
CN113924636A (zh) * 2019-05-20 2022-01-11 朗姆研究公司 作为SiCxOy的成核层的SixNy
WO2020252306A1 (en) 2019-06-14 2020-12-17 Silcotek Corp. Nano-wire growth
US12473635B2 (en) 2020-06-03 2025-11-18 Silcotek Corp. Dielectric article
US11978668B2 (en) 2021-09-09 2024-05-07 Samsung Electronics Co., Ltd. Integrated circuit devices including a via and methods of forming the same
US20250273454A1 (en) * 2024-02-28 2025-08-28 Applied Materials, Inc. Microwave assisted passivation layer removal

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
JPH08213343A (ja) * 1995-01-31 1996-08-20 Sony Corp 半導体装置およびその製造方法
EP1077479A1 (en) * 1999-08-17 2001-02-21 Applied Materials, Inc. Post-deposition treatment to enchance properties of Si-O-C low K film
JP2001185549A (ja) * 1999-12-24 2001-07-06 Toshiba Corp 半導体装置の製造方法
KR100762863B1 (ko) * 2000-06-30 2007-10-08 주식회사 하이닉스반도체 확산방지 티타늄-실리콘-질소 막을 이용한 구리금속배선방법
JP2002319618A (ja) * 2001-04-20 2002-10-31 Anelva Corp 配線用Cu膜の形成方法及び形成装置
JP2003045960A (ja) * 2001-08-01 2003-02-14 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4293752B2 (ja) * 2002-02-28 2009-07-08 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP2003347299A (ja) * 2002-05-24 2003-12-05 Renesas Technology Corp 半導体集積回路装置の製造方法
JP2004071956A (ja) 2002-08-08 2004-03-04 Toshiba Corp 半導体装置の製造方法
JP4454242B2 (ja) * 2003-03-25 2010-04-21 株式会社ルネサステクノロジ 半導体装置およびその製造方法
CN100499030C (zh) * 2003-12-04 2009-06-10 东京毅力科创株式会社 半导体基板导电层表面的净化方法
US7229911B2 (en) * 2004-04-19 2007-06-12 Applied Materials, Inc. Adhesion improvement for low k dielectrics to conductive materials
US7193325B2 (en) * 2004-04-30 2007-03-20 Taiwan Semiconductor Manufacturing Company, Ltd. Reliability improvement of SiOC etch with trimethylsilane gas passivation in Cu damascene interconnects
JP4473824B2 (ja) * 2005-01-21 2010-06-02 株式会社東芝 半導体装置の製造方法
US8211794B2 (en) * 2007-05-25 2012-07-03 Texas Instruments Incorporated Properties of metallic copper diffusion barriers through silicon surface treatments

Also Published As

Publication number Publication date
CN101533799B (zh) 2011-10-05
KR20090097827A (ko) 2009-09-16
TW200952119A (en) 2009-12-16
US8278205B2 (en) 2012-10-02
TWI392056B (zh) 2013-04-01
JP2009218585A (ja) 2009-09-24
US20090230558A1 (en) 2009-09-17
CN101533799A (zh) 2009-09-16

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