TWI378505B - A new material for contact etch layer to enhance device performance - Google Patents
A new material for contact etch layer to enhance device performance Download PDFInfo
- Publication number
- TWI378505B TWI378505B TW094111139A TW94111139A TWI378505B TW I378505 B TWI378505 B TW I378505B TW 094111139 A TW094111139 A TW 094111139A TW 94111139 A TW94111139 A TW 94111139A TW I378505 B TWI378505 B TW I378505B
- Authority
- TW
- Taiwan
- Prior art keywords
- film
- stress
- nitride
- btbas
- vapor deposition
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/835,949 US7001844B2 (en) | 2004-04-30 | 2004-04-30 | Material for contact etch layer to enhance device performance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200536019A TW200536019A (en) | 2005-11-01 |
| TWI378505B true TWI378505B (en) | 2012-12-01 |
Family
ID=35187673
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094111139A TWI378505B (en) | 2004-04-30 | 2005-04-08 | A new material for contact etch layer to enhance device performance |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7001844B2 (enExample) |
| JP (1) | JP4906270B2 (enExample) |
| CN (1) | CN100459065C (enExample) |
| TW (1) | TWI378505B (enExample) |
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| US7119016B2 (en) * | 2003-10-15 | 2006-10-10 | International Business Machines Corporation | Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion |
| US20050287747A1 (en) * | 2004-06-29 | 2005-12-29 | International Business Machines Corporation | Doped nitride film, doped oxide film and other doped films |
| US20060045986A1 (en) * | 2004-08-30 | 2006-03-02 | Hochberg Arthur K | Silicon nitride from aminosilane using PECVD |
| US7268399B2 (en) * | 2004-08-31 | 2007-09-11 | Texas Instruments Incorporated | Enhanced PMOS via transverse stress |
| US20060099763A1 (en) * | 2004-10-28 | 2006-05-11 | Yi-Cheng Liu | Method of manufacturing semiconductor mos transistor device |
| JP2006165335A (ja) * | 2004-12-08 | 2006-06-22 | Toshiba Corp | 半導体装置 |
| US20060172556A1 (en) * | 2005-02-01 | 2006-08-03 | Texas Instruments Incorporated | Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor |
| US7265015B2 (en) * | 2005-06-30 | 2007-09-04 | Promos Technologies Inc. | Use of chlorine to fabricate trench dielectric in integrated circuits |
| WO2007072537A1 (ja) * | 2005-12-19 | 2007-06-28 | Fujitsu Limited | 半導体装置及びその半導体装置の製造方法 |
| US20070196991A1 (en) * | 2006-02-01 | 2007-08-23 | Texas Instruments Incorporated | Semiconductor device having a strain inducing sidewall spacer and a method of manufacture therefor |
| US8017472B2 (en) * | 2006-02-17 | 2011-09-13 | Infineon Technologies Ag | CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof |
| US7790540B2 (en) * | 2006-08-25 | 2010-09-07 | International Business Machines Corporation | Structure and method to use low k stress liner to reduce parasitic capacitance |
| JP2008053553A (ja) * | 2006-08-25 | 2008-03-06 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US20080096331A1 (en) * | 2006-10-04 | 2008-04-24 | Neng-Kuo Chen | Method for fabricating high compressive stress film and strained-silicon transistors |
| CN101192533B (zh) * | 2006-11-28 | 2010-06-16 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法、蚀刻阻挡层的形成方法 |
| US20080293194A1 (en) * | 2007-05-24 | 2008-11-27 | Neng-Kuo Chen | Method of making a P-type metal-oxide semiconductor transistor and method of making a complementary metal-oxide semiconductor transistor |
| JP5309619B2 (ja) * | 2008-03-07 | 2013-10-09 | ソニー株式会社 | 半導体装置およびその製造方法 |
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| US8637411B2 (en) | 2010-04-15 | 2014-01-28 | Novellus Systems, Inc. | Plasma activated conformal dielectric film deposition |
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| US9892917B2 (en) | 2010-04-15 | 2018-02-13 | Lam Research Corporation | Plasma assisted atomic layer deposition of multi-layer films for patterning applications |
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| US9611544B2 (en) | 2010-04-15 | 2017-04-04 | Novellus Systems, Inc. | Plasma activated conformal dielectric film deposition |
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| US8524612B2 (en) | 2010-09-23 | 2013-09-03 | Novellus Systems, Inc. | Plasma-activated deposition of conformal films |
| US9685320B2 (en) | 2010-09-23 | 2017-06-20 | Lam Research Corporation | Methods for depositing silicon oxide |
| KR101789592B1 (ko) | 2010-11-08 | 2017-10-25 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
| US8647993B2 (en) | 2011-04-11 | 2014-02-11 | Novellus Systems, Inc. | Methods for UV-assisted conformal film deposition |
| JP5975617B2 (ja) | 2011-10-06 | 2016-08-23 | キヤノン株式会社 | 固体撮像装置およびその製造方法ならびにカメラ |
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| KR102207992B1 (ko) | 2012-10-23 | 2021-01-26 | 램 리써치 코포레이션 | 서브-포화된 원자층 증착 및 등각막 증착 |
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| US10541309B2 (en) | 2017-12-25 | 2020-01-21 | United Microelectronics Corp | Semiconductor structure and method for fabricating the same |
| US12040181B2 (en) | 2019-05-01 | 2024-07-16 | Lam Research Corporation | Modulated atomic layer deposition |
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| JP3997089B2 (ja) * | 2002-01-10 | 2007-10-24 | 株式会社ルネサステクノロジ | 半導体装置 |
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-
2004
- 2004-04-30 US US10/835,949 patent/US7001844B2/en not_active Expired - Fee Related
-
2005
- 2005-03-17 CN CNB2005100554573A patent/CN100459065C/zh not_active Expired - Fee Related
- 2005-04-08 TW TW094111139A patent/TWI378505B/zh not_active IP Right Cessation
- 2005-04-28 JP JP2005131468A patent/JP4906270B2/ja not_active Expired - Fee Related
- 2005-10-20 US US11/253,622 patent/US20060040497A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US7001844B2 (en) | 2006-02-21 |
| US20060040497A1 (en) | 2006-02-23 |
| TW200536019A (en) | 2005-11-01 |
| JP2005317980A (ja) | 2005-11-10 |
| JP4906270B2 (ja) | 2012-03-28 |
| CN1694230A (zh) | 2005-11-09 |
| US20050245081A1 (en) | 2005-11-03 |
| CN100459065C (zh) | 2009-02-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |