CN100459065C - 氮化硅薄膜及其制造方法 - Google Patents

氮化硅薄膜及其制造方法 Download PDF

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Publication number
CN100459065C
CN100459065C CNB2005100554573A CN200510055457A CN100459065C CN 100459065 C CN100459065 C CN 100459065C CN B2005100554573 A CNB2005100554573 A CN B2005100554573A CN 200510055457 A CN200510055457 A CN 200510055457A CN 100459065 C CN100459065 C CN 100459065C
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nitride
film
stress
btbas
tert
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Expired - Fee Related
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Chinese (zh)
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CN1694230A (zh
Inventor
A·B·查克拉瓦蒂
S·纳拉辛哈
V·陈
J·霍尔特
S·N·查克拉瓦蒂
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CNB2005100554573A 2004-04-30 2005-03-17 氮化硅薄膜及其制造方法 Expired - Fee Related CN100459065C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/835,949 US7001844B2 (en) 2004-04-30 2004-04-30 Material for contact etch layer to enhance device performance
US10/835,949 2004-04-30

Publications (2)

Publication Number Publication Date
CN1694230A CN1694230A (zh) 2005-11-09
CN100459065C true CN100459065C (zh) 2009-02-04

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US (2) US7001844B2 (enExample)
JP (1) JP4906270B2 (enExample)
CN (1) CN100459065C (enExample)
TW (1) TWI378505B (enExample)

Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7119016B2 (en) * 2003-10-15 2006-10-10 International Business Machines Corporation Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion
US20050287747A1 (en) * 2004-06-29 2005-12-29 International Business Machines Corporation Doped nitride film, doped oxide film and other doped films
US20060045986A1 (en) * 2004-08-30 2006-03-02 Hochberg Arthur K Silicon nitride from aminosilane using PECVD
US7268399B2 (en) * 2004-08-31 2007-09-11 Texas Instruments Incorporated Enhanced PMOS via transverse stress
US20060099763A1 (en) * 2004-10-28 2006-05-11 Yi-Cheng Liu Method of manufacturing semiconductor mos transistor device
JP2006165335A (ja) * 2004-12-08 2006-06-22 Toshiba Corp 半導体装置
US20060172556A1 (en) * 2005-02-01 2006-08-03 Texas Instruments Incorporated Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor
US7265015B2 (en) * 2005-06-30 2007-09-04 Promos Technologies Inc. Use of chlorine to fabricate trench dielectric in integrated circuits
KR100977487B1 (ko) * 2005-12-19 2010-08-23 후지쯔 가부시끼가이샤 반도체 장치 및 그 반도체 장치의 제조 방법
US20070196991A1 (en) * 2006-02-01 2007-08-23 Texas Instruments Incorporated Semiconductor device having a strain inducing sidewall spacer and a method of manufacture therefor
US8017472B2 (en) * 2006-02-17 2011-09-13 Infineon Technologies Ag CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof
JP2008053553A (ja) * 2006-08-25 2008-03-06 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7790540B2 (en) * 2006-08-25 2010-09-07 International Business Machines Corporation Structure and method to use low k stress liner to reduce parasitic capacitance
US20080096331A1 (en) * 2006-10-04 2008-04-24 Neng-Kuo Chen Method for fabricating high compressive stress film and strained-silicon transistors
CN101192533B (zh) * 2006-11-28 2010-06-16 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法、蚀刻阻挡层的形成方法
US20080293194A1 (en) * 2007-05-24 2008-11-27 Neng-Kuo Chen Method of making a P-type metal-oxide semiconductor transistor and method of making a complementary metal-oxide semiconductor transistor
JP5309619B2 (ja) * 2008-03-07 2013-10-09 ソニー株式会社 半導体装置およびその製造方法
US8956983B2 (en) 2010-04-15 2015-02-17 Novellus Systems, Inc. Conformal doping via plasma activated atomic layer deposition and conformal film deposition
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US8637411B2 (en) 2010-04-15 2014-01-28 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US9390909B2 (en) 2013-11-07 2016-07-12 Novellus Systems, Inc. Soft landing nanolaminates for advanced patterning
US9997357B2 (en) 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US8728956B2 (en) 2010-04-15 2014-05-20 Novellus Systems, Inc. Plasma activated conformal film deposition
US9892917B2 (en) 2010-04-15 2018-02-13 Lam Research Corporation Plasma assisted atomic layer deposition of multi-layer films for patterning applications
US9373500B2 (en) 2014-02-21 2016-06-21 Lam Research Corporation Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
US9076646B2 (en) 2010-04-15 2015-07-07 Lam Research Corporation Plasma enhanced atomic layer deposition with pulsed plasma exposure
US9611544B2 (en) 2010-04-15 2017-04-04 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US9685320B2 (en) 2010-09-23 2017-06-20 Lam Research Corporation Methods for depositing silicon oxide
US8524612B2 (en) 2010-09-23 2013-09-03 Novellus Systems, Inc. Plasma-activated deposition of conformal films
KR101789592B1 (ko) 2010-11-08 2017-10-25 삼성전자주식회사 반도체 소자의 제조 방법
US8647993B2 (en) 2011-04-11 2014-02-11 Novellus Systems, Inc. Methods for UV-assisted conformal film deposition
JP5975617B2 (ja) 2011-10-06 2016-08-23 キヤノン株式会社 固体撮像装置およびその製造方法ならびにカメラ
US8592328B2 (en) 2012-01-20 2013-11-26 Novellus Systems, Inc. Method for depositing a chlorine-free conformal sin film
US8728955B2 (en) 2012-02-14 2014-05-20 Novellus Systems, Inc. Method of plasma activated deposition of a conformal film on a substrate surface
US9355839B2 (en) 2012-10-23 2016-05-31 Lam Research Corporation Sub-saturated atomic layer deposition and conformal film deposition
SG2013083654A (en) 2012-11-08 2014-06-27 Novellus Systems Inc Methods for depositing films on sensitive substrates
SG2013083241A (en) 2012-11-08 2014-06-27 Novellus Systems Inc Conformal film deposition for gapfill
US8796098B1 (en) * 2013-02-26 2014-08-05 Cypress Semiconductor Corporation Embedded SONOS based memory cells
CN103247649A (zh) * 2013-05-07 2013-08-14 上海华力微电子有限公司 减小图像传感器电学互扰的方法
US9214334B2 (en) 2014-02-18 2015-12-15 Lam Research Corporation High growth rate process for conformal aluminum nitride
US9478438B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor
US9478411B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS
US9564312B2 (en) 2014-11-24 2017-02-07 Lam Research Corporation Selective inhibition in atomic layer deposition of silicon-containing films
US10566187B2 (en) 2015-03-20 2020-02-18 Lam Research Corporation Ultrathin atomic layer deposition film accuracy thickness control
US9502238B2 (en) 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch
US10526701B2 (en) 2015-07-09 2020-01-07 Lam Research Corporation Multi-cycle ALD process for film uniformity and thickness profile modulation
US9773643B1 (en) 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10062563B2 (en) 2016-07-01 2018-08-28 Lam Research Corporation Selective atomic layer deposition with post-dose treatment
US10037884B2 (en) 2016-08-31 2018-07-31 Lam Research Corporation Selective atomic layer deposition for gapfill using sacrificial underlayer
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
US10541309B2 (en) * 2017-12-25 2020-01-21 United Microelectronics Corp Semiconductor structure and method for fabricating the same
JP7494209B2 (ja) 2019-05-01 2024-06-03 ラム リサーチ コーポレーション 調整された原子層堆積
KR20220006663A (ko) 2019-06-07 2022-01-17 램 리써치 코포레이션 원자 층 증착 동안 막 특성들의 인-시츄 (in-situ) 제어

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05129286A (ja) * 1991-11-07 1993-05-25 Casio Comput Co Ltd 窒化シリコン膜
US5874368A (en) * 1997-10-02 1999-02-23 Air Products And Chemicals, Inc. Silicon nitride from bis(tertiarybutylamino)silane
US6268299B1 (en) * 2000-09-25 2001-07-31 International Business Machines Corporation Variable stoichiometry silicon nitride barrier films for tunable etch selectivity and enhanced hyrogen permeability
US6656853B2 (en) * 2000-12-26 2003-12-02 Nec Electronics Corporation Enhanced deposition control in fabricating devices in a semiconductor wafer

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519850A (en) * 1978-07-31 1980-02-12 Hitachi Ltd Semiconductor
US20020068855A1 (en) * 1993-02-22 2002-06-06 Daniel S. Christopher Endoscopic retraction system and method
US5633202A (en) 1994-09-30 1997-05-27 Intel Corporation High tensile nitride layer
US6251802B1 (en) 1998-10-19 2001-06-26 Micron Technology, Inc. Methods of forming carbon-containing layers
US6153261A (en) 1999-05-28 2000-11-28 Applied Materials, Inc. Dielectric film deposition employing a bistertiarybutylaminesilane precursor
JP2002083812A (ja) * 1999-06-29 2002-03-22 Semiconductor Energy Lab Co Ltd 配線材料およびこれを用いた配線を備えた半導体装置およびその作製方法
JP2001156065A (ja) * 1999-11-24 2001-06-08 Hitachi Kokusai Electric Inc 半導体装置の製造方法および半導体製造装置
JP3819660B2 (ja) * 2000-02-15 2006-09-13 株式会社日立国際電気 半導体装置の製造方法および半導体製造装置
US6515350B1 (en) 2000-02-22 2003-02-04 Micron Technology, Inc. Protective conformal silicon nitride films and spacers
US6518626B1 (en) 2000-02-22 2003-02-11 Micron Technology, Inc. Method of forming low dielectric silicon oxynitride spacer films highly selective of etchants
US6660664B1 (en) * 2000-03-31 2003-12-09 International Business Machines Corp. Structure and method for formation of a blocked silicide resistor
DE60127973T2 (de) * 2000-08-18 2008-01-17 Tokyo Electron Ltd. Herstellungsprozess eines halbleiterbauelements mit einem zwischenfilm aus siliziumnitrid mit niedriger dielektrizitätskonstante
US7312485B2 (en) 2000-11-29 2007-12-25 Intel Corporation CMOS fabrication process utilizing special transistor orientation
US6586814B1 (en) 2000-12-11 2003-07-01 Lsi Logic Corporation Etch resistant shallow trench isolation in a semiconductor wafer
US20020127763A1 (en) 2000-12-28 2002-09-12 Mohamed Arafa Sidewall spacers and methods of making same
US6500772B2 (en) 2001-01-08 2002-12-31 International Business Machines Corporation Methods and materials for depositing films on semiconductor substrates
JP4831885B2 (ja) 2001-04-27 2011-12-07 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6391803B1 (en) * 2001-06-20 2002-05-21 Samsung Electronics Co., Ltd. Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane
JP4897159B2 (ja) 2001-08-03 2012-03-14 株式会社日立国際電気 半導体装置の製造方法
JP2003060076A (ja) 2001-08-21 2003-02-28 Nec Corp 半導体装置及びその製造方法
US20030059535A1 (en) 2001-09-25 2003-03-27 Lee Luo Cycling deposition of low temperature films in a cold wall single wafer process chamber
JP3997089B2 (ja) 2002-01-10 2007-10-24 株式会社ルネサステクノロジ 半導体装置
US6573172B1 (en) 2002-09-16 2003-06-03 Advanced Micro Devices, Inc. Methods for improving carrier mobility of PMOS and NMOS devices
US6812073B2 (en) * 2002-12-10 2004-11-02 Texas Instrument Incorporated Source drain and extension dopant concentration
US7601860B2 (en) * 2003-10-10 2009-10-13 Advanced Technology Materials, Inc. Composition and method for low temperature chemical vapor deposition of silicon-containing films including silicon carbonitride and silicon oxycarbonitride films
US20050109276A1 (en) * 2003-11-25 2005-05-26 Applied Materials, Inc. Thermal chemical vapor deposition of silicon nitride using BTBAS bis(tertiary-butylamino silane) in a single wafer chamber

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05129286A (ja) * 1991-11-07 1993-05-25 Casio Comput Co Ltd 窒化シリコン膜
US5874368A (en) * 1997-10-02 1999-02-23 Air Products And Chemicals, Inc. Silicon nitride from bis(tertiarybutylamino)silane
US6268299B1 (en) * 2000-09-25 2001-07-31 International Business Machines Corporation Variable stoichiometry silicon nitride barrier films for tunable etch selectivity and enhanced hyrogen permeability
US6656853B2 (en) * 2000-12-26 2003-12-02 Nec Electronics Corporation Enhanced deposition control in fabricating devices in a semiconductor wafer

Also Published As

Publication number Publication date
TWI378505B (en) 2012-12-01
TW200536019A (en) 2005-11-01
US20060040497A1 (en) 2006-02-23
JP2005317980A (ja) 2005-11-10
US7001844B2 (en) 2006-02-21
US20050245081A1 (en) 2005-11-03
JP4906270B2 (ja) 2012-03-28
CN1694230A (zh) 2005-11-09

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