TWI366912B - - Google Patents

Info

Publication number
TWI366912B
TWI366912B TW097111667A TW97111667A TWI366912B TW I366912 B TWI366912 B TW I366912B TW 097111667 A TW097111667 A TW 097111667A TW 97111667 A TW97111667 A TW 97111667A TW I366912 B TWI366912 B TW I366912B
Authority
TW
Taiwan
Application number
TW097111667A
Other versions
TW200901450A (en
Inventor
Akihiko Endo
Nobuyuki Morimoto
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Publication of TW200901450A publication Critical patent/TW200901450A/zh
Application granted granted Critical
Publication of TWI366912B publication Critical patent/TWI366912B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76243Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
TW097111667A 2007-04-03 2008-03-31 Method for manufacturing semiconductor substrates TW200901450A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007097197A JP5261960B2 (ja) 2007-04-03 2007-04-03 半導体基板の製造方法

Publications (2)

Publication Number Publication Date
TW200901450A TW200901450A (en) 2009-01-01
TWI366912B true TWI366912B (zh) 2012-06-21

Family

ID=39827314

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097111667A TW200901450A (en) 2007-04-03 2008-03-31 Method for manufacturing semiconductor substrates

Country Status (5)

Country Link
US (1) US7855132B2 (zh)
JP (1) JP5261960B2 (zh)
KR (1) KR100982584B1 (zh)
CN (1) CN101320684B (zh)
TW (1) TW200901450A (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009054837A (ja) * 2007-08-28 2009-03-12 Sumco Corp Simoxウェーハ製造方法およびsimoxウェーハ
JP2009272471A (ja) * 2008-05-08 2009-11-19 Sumco Corp 貼り合わせウェーハの製造方法
JP5386856B2 (ja) * 2008-06-03 2014-01-15 株式会社Sumco 貼り合わせウェーハの製造方法
JP2010135538A (ja) * 2008-12-04 2010-06-17 Sumco Corp 貼り合わせウェーハの製造方法
JP5470839B2 (ja) * 2008-12-25 2014-04-16 株式会社Sumco 貼り合わせシリコンウェーハの製造方法
US20160079059A1 (en) * 2014-09-17 2016-03-17 International Business Machines Corporation Elliptical wafer manufacture
CN113889431A (zh) * 2020-07-01 2022-01-04 中芯集成电路(宁波)有限公司上海分公司 绝缘体上半导体结构的制造方法
WO2022241662A1 (zh) * 2021-05-19 2022-11-24 邱志威 半导体超薄堆叠结构的制造方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH021914A (ja) * 1988-06-10 1990-01-08 Sony Corp 半導体基板の製法
JP2930194B2 (ja) * 1995-08-17 1999-08-03 信越半導体株式会社 Soiウェーハ及びその製造方法
EP0759634A1 (en) 1995-08-17 1997-02-26 Shin-Etsu Handotai Company Limited SOI wafer and method for the preparation thereof
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
KR100298203B1 (ko) 1998-10-28 2001-08-07 박종섭 실리콘 온 인슐레이터 기판 제조 방법
JP2000315635A (ja) * 1999-04-30 2000-11-14 Mitsubishi Materials Silicon Corp 張り合わせ用シリコンウェーハおよびこれを用いた張り合わせ基板の製造方法
US6455398B1 (en) * 1999-07-16 2002-09-24 Massachusetts Institute Of Technology Silicon on III-V semiconductor bonding for monolithic optoelectronic integration
JP2003142668A (ja) 2001-11-07 2003-05-16 Sumitomo Mitsubishi Silicon Corp Simox基板の製造方法
US6835633B2 (en) * 2002-07-24 2004-12-28 International Business Machines Corporation SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bonding using 30-100 Å thin oxide as bonding layer
EP1710836A4 (en) 2004-01-30 2010-08-18 Sumco Corp METHOD FOR PRODUCING AN SOI WATER
JP4424039B2 (ja) 2004-04-02 2010-03-03 株式会社Sumco 半導体ウェーハの製造方法
JP2007059704A (ja) * 2005-08-25 2007-03-08 Sumco Corp 貼合せ基板の製造方法及び貼合せ基板
JP2007149723A (ja) 2005-11-24 2007-06-14 Sumco Corp 貼り合わせウェーハの製造方法
EP1840955B1 (en) * 2006-03-31 2008-01-09 S.O.I.TEC. Silicon on Insulator Technologies S.A. Method for fabricating a compound material and method for choosing a wafer
JP5087855B2 (ja) 2006-04-05 2012-12-05 株式会社Sumco 熱処理評価用ウェーハ、熱処理評価方法、および半導体ウェーハの製造方法
JP4940737B2 (ja) 2006-04-11 2012-05-30 株式会社Sumco 少数キャリア拡散長測定方法およびシリコンウェーハの製造方法
JP2008016534A (ja) 2006-07-04 2008-01-24 Sumco Corp 貼り合わせウェーハの製造方法
JP2008066500A (ja) 2006-09-07 2008-03-21 Sumco Corp 貼り合わせウェーハおよびその製造方法

Also Published As

Publication number Publication date
JP5261960B2 (ja) 2013-08-14
CN101320684B (zh) 2010-12-22
KR20080090319A (ko) 2008-10-08
KR100982584B1 (ko) 2010-09-15
US7855132B2 (en) 2010-12-21
TW200901450A (en) 2009-01-01
US20080248630A1 (en) 2008-10-09
CN101320684A (zh) 2008-12-10
JP2008258304A (ja) 2008-10-23

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