TWI339878B - Semiconductor device and fabrication method thereof - Google Patents

Semiconductor device and fabrication method thereof

Info

Publication number
TWI339878B
TWI339878B TW096112049A TW96112049A TWI339878B TW I339878 B TWI339878 B TW I339878B TW 096112049 A TW096112049 A TW 096112049A TW 96112049 A TW96112049 A TW 96112049A TW I339878 B TWI339878 B TW I339878B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
fabrication method
fabrication
semiconductor
Prior art date
Application number
TW096112049A
Other languages
English (en)
Other versions
TW200812007A (en
Inventor
Hiroyoshi Tomita
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Publication of TW200812007A publication Critical patent/TW200812007A/zh
Application granted granted Critical
Publication of TWI339878B publication Critical patent/TWI339878B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0403Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals during or with feedback to manufacture
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2254Calibration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Memories (AREA)
TW096112049A 2006-08-31 2007-04-04 Semiconductor device and fabrication method thereof TWI339878B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006237058A JP5426069B2 (ja) 2006-08-31 2006-08-31 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
TW200812007A TW200812007A (en) 2008-03-01
TWI339878B true TWI339878B (en) 2011-04-01

Family

ID=38779865

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096112049A TWI339878B (en) 2006-08-31 2007-04-04 Semiconductor device and fabrication method thereof

Country Status (7)

Country Link
US (1) US7539042B2 (zh)
EP (1) EP1895539B1 (zh)
JP (1) JP5426069B2 (zh)
KR (1) KR100870891B1 (zh)
CN (1) CN100585733C (zh)
DE (1) DE602007013325D1 (zh)
TW (1) TWI339878B (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5096778B2 (ja) * 2007-04-12 2012-12-12 パナソニック株式会社 半導体集積回路
KR100949271B1 (ko) * 2008-09-05 2010-03-25 주식회사 하이닉스반도체 오토 셀프 리프레시에 적합한 온도 정보 감지 장치, 그를 갖는 집적회로 및 온도 정보 감지 방법
US7558138B1 (en) 2008-09-30 2009-07-07 International Business Machines Corporation Bypass circuit for memory arrays
US8810283B2 (en) 2012-05-22 2014-08-19 Analog Devices, Inc. CMOS transistor linearization method
JP6125769B2 (ja) * 2012-07-06 2017-05-10 ローム株式会社 半導体装置、液晶表示装置、電子機器
CN104956481B (zh) * 2013-02-19 2018-01-09 松下知识产权经营株式会社 非易失性半导体存储装置
US8867297B1 (en) * 2013-07-10 2014-10-21 Transcend Information, Inc. Charge/discharge control circuit and charge/discharge method thereof
CN103824856B (zh) * 2014-03-03 2017-01-11 上海新储集成电路有限公司 一种基于背栅晶体管的抗辐照技术及实现方法
TWI492234B (zh) 2014-04-21 2015-07-11 Silicon Motion Inc 讀取快閃記憶體中所儲存之資料的方法、記憶體控制器與記憶體系統
JP2018005961A (ja) * 2016-07-01 2018-01-11 東芝メモリ株式会社 記憶装置
JP2018049673A (ja) 2016-09-20 2018-03-29 東芝メモリ株式会社 半導体記憶装置
US11797833B2 (en) * 2017-11-14 2023-10-24 International Business Machines Corporation Competitive machine learning accuracy on neuromorphic arrays with non-ideal non-volatile memory devices
US10644004B2 (en) * 2018-02-13 2020-05-05 Advanced Micro Devices, Inc. Utilizing capacitors integrated with memory devices for charge detection to determine DRAM refresh
CN109741777A (zh) * 2018-12-28 2019-05-10 上海新储集成电路有限公司 一种提高速度和保持数据时间的存储器

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60136325A (ja) * 1983-12-26 1985-07-19 Toshiba Corp 半導体装置の特性測定方法
JP2979566B2 (ja) * 1990-02-07 1999-11-15 富士通株式会社 集積回路装置
JP3667787B2 (ja) 1994-05-11 2005-07-06 株式会社ルネサステクノロジ 半導体記憶装置
JP3245037B2 (ja) * 1996-02-05 2002-01-07 株式会社東芝 半導体集積回路装置
JP3376204B2 (ja) 1996-02-15 2003-02-10 株式会社東芝 半導体装置
JP3704188B2 (ja) 1996-02-27 2005-10-05 株式会社ルネサステクノロジ 半導体記憶装置
US5774405A (en) * 1996-03-28 1998-06-30 Mitsubishi Denki Kabushiki Kaisha Dynamic random access memory having an internal circuit using a boosted potential
JPH10308501A (ja) 1997-05-02 1998-11-17 Texas Instr Japan Ltd 半導体装置
KR100271840B1 (ko) * 1997-08-27 2000-11-15 다니구찌 이찌로오 회로 면적의 증대를 억제하면서 복수의 전위를 출력할 수 있는내부 전위 발생 회로
JPH1186536A (ja) 1997-09-12 1999-03-30 Mitsubishi Electric Corp 半導体記憶装置
JPH11339470A (ja) * 1998-05-25 1999-12-10 Hitachi Ltd ダイナミック型ram
JP2001024168A (ja) * 1999-07-08 2001-01-26 Hitachi Ltd 半導体記憶装置
JP4707244B2 (ja) * 2000-03-30 2011-06-22 ルネサスエレクトロニクス株式会社 半導体記憶装置および半導体装置
JP4043703B2 (ja) * 2000-09-04 2008-02-06 株式会社ルネサステクノロジ 半導体装置、マイクロコンピュータ、及びフラッシュメモリ
US6381182B1 (en) 2000-09-13 2002-04-30 Infineon Technologies Ag Combined tracking of WLL and VPP low threshold voltage in DRAM array
JP3730508B2 (ja) * 2000-11-13 2006-01-05 株式会社東芝 半導体記憶装置およびその動作方法
JP2003068086A (ja) * 2001-08-28 2003-03-07 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP2004165649A (ja) * 2002-10-21 2004-06-10 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JP3889699B2 (ja) * 2002-11-29 2007-03-07 株式会社東芝 不揮発性半導体記憶装置及びそのデータ書き込み方法
JP4221274B2 (ja) * 2003-10-31 2009-02-12 株式会社東芝 半導体集積回路および電源電圧・基板バイアス制御回路
US7272065B2 (en) * 2003-12-03 2007-09-18 Simon Lovett Compensated refresh oscillator
US7307907B2 (en) * 2003-12-11 2007-12-11 Texas Instruments Incorporated SRAM device and a method of operating the same to reduce leakage current during a sleep mode
JP4367225B2 (ja) * 2004-05-11 2009-11-18 ソニー株式会社 半導体集積回路

Also Published As

Publication number Publication date
US20080056044A1 (en) 2008-03-06
EP1895539B1 (en) 2011-03-23
KR100870891B1 (ko) 2008-11-28
CN100585733C (zh) 2010-01-27
JP5426069B2 (ja) 2014-02-26
US7539042B2 (en) 2009-05-26
DE602007013325D1 (de) 2011-05-05
EP1895539A2 (en) 2008-03-05
EP1895539A3 (en) 2008-11-12
KR20080021479A (ko) 2008-03-07
TW200812007A (en) 2008-03-01
CN101136243A (zh) 2008-03-05
JP2008059709A (ja) 2008-03-13

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