TWI329360B - Semiconductor device production method and semiconductor device - Google Patents
Semiconductor device production method and semiconductor deviceInfo
- Publication number
- TWI329360B TWI329360B TW092129529A TW92129529A TWI329360B TW I329360 B TWI329360 B TW I329360B TW 092129529 A TW092129529 A TW 092129529A TW 92129529 A TW92129529 A TW 92129529A TW I329360 B TWI329360 B TW I329360B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- metal
- production method
- mask layer
- stopper mask
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000002184 metal Substances 0.000 abstract 5
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2002338480A JP3851607B2 (ja) | 2002-11-21 | 2002-11-21 | 半導体装置の製造方法 |
Publications (2)
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TW200417016A TW200417016A (en) | 2004-09-01 |
TWI329360B true TWI329360B (en) | 2010-08-21 |
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TW092129529A TWI329360B (en) | 2002-11-21 | 2003-10-24 | Semiconductor device production method and semiconductor device |
Country Status (5)
Country | Link |
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US (2) | US7235428B2 (zh) |
JP (1) | JP3851607B2 (zh) |
KR (1) | KR101120128B1 (zh) |
CN (1) | CN100437951C (zh) |
TW (1) | TWI329360B (zh) |
Cited By (1)
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TWI569703B (zh) * | 2014-08-05 | 2017-02-01 | Ngk Spark Plug Co | Wiring substrate manufacturing method |
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JP3851607B2 (ja) | 2002-11-21 | 2006-11-29 | ローム株式会社 | 半導体装置の製造方法 |
US20050136648A1 (en) * | 2003-12-23 | 2005-06-23 | Mariah Sharma | Method and system for forming a contact in a thin-film device |
JP3910598B2 (ja) * | 2004-03-04 | 2007-04-25 | 松下電器産業株式会社 | 樹脂封止型半導体装置およびその製造方法 |
US8349086B2 (en) | 2004-07-30 | 2013-01-08 | United Technologies Corporation | Non-stick masking fixtures and methods of preparing same |
CN101506971B (zh) * | 2006-08-17 | 2013-06-05 | Nxp股份有限公司 | 具有凸出电极的半导体元件和半导体组合装置 |
KR100821476B1 (ko) * | 2006-12-26 | 2008-04-11 | 동부일렉트로닉스 주식회사 | 씨모스 이미지 센서 및 그 제조방법 |
US7608538B2 (en) * | 2007-01-05 | 2009-10-27 | International Business Machines Corporation | Formation of vertical devices by electroplating |
TWI349358B (en) * | 2007-06-08 | 2011-09-21 | Advanced Semiconductor Eng | Device having high aspect ratio via in low dielectric material and method for manufacturing the same |
TWI378544B (en) * | 2007-07-19 | 2012-12-01 | Unimicron Technology Corp | Package substrate with electrically connecting structure |
US8779300B2 (en) * | 2007-07-19 | 2014-07-15 | Unimicron Technology Corp. | Packaging substrate with conductive structure |
JP5263918B2 (ja) * | 2007-07-24 | 2013-08-14 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US7947545B2 (en) | 2007-10-31 | 2011-05-24 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Method for producing a transistor gate with sub-photolithographic dimensions |
US20090212436A1 (en) * | 2008-02-27 | 2009-08-27 | Vanguard International Semiconductor Corporation | Semiconductor structure and method for forming the same |
WO2010147187A1 (ja) | 2009-06-18 | 2010-12-23 | ローム株式会社 | 半導体装置 |
JP2011009363A (ja) | 2009-06-24 | 2011-01-13 | Nec Corp | 半導体装置及びその製造方法並びにこれを用いた複合回路装置 |
US8093106B2 (en) * | 2009-09-23 | 2012-01-10 | Chipmos Technologies Inc. | Method for manufacturing packaging structure |
KR101148392B1 (ko) * | 2010-07-13 | 2012-05-21 | 삼성전기주식회사 | 반도체 패키지 기판의 제조방법 |
JP5800674B2 (ja) * | 2011-10-25 | 2015-10-28 | 日本特殊陶業株式会社 | 配線基板及びその製造方法 |
CN103329281B (zh) * | 2011-11-22 | 2014-10-08 | 株式会社钟化 | 太阳能电池及其制造方法以及太阳能电池模块 |
KR20140143214A (ko) * | 2012-03-30 | 2014-12-15 | 엠에스지 리토글라스 게엠베하 | 반도체 장치 및 유리질 층의 제조 방법 |
JP2014187354A (ja) * | 2013-02-21 | 2014-10-02 | Ricoh Co Ltd | デバイス、及びデバイスの作製方法 |
US10051741B2 (en) | 2013-11-06 | 2018-08-14 | Qualcomm Incorporated | Embedded layered inductor |
US9875980B2 (en) * | 2014-05-23 | 2018-01-23 | Amkor Technology, Inc. | Copper pillar sidewall protection |
US20170309565A1 (en) * | 2016-04-25 | 2017-10-26 | Infineon Technologies Ag | Method of manufacturing semiconductor devices |
US10319695B2 (en) * | 2017-06-29 | 2019-06-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and bump formation process |
CN110120351A (zh) * | 2019-04-02 | 2019-08-13 | 福建省福联集成电路有限公司 | 一种金属柱制作方法及半导体器件 |
JP2022014750A (ja) * | 2020-07-07 | 2022-01-20 | キオクシア株式会社 | 半導体装置およびその製造方法 |
US11990421B2 (en) * | 2022-01-19 | 2024-05-21 | STATS ChipPAC Pte. Ltd. | Semiconductor device with compartment shield formed from metal bars and manufacturing method thereof |
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JPH01251642A (ja) * | 1988-03-31 | 1989-10-06 | Nec Corp | 半導体装置の製造方法 |
JPH0745662A (ja) | 1993-07-30 | 1995-02-14 | Hitachi Ltd | メタルマスクの接着構造 |
KR100221654B1 (ko) | 1996-12-06 | 1999-09-15 | 윤종용 | 스크린 프린팅을 이용한 금속 범프의 제조 방법 |
JP3352352B2 (ja) | 1997-03-31 | 2002-12-03 | 新光電気工業株式会社 | めっき装置、めっき方法およびバンプの形成方法 |
JPH1126466A (ja) | 1997-07-09 | 1999-01-29 | Matsushita Electron Corp | 半導体装置の製造方法 |
JPH11284005A (ja) | 1998-01-30 | 1999-10-15 | Toshiba Corp | バンプアレイの形成方法および接続方法 |
JP4067643B2 (ja) * | 1998-06-23 | 2008-03-26 | 沖電気工業株式会社 | 半導体装置の製造方法及び半導体装置を製造するための製造装置 |
JP3420703B2 (ja) | 1998-07-16 | 2003-06-30 | 株式会社東芝 | 半導体装置の製造方法 |
US6140155A (en) * | 1998-12-24 | 2000-10-31 | Casio Computer Co., Ltd. | Method of manufacturing semiconductor device using dry photoresist film |
JP2000294585A (ja) | 1999-04-01 | 2000-10-20 | Nec Corp | バンプ構造及びその形成方法 |
JP4196481B2 (ja) | 1999-05-28 | 2008-12-17 | ソニー株式会社 | 半導体装置の製造方法 |
US6274499B1 (en) | 1999-11-19 | 2001-08-14 | Chartered Semiconductor Manufacturing Ltd. | Method to avoid copper contamination during copper etching and CMP |
JP2001196407A (ja) * | 2000-01-14 | 2001-07-19 | Seiko Instruments Inc | 半導体装置および半導体装置の形成方法 |
JP2001223232A (ja) | 2000-02-08 | 2001-08-17 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP2002093811A (ja) * | 2000-09-11 | 2002-03-29 | Sony Corp | 電極および半導体装置の製造方法 |
US6713880B2 (en) * | 2001-02-07 | 2004-03-30 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same, and method for mounting semiconductor device |
JP2002299361A (ja) | 2001-03-28 | 2002-10-11 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP3851607B2 (ja) | 2002-11-21 | 2006-11-29 | ローム株式会社 | 半導体装置の製造方法 |
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2002
- 2002-11-21 JP JP2002338480A patent/JP3851607B2/ja not_active Expired - Fee Related
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2003
- 2003-10-24 TW TW092129529A patent/TWI329360B/zh not_active IP Right Cessation
- 2003-11-12 US US10/704,608 patent/US7235428B2/en not_active Expired - Lifetime
- 2003-11-20 KR KR1020030082683A patent/KR101120128B1/ko not_active IP Right Cessation
- 2003-11-21 CN CNB2003101164439A patent/CN100437951C/zh not_active Expired - Fee Related
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI569703B (zh) * | 2014-08-05 | 2017-02-01 | Ngk Spark Plug Co | Wiring substrate manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
US8089163B2 (en) | 2012-01-03 |
KR20040045330A (ko) | 2004-06-01 |
US20060194367A1 (en) | 2006-08-31 |
JP2004172491A (ja) | 2004-06-17 |
TW200417016A (en) | 2004-09-01 |
JP3851607B2 (ja) | 2006-11-29 |
US20040102037A1 (en) | 2004-05-27 |
CN100437951C (zh) | 2008-11-26 |
KR101120128B1 (ko) | 2012-02-22 |
CN1503337A (zh) | 2004-06-09 |
US7235428B2 (en) | 2007-06-26 |
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