TWI299543B - Method for forming dual damascenes with supercritical fluid treatments - Google Patents
Method for forming dual damascenes with supercritical fluid treatments Download PDFInfo
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- TWI299543B TWI299543B TW095118827A TW95118827A TWI299543B TW I299543 B TWI299543 B TW I299543B TW 095118827 A TW095118827 A TW 095118827A TW 95118827 A TW95118827 A TW 95118827A TW I299543 B TWI299543 B TW I299543B
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Classifications
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
1299543 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種多層半導體元件之積體電路製作方 法,特別係關於一種利用超臨界流體處理之雙鑲欲結構形 成方法,以減少電漿#刻損傷並且改善低介電值材料之絕 緣特性。 【先前技術】
為了符合極大型積體電路(ultra large scale integration)半導體線路之急增的高密度以及性能要 求’需要精密的内連接技術。當元件尺寸縮小,提供一内 連接技術可滿足低電阻以及電容之内連接性質更為困難, 特別是在次微米層間鑲嵌内連接(例如:通孔)以及層間内 連接’其具有較大之高深寬比(狹窄開口)。 。兒的具體一點就是利用一通孔優先方法形成一雙鑲嵌 開口之製程中,其係於一或多層介電絕層中優先形成該通 孔’並且接著形成—溝槽開口以完成-金屬内連接。數個 ^鍵性製程步驟將該低介電值之介電絕緣層暴露於電聚辅 蚀刻或者灰化(ashing)化學作用,以 光阻層。 j 一 彳來”兒以氧化矽為基礎之低介電值介電絕緣層有 一和钱刻電聚作用& a 值介電絕緣層,==傾向會不利地影響該低介電 後續製程牛:φ 1電常數增加且具有親水性,以及在 買心步驟中容易吸收水分。 5 1299543 克服上述缺點的習知技術採用耗時的烘烤製程,以趨 趕該低介電值介電絕緣層所吸收水分。接著,進行濕式清 潔以及金屬電鍍步驟,例如銅電化學沉積 (electrochemical deposition, ECD)。其他方法例 如於該介電絕緣層上形成一覆蓋層(capping “代㈡或 者一保護層亦常被使用。然而,上述方法亦會增加介電常 數以及電容,並且無法避免具有蝕刻開口的介電絕緣層劣 4匕(degradation) ° 此外,習知技術之方法需要複雜之蝕刻、濕式清潔、 以及烘烤步驟,以克服介電層絕緣層中之污染物以及水分 吸收的問題。 因此,半導體製程領域中需要發展一較佳之雙鑲嵌製 程,藉以增進介電絕緣層之完整性以及特質,同時減少製 程步驟的數目以達到更大產率。 【發明内容】 本發明之一目的係提供一較佳之雙鑲嵌製程,藉以增 進介電絕緣層之完整性以及特質,同時減少一製程步驟數 目以達到更大產率,以及克服習知技術中其他缺點以及不 足。 為了達到前述以及其他目標,並且依照本發明之目 的’如同在此具體地以及明顯地描述,本發明提供一種雙 鑲嵌結構之形成方法,其係提供一單一製程去除光阻同時 避免以及修補電漿蝕刻損傷,並且移除該介電層中之吸收 1299543 水氣。 在第一實施例中,一種雙鑲嵌結構之形成方法提供一 單一製程,以去除光阻同時避免及修補電漿蝕刻損傷,並 且移除該介電層中之吸收水氣。該方法包括提供一基底, 包含一最上層之光阻層以及一開口延伸穿過一金屬層間介 電層之一厚度,以暴露一下方金屬區域。進行至少一超臨 界流體處理以移除最上層之該光阻層。此超臨界流體處理 包含超臨界二氧化碳、一辅溶劑、以及一添加物。此添加 物係選自由一金屬腐蝕抗劑及一金屬抗氧化劑所組成之群 組。此超臨界流體處理亦包含一選擇性介電絕緣層之化學 鍵形成劑。 上述以及其他本發明之實施例、觀念、以及特徵係藉 由較佳實施例配合相關圖示說明之一詳細描述,以使其容 易理解。 【實施方式】 儘管本發明方法係參考實施例來說明,並且特別適用 於形成一銅填充之雙鑲嵌結構。然而,本發明方法亦可用 於其他金屬’例如鶴、铭、銅、或者其合金。此外,本發 明方法應用之雙鑲嵌結構可具有或不具有中間蝕刻停止 層。中間餘刻停止層形成於複數介電絕緣層之間,以分隔 雙鑲嵌結構之通孔部分以及溝槽線部分。舉例來說,單一 介電絕緣層可以同時包括雙鑲嵌結構之通孔部分以及溝槽 線部分。
1299543 參考第1A至1 F圖,係械士妙 ^ ^ . '、根據本發明之一實施例繪示雙 ==之各階段中的多層半導體元件之部分結構剖面示 電絕缘芦:Α Γ糸顯不一導電區域1〇 (例如銅)形成於-介 =二中。介電絕緣層11上方具有第-蚀刻停止層 12例如鼠化矽(siN)、氮氣 ^ 夕(Sl〇N)、碳化矽(SiC)、 ⑽⑺、或者氣摻雜碳切⑽則。第一 二層12係利用_習知化學氣相沉積(㈣)製程形 :::括低壓化學氣相沉積(LpcVD)或者電聚輔助化學氣 tr(PECVD),且具有—厚度約则埃(Angstroms) 至約7 0 0埃。 繼續參考第1A圖’餘刻停止層12上方係形成第一介 電絕緣層!4(亦可視為—金屬層間介電層(imd))較佳係 由低介電值(1〇W-k)氧切為基礎之材料構成。此外,介 電絕緣層14可以由無機或者有機旋轉塗佈介電材料(测 構成,例如包括含f基石夕酸鹽(methyl 之矽酸鹽類,並且係利用一習知旋轉塗佈製程形成。低介 電值金屬層間介電層14之介電常數較佳為約小於3』,更 佳為約小於2.8,並且具有—内連接多孔結構。—般來說, 金屬層間介電層14具有一厚度約3〇〇〇埃至7〇〇〇埃。 仍舊參考第1A圖,於金屬層間介電層14沉積之後, 一蝕刻停止/底部抗反射層(BARC)16接著選擇性地形成 於金屬層間介電層I4上方,較佳係利用一無機材料同時作 為一蝕刻停止層以及一底部抗反射層。舉例來說,氮氧化 矽以及碳氧化矽係較佳的一蝕刻停止/底部抗反射層材 8 1299543 i子作為一蝕刻停止或硬罩幕層以改善後續反應式 、特性。熟悉半導體技藝者可知,習知#刻停止 :(例如氮切)、無機底部抗反射層(例如 =部抗反射層,亦可用來取代單—_停止/㈣= 射層1 6。 仍舊參考第ΐΑϋ ’ —光阻層17係形成於底部抗反射 層16上方’並且利用習知微影製程將其圖案化以㈣一介 1開口(v:UQPening)18。介層開口係接著利用—包括赢 碳化合物(flu〇r〇carb〇ns)以及/或者全氟化碳 (PMflu〇rocarbons)之電漿輔助蝕刻製程形成(例如反 應式離子蝕刻(RIE)製程卜本發明之一重要特徵為下層導 電區域(例如銅區域1〇)可於完全蝕刻穿透蝕刻停止層工2 厚度之介層開口製程中被暴露。 參考第1B圖,接奢利用第一超臨界流體處理來移除光 阻層17。當處理位於該介層開口底部之暴露金屬部分時, 第一超臨界流體處理需包括金屬(例如銅)及腐蝕抗劑為較 佳。。金屬腐蝕抗劑係避免於該第一超臨界流體清潔過程 中發生金屬腐蝕。當移除介層圖案光阻層17時,第一超臨 界流體處理可包含一個或數個辅溶劑(c〇 —s〇lvent)為較 佳。舉例來說,當第一超臨界流體處理用來移除光阻層工7 時,可同時攜帶金屬腐蝕抗劑以及金屬抗氧化劑至暴露下 層金屬區域表面。超臨界流體處理亦可以用來去除水分, 以及攜帶修補劑至介電層中。 較佳地,金屬腐蝕抗劑添加物係為一銅腐蝕抗劑,例 1299543 如一或多個咪唑(imidazole)、三唑(t〇lytriz〇le)或 硫脲(Thiourea)。舉例來說,銅腐蝕抗劑係添加約為相 對於超臨界流體(例如:二氧化碳以及一或多個輔溶劑)之 〇·1%重量比(wt%)至5%重量比(wt%),較佳係小於1%重 量比(w t % )。 此外,一抗氧化添加劑(鈍化劑),例如一或多個笨並 二唑(benzotriazole, BTA)以及硫醇笨駢唑 (mercaptobenzothiazole, MBT),可以於超臨界流體 處理至少部分過程中添加,並且具有與上述銅腐蝕抗劑相 同範圍之重量比(wt%)。該第一臨界流體處理可以包括下 述溶劑用來移除該溝槽圖案光阻,以同時或分別利用包含 銅腐蝕抗劑及銅抗氧添加物之超臨界流體處理,以移除該 通孔圖案光阻層。 根據本發明,由於相對習知技術缺少表面張力作用, 該銅腐蝕抗劑以及鋼抗氧化(銅鈍化)添加物可藉由該超臨 界流體處理而更有效率地傳送至高深寬比之通孔(例如深 寬比大於4 : 1之通孔)。此外,藉由添加銅腐触抗劑及銅 抗氧化(銅鈍化)添加物、連同一或多個辅溶劑(例如酸、紛 及胺)包含於该超臨界流體處理以移除光阻,位於通孔底部 之暴露銅導線可避免於超臨界流體處理過程中發生腐蝕以 及氧化。 超臨界流體處理係於高於一臨界點之溫度以及壓力下 進行以形成一超臨界流體(介質)。舉例來說,當溫度以及 壓力南於一臨界點’二氧化碳係形成一超臨界狀態。舉例 1299543 來說,一超臨界流體前驅物包括二氧化破以及含有甲氧基 之辅溶劑,係自約25。(:加熱至約85乞以及自约2〇〇〇psig 加壓至800 0 psig以形成一超臨界流體(介質)。較佳地, 該超臨界流體之形成係藉由加熱一流體前驅物自約30。0至 约70 C ,以及於一壓力自約25〇〇psig升高至 4000psig。舉例來說,該超臨界流體係具有一黏度等級為 ΙΟ·2至1CT4 poise,以及一密度約6〇〇至約8〇〇 kg/m3。形成超臨界流體之方法係為熟知該項技藝者所知 悉,包括具有控制壓力及溫度裝置之超臨界流體反應器。 舉例來說,添加物以及溶劑或辅溶劑可以在液態二氧化碳 送進反應ϋ腔體之則或之後添加至液態二氧化碳中。超臨 界流體處理的執行時間長度不^,可視介電絕緣層之組成 以及先刖所經歷之製程而定,例如自約2分鐘至約4 $分鐘。 參考第1C圖,包含銅抗氧化劑以及銅腐純劑之第一 超臨界a體處理之後,接著形成—樹脂插塞層Μ。舉例來 說可以疋白知光阻樹脂或光阻樹脂,例如可以用一負型 光P或%阻树月曰缺少感光添加物來作為插塞層,以避免 在沉積-溝槽圖案_ 22之前還需要一含氧回餘 l:tChbaCk)製程。然而,可輕易得知的是,在形成溝槽 圖案光阻層2 2之前,可以生 一 > 无進仃一回蝕刻以移除位於該蝕 插:底/抗反射層上表面16之樹脂插塞層20。樹脂 插塞層20較佳係利用一於絲& ^ . a θ 疋轉塗佈方法來沉積形成,並且填 滿介層開口 1 8。 繼續參考第1 e m。 u 光阻(例如正型)層2 2係接著全 11 1299543 =積於樹脂插塞層2Q表面'然後進行_習知微影圖案化 製程,以形成一溝槽開口蝕刻圖案(開口)24,以覆蓋並且 圍繞介層開口 18。此外,可推知溝槽開口圖案24可以圍 繞一個以上之介層開口。 參考第1D圖,接著該溝槽開口圖案製程之後,係進行 —習知乾蝕刻製程以蝕刻穿過樹脂插塞層、底部抗反射/ 蝕刻停止層、以及金屬層間介電層之部分厚度,以形成一 溝槽開口 24A。於該乾蝕刻製程中,樹脂插塞層2〇係同時 回蝕刻以保持大致填滿該介層開口。 參考第1E圖,根據本發明之一重要特徵,形成溝槽開 口 24A之後,進行一第二超臨界流體處理以移除樹脂插塞 層20之殘餘部分以及光阻層22,因此完成該雙鑲嵌開口。 較佳地,一可溶解光阻以及該樹脂插塞材料之辅溶劑係於 該超臨界流體處理之前或過程中加入該超臨界流體。該輔 溶劑可以是於超臨界溫度以及壓力下可溶解光阻之任何辅 溶劑。舉例來說,辅溶劑包括酸胺酚以及酮、鹵化碳氫化 合物(halogenated hydrocarbon)、績酸(sulfonic acids )、吡口各烧酮(pyr〇iici〇nes)、乙二醇醚(Glyc〇1 Ether)、 酯、硫氧化物、以及繞酸(Carboxylic Acid),並且具有一 重量比約3 wt%至5 wt%相對於該超臨界流體之總重量 比。用來移除溝槽圖案光阻22以及插塞層2 0之辅溶劑可 以相同或不同於第一超臨界流體處理之輔溶劑(用來於該 通孔形成製程中移除一通孔圖案光阻層1 7 )。 該超臨界流體可以額外包括習知介面活性劑 12 1299543 ^surfactants),其具有約〇>1 wt%至約3社%相對於 該包含超臨界二氧化碳之介f之總重量比。添加—介面舌 性劑至該包含超臨界4化叙介f巾,財助於化學殘 留物以及水分的移除。 ^根據該第二超臨界流體處理之一重要特徵,前述第一超 臨界流體處理之銅腐純劑以及銅抗氧化劑係較佳包含於 此超臨界流體介質中,以進行該第二超臨界流體處理。 根據本發明之重要特徵,藉由該第二超臨界流體處理移 除樹脂插塞層20以及光阻層22之後係進行一第三超臨界 流體處理以增加金屬層間介電層暴露部分(例如雙鑲嵌開 口之側壁)之矽—氧一矽鍵密度。較佳地,一添加物包含於 第三超臨界流體處理中,以加強金屬層間介電層14之矽— 氧一矽鍵形成,因此增加金屬層間介電層丄“包括金屬層 間介電層14之暴露部分之接近表面區域)之密度。舉例來 說,該添加物(在此亦稱作化學鍵形成劑)較佳係促進金屬 層間介電層矽氫氧基(Si〇H)之縮合反應(c〇ndensati〇n reaction),以增加金屬層間介電層中矽—氧一矽鍵的數 量及密度。可推想得知的是,該第三超臨界流體處理可以 接著該第一超臨界流體處理之後進行,或者與該第一以及 第二超臨界流體處理共同進行,例如於該第一以及第二超 臨界流體處理之部分過程中添加該化學鍵形成劑。 適合的添加物包括烷基代替矽烷含有Si-CH3末端鍵結 吕月匕基’例如R -Si(CH3)xHy其中x + y==3,並且其中R 係為一有機取代基例如烷基、氫氧烷基 13 1299543 (hydroxyalkyls)、苯基(phenyls)、烷苯基 (alkylphenyls) 、氫氧 烷苯基 (hydroxyalkylphenyls)、烷醇(alkan〇ls)、以及胺 基(amines)。舉例來說,烷基胺矽烷或者烷基氨矽烷包括 (CH3) 3S1-NH2 或者(CH3) 3Si-NH-Si (CH3) 3 係為特別 適當之矽一氧一矽鍵形成添加物。較佳地,該添加物係具 有一總合重S比約5 wt %至2 0 wt %相對於該超臨界流體 總重量。此外,包括該雙鑲嵌開口之金屬層間介電層14經 過超臨界流體處理之後,具有降低介電常數之效果,例如 降低至一接近預蝕刻/灰化水準。 舉例來說,該第三超臨界流體處理可修復該金屬層間介 電層表面之Si0H懸空鍵(dangling bonds),包括促進 矽氫氧基縮合反應,以於金屬層間介電層表面暴露部分(例 如雙鑲嵌開口之側壁)形成一較高密度之矽一氧—矽鍵。此 外,該超臨界流體處理允許滲透至具有一内連接多孔結構 之一金屬層間介電層内部。因此該石夕一氧一石夕鍵形成反應 可以於該金屬層間介電層之内部發生,該滲透程度係視處 理溫度、時間、多孔結構、以及該超臨界流體介質之黏度 而定。此外,該第三超臨界流體處理具有可移除矽鍵結之 姓刻污染物,例如氟以及氮,以及自暴露於該處理之部分 金屬層間介電層中移除水分之額外效果。這使得該金屬層 間介電層係為疏水性,因此可省去習知技術進行一用來移 除水分之熱烘烤處理。前述第一以及第二超臨界流體處理 之界面活性劑、銅腐蝕抗劑、以及銅抗氧化劑可以包含於 1299543 該超流職體介質中,以用來進行該第三超臨界流體處理。 參考第1F圖,接著進行習知製程以完成雙鑲谈結構, 包括形成一阻障層2 6,你丨备#儿& 例如虱化鈕(TaN),作為該雙鑲嵌 刊口内襯,利用一雷务與h 冤化學》儿積(eleCtro〜chemical deposition,ECD)製程回填銅層Μ,以及進行一化 械研磨平坦化製程以暴露金屬層間介電層Μ表面。 -雔鑪據本發明,提供—雙鑲㈣程可避免損傷包括 又、h 口之-金屬層間介電層,以及維持—氧化 礎之低介電值材料之—你人+Μ1 低;|電书數。此外本發明係減少習 知版程步驟以及消除製程所需卫具,例如省略電漿灰化製 濕式清潔製程、以及熱烘烤製程。根據較佳實施例, 電路連接之品質,糾提升包括雙鑲嵌結構之 以及可靠度。、一進-完整半導體元件之元件表現 4 —圖係顯不包括本發明數個實施例之一製程流 穿過兮」 於步驟203,一介層開口係形成 :金屬層間介電層厚度’包括暴露一底部導電區域。 理較佳實施例係進行—第—超臨界流 口。於+ ” 树舳材料層係沉積並且填充該介層開 且具有二 =圖案光阻層係形成覆蓋該樹脂材料層,並 ^ A ^於步驟211,一溝槽開口係蝕刻 ,:’屬層間介電層中並且圍繞該介層開口。於步驟 艮據阜乂佳實知例,係進行一第二超臨界流體處理以移 15 1299543 除该溝槽圖案光阻以及樹脂插塞層之殘餘部分。於步驟 2 15’進行一第三超臨界流體處理以降低該金屬層間介電層 之介電常數,包括於鄰接該金屬層間介電層之暴露部分形 成矽〜'氧一矽鍵。於步驟217,進行習知製程包括形成阻 I1早層、金屬回填、以及平坦化步驟,以完成該雙鑲嵌結構。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限$本發明,任何熟習此技藝者,在不脫離本發明之精神 和祀圍内,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂,所附圖式之詳細說明如下·· 多考第1A至1 F圖,係根據本發明之一實施例繪示雙鑲嵌 製程之各階段中的剖面示意圖。
第2圖係為製私流私圖,包括本發明方法之數個實施例。 【主要元件符號說明】 1 〇 :導電區域 12 :蝕刻停止層 17 :光阻層 20 :樹脂插塞層 2 4 :溝槽開口蝕刻圖案 2 6 :阻障層 11、14 :介電絕緣層 ^ =餘刻停止/底部抗反射層 1 8 :介層開口 2 2 :溝槽圖案光阻層 2 4Α :溝槽開口 2 8 ·銅層 16
Claims (1)
1299543 对年《月丨修正本 十、申請專利範圍:~一一一—1 種於半導體元件製程中形成—雙鑲嵌結構之方法, 其包含以下步驟: 提供一基底,其白人一县 3 最上層之第一光阻層以及一介層開 口延伸穿過一介雪總緣既 ^ · 電、、、邑緣層之一厚度,以暴露一下方金屬區 域,
除進:;一包IS界一 形成-樹脂層於該介電絕緣層上,並且填充該介層開口; 圖案化位於該樹脂層上之—第二光阻層,以㈣介層開口 上蝕刻形成一溝槽開口; 蝕刻該溝槽開口;以及 ^:超臨界二氧化碳之第二超臨界流體處理,以移 除忒第一光阻層以及該樹脂層,以形成一雙鑲嵌開口。 2·如申請專利範圍第1項所述之方法,進-步包含以下 步驟; 進二一包含超臨界二氧化碳以及—化學鍵形成添加物之 第超臨界流體處理,以增加該介電絕緣層中之石夕—氧— 石夕鍵密度。 3·如申請專利範ϋ第2賴述之方法,其巾該化學鍵形 成添加物包含t叫⑶上么,其中x+,且R包含一官能 基,此一官能基係選自由烷基、氫氧烷基'苯基、烷苯基、 17 1299543 氫氧烧苯基、烷醇、以及胺基所組成之群組。 4 ·如申請專利範圍第2項所述之方法,其中該化學鍵形 成添加物係選自由烷基胺矽烷以及烷基氨矽烷所組成之 群組。 5 ·如申請專利範圍第2項所述之方法,其中該化學鍵形 成添加物係選自由(CH3)3Si-NH-Si(CH3)3以及 ((:H3)3Si-NHJ/t組成之群組。 •如申晴專利範圍第1項所述之方法,其中該第一及第 一超臨界流體處理進一步包含一金屬腐蝕抗劑以及一金 屬抗氧化劑做為添加物。 7 j Y如申請專利範圍第6項所述之方法,其中該金屬腐蝕 抗劑係選自由咪唑、三唑、以及硫脲所組成之群組。 8 ji •如申請專利範圍第6項所述之方法,其中該金屬抗氧 叫係選自由苯並二嗤以及硫醇苯骄°坐所組成之群組。 =如申睛專利範圍第1項所述之方法,其中該第一以及 s第一超臨界流體處理係包含一辅溶劑以分別移除該第 以及該第二光阻層。 1299543 ίο.如申請專利範圍第9項所述 ^ ^^^ <方法,其中該辅溶劑 包3 —化合物,該化合物係選自由 曰田騃、酚、以及胺所組成 之群組。 η·如中請專利範圍第9項所述之方法,其中該辅溶劑 包含-化合物,該化合物係選自由,、画化碳氫化合物、 續酸、㈣"比洛烧酮、〔二醇峻、酉旨、以及硫氧化物 所組成之群組。 12·如申請專利範圍第1項所述之方法,其中該介電絕 緣層係具有一小於3 · 〇之介電常數。 13·如申請專利範圍第1項所述之方法,進一步包含以 下步驟: 形成一阻障層於該雙鑲嵌開口中作為内襯; 回填銅於該雙鑲嵌開口;以及
進行一化學機械研磨製程以去除一銅表面。
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US7642184B2 (en) * | 2007-03-16 | 2010-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for dual damascene process |
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