TWI278064B - Methods for forming dual damascene wiring using porogen containing sacrificial via filler material - Google Patents

Methods for forming dual damascene wiring using porogen containing sacrificial via filler material Download PDF

Info

Publication number
TWI278064B
TWI278064B TW94143335A TW94143335A TWI278064B TW I278064 B TWI278064 B TW I278064B TW 94143335 A TW94143335 A TW 94143335A TW 94143335 A TW94143335 A TW 94143335A TW I278064 B TWI278064 B TW I278064B
Authority
TW
Taiwan
Prior art keywords
layer
forming
sacrificial
sacrificial material
via hole
Prior art date
Application number
TW94143335A
Other languages
Chinese (zh)
Other versions
TW200623325A (en
Inventor
Kyoung-Woo Lee
Hong-Jae Shin
Jae-Hak Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020040103088A external-priority patent/KR100745986B1/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200623325A publication Critical patent/TW200623325A/en
Application granted granted Critical
Publication of TWI278064B publication Critical patent/TWI278064B/en

Links

Abstract

Methods for fabricating dual damascene interconnect structures are provided in which a sacrificial material containing porogen (a pore forming agent) is used for filling via holes in an interlayer dielectric layer such that the sacrificial material can be transformed to porous material that can be quickly and efficiently removed from the via holes without damaging or removing the interlayer dielectric layer.

Description

I2780^47pif, 九、發明說明: 【發明所屬之技術領域】 • 本發明主要係關於製作雙重金屬鑲嵌式互連結構之方 - 法,且特定言之,係關於雙重金屬鑲嵌之方法,其中採用 一包含成孔劑(造孔劑)之犠牲材料填充一層間^電層中 , 之通路孔,以便將該犧牲材料轉化成可自該等通路孔被快 速且高效地除去之乡孔㈣,而不會财或無除去該層間 介電層。 * 【先前技術】 由於半導體製作領域中技術不斷創新,使得可按照更 小的設計規則(DR)設計積體電路,因此半導體裝置之集 成度變得越來越高。高度積體電路依例使用多層金屬互連 結構设计,其中該等金屬線/互連結構自一積體電路之不同 金f層形成。一般而言,多層金屬連線由一電阻低、可靠 生尚以產生改良性此之金屬材料形成,例如銅(cu)。然而, 使用傳統微影/蝕刻技術,難於使銅形成圖案,尤其當按照 _ 相對較小之設計規則形成該等銅線時更係如此。因此,雙 _ 重金屬鑲嵌方法已被發展成能形成高度積體之銅金屬互^ 結構。 一般而言,利用雙重金屬鑲嵌方法形成上部金屬線, 其透過若干傳導通路電連接至下部金屬線。舉例言之,〜 習知之雙重金屬鑲嵌方法一般包括諸如隨後所示之工序: 於半導體基底上之一下部金屬線上方形成一層間介電 (ILD)層,於該層間介電(ILD)層中蝕刻出一通路孔,其對 l278〇64pif 之一預定區域;用-犧牲材料填充該通路 填充之通二層中形成—溝渠區域’其對準該被 犧牲材2匕本領域情f知之技術’㈣通路填充 =牲材抖使件在該ILD層中之一溝渠區域中 刻輪#之溝渠及通路孔接觸區域。此外,該犧ς ς殖 2料保護該下部金屬線與該通路接觸孔之ILD層中之側 ς、=免遭損害或污染,該損害或污染係產生自在溝渠形 中之飯刻空氣及/或隨後為除去光阻劑材料 之灰化步驟或清潔步驟。 丁 與在該ILD層中形成該溝渠區域之後,利用若干蝕刻化 予物將仍殘存於該通路孔中之該犧牲材料蝕刻掉,經由選 擇之蝕刻化學物相對於該ILD層中之該介電質而言於該 犧牲材料具有高蝕刻選擇性。其後,藉由用傳導材料 如銅)填充該通路孔與該ILD層中之該等溝渠區域而形成 ^等上部金屬線及通路接觸。 儘管雙重金屬鑲嵌方法可形成性能得以改良之金屬互 連結構,然而對於不斷變小之設計規則,此等方法存在之 問題越來越多。例如,對於不斷減小之設計規則,存在於 才只向或一垂直方向中之相鄰金屬線層間之寄生電阻與電 容可能會影響該等半導體裝置之性能。實際上,該等寄生 電阻與電容元件導致相鄰金屬線之間產生電容耦合與串 擾,從而使半導體裝置之性能降低。此外,該等寄生電阻 與電容元件導致信號洩漏增加且使得該半導體裝置之功耗 增加。 7 I278〇6iPi/ 為降低寄生電容,利用具有低介 形成ILD層。儘管使用低介電 ^介電材料 性能得到改良,但由此低介電传數^使件+導體裝置之 易因侧而受到損害。例如更容 =去該通路孔填充犧牲材料之過程中,二^ 材料形成之ILD層可能被損害( f,电係數 需要之钱刻)。因此,提供用於除去殘留之犧合乎 導致損害ILD層,尤其不會導致彳彳材枓而不會 成之ILD層之有財法係;=纖介钱數材料形 具才木用一可熱分解之犧牲通路孔埴夯 該材料藉由熱分解可自—通路孔被除去而不會損ί 料。更特定言之,Meagley揭示-大體 2=::雙重金屬鑲嵌方法:於-半導體基底 層中形成一通路接觸孔;於該通路接觸孔内沉 積一可熱分解之犧牲㈣;射彳該ILD層與可熱分解之犧 牲材料以形成一溝渠區域;且然後加熱該半導體基底,以 除去殘留機通路接軌内之任何可熱分解之犧牲材料。I2780^47pif, IX. Description of the invention: [Technical field to which the invention pertains] The present invention is mainly directed to a method for fabricating a dual damascene interconnect structure, and in particular, a method for dual damascene, wherein A porogen containing a porogen (porogen) fills a via hole in a layer of electrical interconnects to convert the sacrificial material into a well (4) that can be quickly and efficiently removed from the vias. There is no or no removal of the interlayer dielectric layer. * [Prior Art] As the technology in the field of semiconductor fabrication continues to innovate, integrated circuits can be designed in accordance with smaller design rules (DR), so the integration of semiconductor devices becomes higher and higher. The highly integrated circuit is designed using a multilayer metal interconnect structure, wherein the metal lines/interconnect structures are formed from different gold f layers of an integrated circuit. In general, a multi-layer metal wiring is formed of a metal material having a low electrical resistance and reliability to produce a modified metal such as copper (cu). However, with conventional lithography/etching techniques, it is difficult to pattern copper, especially when the copper lines are formed according to a relatively small design rule. Therefore, the double _ heavy metal damascene method has been developed into a copper metal intermetallic structure capable of forming a highly integrated body. In general, the upper metal wire is formed by a dual damascene process that is electrically connected to the lower metal line through a plurality of conductive paths. For example, the conventional dual damascene method generally includes a process such as that shown later: forming an interlevel dielectric (ILD) layer over one of the lower metal lines on the semiconductor substrate in the interlayer dielectric (ILD) layer Etching a via hole to a predetermined area of 1278〇64pif; filling the via filled with the sacrificial material to form a trench region in the pass-through region, which is aligned with the material to be sacrificed. (4) Path filling = the material shaking means in the trench area of one of the ILD layers, the trench and the via hole contact area. In addition, the sacrificial material 2 protects the side wire in the ILD layer of the lower metal line from the contact hole of the passage, and is free from damage or pollution, which is generated from the air in the trench shape and/or Or followed by an ashing step or a cleaning step to remove the photoresist material. After forming the trench region in the ILD layer, the sacrificial material remaining in the via hole is etched away by using a plurality of etching dopants, via the selected etching chemistry relative to the dielectric in the ILD layer The sacrificial material is of high etch selectivity. Thereafter, the via holes and the trench regions in the ILD layer are filled with a conductive material such as copper to form an upper metal line and via contacts. Although the dual damascene method can form a metal interconnect structure with improved performance, there are more and more problems with these methods for the ever-decreasing design rules. For example, for ever-decreasing design rules, the parasitic resistance and capacitance present between adjacent metal line layers in either a vertical direction may affect the performance of such semiconductor devices. In fact, these parasitic resistances and capacitive elements cause capacitive coupling and crosstalk between adjacent metal lines, thereby degrading the performance of the semiconductor device. In addition, the parasitic resistance and the capacitive element cause an increase in signal leakage and increase the power consumption of the semiconductor device. 7 I278〇6iPi/ To reduce parasitic capacitance, use a low dielectric to form an ILD layer. Although the performance of the low dielectric dielectric material is improved, the low dielectric passage and the conductor device are easily damaged by the side. For example, in the process of filling the sacrificial material in the via hole, the ILD layer formed by the material may be damaged (f, the electric coefficient requires money). Therefore, the provision of a method for removing the residue is caused by damage to the ILD layer, and in particular, does not cause the coffin to become an ILD layer; Decomposed Sacrificial Path Holes The material can be removed from the via holes by thermal decomposition without damaging the material. More specifically, Meagley reveals that the general 2=:: dual damascene method: forming a via contact hole in the semiconductor underlayer; depositing a thermally decomposable sacrifice in the via contact of the via (4); and imaging the ILD layer And the thermally decomposable sacrificial material to form a trench region; and then heating the semiconductor substrate to remove any thermally decomposable sacrificial material within the residual machine via.

Meagley揭示,該可熱分解之犧牲材料係一種可在一 可接受之溫度,較佳低於450攝氏度時於-還原线中可 被熱分,,蒸發之材料,如此可除去該可熱分解之犧牲材 料而不扣告低介電係數之介電材料。該可熱分解材料可為 有械材料與热機材料之組合,諸如為含石夕材料與含碳材料 之組合(例如,烴-矽氧烷聚合物混合材料,Meagley discloses that the thermally decomposable sacrificial material is a material that can be thermally divided in a reduction line at an acceptable temperature, preferably below 450 degrees Celsius, to evaporate, thus removing the thermally decomposable material. The material is sacrificed without derogating the dielectric material with a low dielectric constant. The thermally decomposable material may be a combination of an elastomeric material and a heat engine material, such as a combination of a stone-containing material and a carbonaceous material (e.g., a hydrocarbon-heloxane polymer hybrid material,

8 12780鼠〆 hydroca〔bon-siI〇xane po!ymer hybrid materia])。偷㈣巧進 一步揭不,在加熱該半導體基底以自該通路接觸孔除去可 熱分解犧牲材料後,可應用一化學清理製程自該通路接觸 孔除去剰餘/殘留之可熱分解犧牲材料。 佐§藉由Meagley所揭示之該等方法可能有助於將對 低介電係數材料所形成之ILD M的損害降低至最小程 二:旦t除去該犧牲材料之過程中,由Μ响所揭示的 之可熱分解犧牲材料事實上可導致對該ILD層造 並損害。更特定言之,在加熱該基底以熱分解 = 分解犧牲材料之熱處理過財,纟Meagley 社構m峰魅?’、,、刀_間’由於該犧牲材料喪失8 12780 〆 ca hydroca [bon-siI〇xane po! ymer hybrid materia]). Stealing (4) Step by step, after heating the semiconductor substrate to remove the thermally decomposable sacrificial material from the via contact hole, a chemical cleaning process can be applied to remove the residual/residual thermally decomposable sacrificial material from the via contact hole. The methods disclosed by Meagley may help to reduce the damage to the ILD M formed by the low-k material to a minimum of two: in the process of removing the sacrificial material, revealed by the squeaking The thermally decomposable sacrificial material can in fact cause damage to the ILD layer. More specifically, in the heat treatment of the substrate to thermally decompose = decomposition of the sacrificial material, 纟Meagley society m peak charm? ',,,刀_间' due to loss of the sacrificial material

St ^_仙材料施加接觸力,因此 =牲材枓之收縮導致在該ILD材料上產生大的應力與應 處理H犧可熱分解材料由於熱 而—之可熱分解犧牲材 ^B 在奴後之化學清理製程中,難於除去該 二心且用於自該通路孔除去此Ϊ 時間事該類型姓刻化學物與/或钱刻 料 f致㈣形成該1LD層之該低介電係數材 I27_4PI; 【發明内容】 金屬吉==示;^實施例包括用於製作雙重 (造孔劑)之犠牲材料射、係關於利用一包含成孔劑 雙重金屬鑲嵌方法,二更電層中之通路孔洞的 介電層。 >孔材# ’而不會損害或除去該層間 成物成⑽/紐材料合 田Μ成孔刎破除去時,該犧牲材料收縮時、力右貞+ :湖結構’從而防止該-層被二生=St ^ _ 仙 material applies contact force, so = shrinkage of the material 导致 causes large stress on the ILD material and should be treated H to thermally decompose the material due to heat - the thermal decomposition of the sacrificial material ^ B after the slave In the chemical cleaning process, it is difficult to remove the two cores and to remove the defects from the via holes. The type of surname chemical and/or money engraving f (4) forming the low dielectric constant material I27_4PI of the 1LD layer. [Description of the Invention] Metals == indicates; ^ Embodiments include the use of a dual (porogen) for the production of a material, relating to the use of a dual metallization method comprising a pore former, the via holes in the second electrical layer Dielectric layer. >孔材# ' Without damaging or removing the inter-layer product into (10)/New material, the material is entangled and broken, when the sacrificial material shrinks, the force is right 贞 + : lake structure 'to prevent the layer from being Second life =

射3由在it材料之該基體材料中形成細孔,其導 义a 了猎由一蝕刻溶液/氣 V 效增加,藉歧得可更為料且表面積有 料,並因此而將對該ILD層之綱損室efg +/Λ夕孔犧牲材 程度。 口頒者地降低至最小 f-示範性實施例中,用於形成— 括.在一半導體基底上形成—钱刻終止;,方法包 底上有-下部料層形成於其上·:在斜導體基 —ILD (層間介電)層;穿過終止層上形成 f亥親终止層之-部分,其中該通:孔以曝 層之一部"一包含一基體材料與成=== I2780^sipif· 該通路孔;於該ILD層中形成一對準該通路 材,牲材料除去該成孔劑材料,以將該犧牲 =轉化成-多孔犧牲材料,該多孔犧牲材料中包含且中 ^有若干細孔之祕體㈣;除㈣通路孔巾之該多孔 枓以曝露該蝕刻終止層之一部分;且藉 枓填充該溝渠與通路孔而形成互連。 午何 -般^言’該犧牲材料可由—有機或無機基體材料鱼 ^孔,料之組合軸,其何自縣體材料除去該成 材料中生成細孔或空洞’同時保持該基體 2之、,4元整性。在一示範性實施例中,該基體材料可 ς-有機SOP (_鲁帅麟,旋塗式聚合物)材料, 芳㈣基材料,聚甲基丙烯酸甲酉旨基材料或乙稀基 斜2酸Γ醋基材料。在另一示範性實施例中,該基體材 二。為一無機S0G (spin_on_glass,旋塗式玻璃)材料, ^如HSQ(氫化倍半石夕氧燒)基材料或MSQ(甲基倍半石夕氧 院)基材料。 ^在:不範性實施例中,藉由加熱該犧牲材料至一高於 2孔劑材料之沸點之溫度,以自該基材料溶化該成孔劑 $ ^從而可自該犧牲材料除去該成孔劑。該加熱可於一 ”空環境或氮環境中實施。在一示範性實施例中’,被選定 之成孔劑材料的沸點在大約15〇攝氏度至大約4〇〇攝氏度 之範圍内。 fhif—示範性實施例中,藉由對該犧牲材料加熱同時 〜犧牲材料施加紫外射線’可自該犧牲材料除去該成孔 i278〇64Pif 處理可利用—氮基材料。該電浆 在—示範性實施例中,貫施。 製程,可除去該多孔犧牲 j制離製程或-灰化 材料包含一無機基 助之,當該多孔犧牲Shot 3 is formed by the formation of fine pores in the base material of the it material, and its conductivity is increased by an etching solution/gas V effect, which is more versatile and has a surface area, and thus the ILD layer The degree of damage to the room efg + / Λ 孔 hole sacrificial material. Deliberately reduced to a minimum f-exemplary embodiment for forming - forming on a semiconductor substrate - the end of the process; the bottom of the method has a lower layer formed thereon: a conductor-ILD (interlayer dielectric) layer; a portion of the termination layer formed through the termination layer, wherein the via: the hole is one of the exposed layers " one comprises a matrix material and becomes === I2780 ^sipif· the via hole; forming an alignment material in the ILD layer, and removing the porogen material from the material to convert the sacrificial= into a porous sacrificial material, wherein the porous sacrificial material comprises a plurality of pores (4); the porous layer of the (4) via hole is exposed to expose a portion of the etch stop layer; and the trench is filled with the via hole to form an interconnection. Nothing in the afternoon - the sacrificial material can be - the organic or inorganic matrix material fish hole, the combined axis of the material, the Hezi county body material removes the pores or voids in the material material while maintaining the matrix 2 , 4 yuan integrity. In an exemplary embodiment, the base material may be a ς-organic SOP (_Lu Shuai Lin, spin-on polymer) material, an aryl (tetra) based material, a polymethyl methacrylate or a vinyl base 2 Acid vinegar based material. In another exemplary embodiment, the base material is two. It is an inorganic S0G (spin_on_glass, spin-on glass) material, such as HSQ (hydrogenated sesquisulfate) or MSQ (methyl sesquiterpene) based material. In an exemplary embodiment, the pore former can be melted from the base material by heating the sacrificial material to a temperature above the boiling point of the material of the 2-pore agent to thereby remove the composition from the sacrificial material. Pore agent. The heating can be carried out in an "empty or nitrogen environment. In an exemplary embodiment," the selected pore former material has a boiling point in the range of from about 15 ° C to about 4 ° C. Fhif - demonstration In an embodiment, the nitrogen-based material may be removed from the sacrificial material by heating the sacrificial material while the sacrificial material is applied with ultraviolet rays. The plasma may be utilized in an exemplary embodiment. Process, which can remove the porous sacrificial process or the -ashing material contains an inorganic group, when the porous sacrifice

=-扩崎學:::::離犧 性。當該多孔犧牲材料由―有機有—钱刻選擇 由一無機材料形成時,使用—帝二各二成,且该江〇層 製程,或一渴弋蝕 包水火化或H2基電漿灰化 有實例中,舉製:佈::;:^ 孔提供㈣祕仙佈於Ό孔犧牲材料上之該等細 快速除去該多孔^之表面積,使得能夠自該通路接觸孔=-Expansion school::::: From the sacrifice. When the porous sacrificial material is formed by an organic material, it is used as an inorganic material, and the two layers of the emperor are used, and the process of the river layer is formed, or a thirst eclipse water cremation or H2 based plasma ashing In an example, the cloth::;:^ hole provides (4) the fine cloth on the pupil sacrificial material to quickly remove the surface area of the porous surface, so that the contact hole can be accessed from the hole

發明ftri合該等附圖詳細描述之示範性實施例,本 。/、他不範性實施例、方面、特徵與優點將變 【實施方式】 參照該等附圖,現更為全面地描述本發明之若干示範 ,實施例,其中吾人應瞭解的是,為清楚起見,該等層之 厚度與尺寸已被放大。吾人進一步將瞭解到,當一層被描 逑成在另-層或基底“上”或“上方,,時,此層可能直接位於 该另一層或基底上,或亦可出現若干介入層。另外,所有 12The invention is described in detail with reference to the exemplary embodiments of the drawings. / </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; For the sake of clarity, the thickness and size of the layers have been enlarged. It will be further understood that when a layer is depicted "on" or "above" another layer or substrate, the layer may be directly on the other layer or substrate, or a plurality of intervening layers may also be present. All 12

!278〇64, 之I:形中相同之兀件代表符號表示具有相同或相似功能 外圖丄至9為戴面視圖’其舉例說明—根據本 =貫施例形成-半導繼之-金屬線層之方法: 寸之’圖1至9舉例說明—雙重金屬鑲鈴法,复中 牲材料(造孔劑)用於填充-層間;質 便將該犧牲材料轉化成可容易地自 ^專通路孔除去㈣會損害或除去該層·質層之多孔材 當-’圖中顯示—半導體基底⑽),其具有一 (層間介電)層(1〇5)(或絕緣層)與形成於其 上之下部互連線(U0)。該基底⑽)可為任何半導體裝 置,諸如—具杨其切成频電路健之魏底。在二 示範性實施财,該第—ILD層⑽)被形成於半導體 基底(100)上’且利用一鑲嵌技術將下部互連線(11〇) 形成於ILD層(1〇5)中。下部互連線(則)可由任何典 型地被用於形成積體電路傳導層之合適材料形成。例如, 該下部互連線可包含一金屬材料,諸如銅、銅合金、鋁、 鋁合金、鎢或其他合適的金屬或傳導材料。 參照圖2,於圖1之該結構上順序地形成一钱刻終止 層(120)(或阻障層)、一第二ILD層(13〇)與一保護層 (140)(或一硬遮罩遮罩層)。餘刻終止層(I]。)用作一 隨後之通路蝕刻製程(將在下面描述)之蝕刻終止層,以 防止曝露下部互連線(110)。_終止層(m)同樣亦用 13 1278064 18707pif 作一擴散阻障層,以防止/減少該金屬材料擴散進入ILD層 (130)。將蝕刻終止層(12〇)儘可能製作得薄,以保持絕 緣堆® ( 120與130)之總體低介電係數特徵,同時還提供 足夠的擴散阻障。在一示範性實施例中,蝕刻終止層(12〇) 由厚度為大約300埃至大約500埃且相對於該ilD層!278〇64, I: The same element in the shape represents the symbol with the same or similar function. The figure 丄 to 9 is the wearing view'. The example is based on the formation of the semi-conducting method. The method of the line layer: Illustrated in Figures 1 to 9 - double metal inlaid ring method, complex medium material (porogen) used to fill - layer; the quality of the sacrificial material can be easily converted into The via hole is removed (4) the porous material which damages or removes the layer/layer, as shown in the figure - the semiconductor substrate (10), which has an (interlayer dielectric) layer (1〇5) (or insulating layer) and is formed on The upper and lower interconnection lines (U0). The substrate (10) can be any semiconductor device, such as a weiqi cut into a frequency circuit. In the second exemplary implementation, the first -ILD layer (10) is formed on the semiconductor substrate (100) and a lower interconnection (11?) is formed in the ILD layer (1?5) by a damascene technique. The lower interconnect (then) may be formed of any suitable material that is typically used to form the integrated circuit conductive layer. For example, the lower interconnect may comprise a metallic material such as copper, copper alloy, aluminum, aluminum alloy, tungsten or other suitable metal or conductive material. Referring to FIG. 2, a structure of a stop layer (120) (or a barrier layer), a second ILD layer (13 〇) and a protective layer (140) (or a hard cover) are sequentially formed on the structure of FIG. Cover mask layer). The residual termination layer (I) is used as an etch stop layer for a subsequent via etch process (described below) to prevent exposure of the lower interconnect (110). The termination layer (m) also uses 13 1278064 18707pif as a diffusion barrier to prevent/reduce the diffusion of the metal material into the ILD layer (130). The etch stop layer (12 Å) is made as thin as possible to maintain the overall low dielectric constant characteristics of the Insulator Stack (120 and 130) while also providing sufficient diffusion barrier. In an exemplary embodiment, the etch stop layer (12 Å) has a thickness of from about 300 angstroms to about 500 angstroms relative to the ilD layer

〇3〇)具有高蝕刻選擇性之絕緣材料形成。舉例言之,蝕 刻終止層(120)可由 SiC、SiN、SiCN、Sic〇 或 Sic〇N 形成,且舉例言之可使用已知之技術形成。 在一示範性實施例中,ILD層(130)較佳小於約 《2之低介電係數材料形成。1〇)層(13〇)可由一有機聚 合體材料或一無機材料形成。更特定言之,ILD層(130) 可由接有碳、氟或氫原子之二氧化石夕層形成,舉例而言, Ϊ氧化石夕(Si〇C)層、Si〇CH層、氟-倍半石夕氧烧(_ 層二氣-倍半石夕氧烧(HSQ)層或甲基_倍半石夕氧烧(msq)層。 热卿何種材料被用於飯刻終止層(12〇)與肋層 , (12〇) 擇f生且/、有低;丨電係數之材料形成。 成保護層(14GX或硬遮罩層)以保護江〇層〇30) 1:水^驟中免遭知害’且用做—隨後CMP製程之-缓 衝層:^保護層⑽)利用-相對於ILD層⑴^有Ϊ 蝕刻讀性之㈣形成。舉财之 隨後所述之層形成:⑴一料…汉卓層(14〇)可由 /c.xn ^ Λ ^ 〇 、、、巴、,彖鼠化物層’諸如氮化矽層 山厌氮化物層⑸CNM氮化石朋層(顧);⑼一絕緣 石反化物層,諸如碳化石夕層(sic);㈣一金屬氣化物層,表〇3〇) An insulating material having high etching selectivity is formed. For example, the etch stop layer (120) may be formed of SiC, SiN, SiCN, Sic〇 or Sic〇N, and may be formed, for example, using known techniques. In an exemplary embodiment, the ILD layer (130) is preferably formed of a material having a low dielectric constant of less than about 2. The layer (13 Å) may be formed of an organic polymer material or an inorganic material. More specifically, the ILD layer (130) may be formed of a layer of carbon dioxide, which is bonded with carbon, fluorine or hydrogen atoms, for example, a cerium oxide (Si〇C) layer, a Si〇CH layer, a fluorine-fold Banshixi oxygen burning (_ layer two gas - sesquiter oxysulfonation (HSQ) layer or methyl _ sesquiter oxylate (msq) layer. What kind of material is used for the rice stop layer (12 〇) with the rib layer, (12〇) choose f and /, have low; the material of the electric coefficient is formed. The protective layer (14GX or hard mask layer) to protect the river layer 30) 1: water ^ In the middle of the CMP process, the buffer layer: the protective layer (10) is formed with respect to the ILD layer (1). The formation of the layer described later is: (1) a material... Hanzo layer (14〇) can be composed of /c.xn ^ Λ ^ 〇, ,, 巴, 彖 化物 layer, such as tantalum nitride layer Layer (5) CNM nitride layer (Gu); (9) an insulating stone reflector layer, such as carbon stone layer (sic); (4) a metal vapor layer, table

12780舛 °者如鼠化组(TaN)層,氮化鈦(TiO)層,氮化鶴(wn) 層或氮化鋁(A1N)層;(iv) —金屬氧化物層,諸如氧化鋁 (AL2〇3)層、氧化紐(Ta〇)層或氧化鈦(丁i〇)層;或⑺一矽 層’舉例言之,諸如SiCb或諸如SiOF與SiON之其他材 难斗。 /、 該示範性實施例製程中之下一個步驟包括於ILD層 (130)中形成一通路孔。舉例言之,如圖2中進一步之描 述:於保護層(140)上形成一 ARL (抗反射層)(144), 且形成一具有一開口(145a)之光阻圖案(145),經由開 口(145a)曝露ARL(144)之該表面之一部分。開口(14㈣ 對準下部互連線(11〇),並界用於形成如圖3中所描 述之一通路孔(150)之圖案。 參照圖3’特別地將光阻劑圖案(145)用作一蝕 罩,將一或更多獨立的蝕刻製程(147)施加至圖2之該结 構’以藉此順序地鞋刻ARL (144)、保護層⑽)與肋層° (130),以向下形成通路孔(15〇)至蝕刻終止層(1如)。 曰(130)可彻任何f知之㈣製程侧,諸如 [生乾式氧化爛製程’其適合於侧ILD層⑴◦)之該 參照圖4,在形成通路孔(15〇)之後,利用一灰化製 =(〇2或Η2電漿)或有機物剝離器除去 。其後,沉積一層犧牲材料(1 = 由一包含碰/祕⑼例’犧牲材料(則 土 t材枓14一成孔劑(造孔劑)材料之組合之 15 I2780^7p, 材料形成。更特定古 ” 無機基體材料鱼一 h ▲犧牲材料(162)較佳由一有機或 材料可自該基體材材料Γ合形成,其中該成孔劑 孔,而同時保持該A = u在絲體材料中生成若干細 稍刑H 基肢材料之結構完整性。可赫與妳2廿 成孔劑材料包含今 衣、元或丁蜣與心松油烯,其中該 10〜40%。 &quot;㊣彳㈣全部纽劑/絲材料之大約 如聚芳香醚、聚:=::(162)可由-成孔劑材料與-諸 酯基材料之“甲醋或乙稀基鱗甲基丙烯酸甲 :二_與::=== 歸狀麵料式玻璃 體、、材科中產生若干細孔或空洞之合適材料(固 可被用體賴)。諸如聚合體㈣之許多_之材料 孔劑盘且該被使用之成孔劑之類型取決於該成 孔劑材相容性。舉例言之,較佳地選擇該成 材料之熱穩:便該成孔劑材料在溫度低於該基體 了 ^疋,凰度時能熱裂解。另外,較佳地選擇該等 :铃基體材料,以便處理該犧牲材料之同時,該成孔 U材料間之相分離係:該成孔劑聚集並形成成孔劑 16 I2780UPif 材散遍佈該基體材料。 均勾間隙填充特徵以將由提供 至最小程度之材料形成。 )中二洞之形成降低 ILt ,刻特性相類似之乾式蝕刻特性。舉:::材料的該乾式 的乾式钱刻化學物,犧牲材料(:,對於-既定 比助層(_之該乾絲刻速率稍古乾2韻刻速率較佳 此保證在形成該絲_之過面所說明, 仍保留在通路孔(〗5G)巾 ^數里之犧牲材料 ,材料〇62)之該:U如下:二要:的那樣, ,成孔劑材料後,該殘留之基===料除 層⑽)之該二=濕 層ϋ 犧牲材料’將取決於形成ild 之該所需要之_選=層(13G)與犧牲材料(162)間 料;=:=!==, 、、先脸#技, 1糟田遠如$疋塗之類的方 材料料溶液施加至該基底而形成。為硬化該犧牲 嶋料之-犧牲材料(1_於該基二有= ^進一步之熱處理’以自該基體材料分離該成孔劑,並形 l278044〇7p,f 成被刀政遍佈該基體材料之成孔劑材料塊,並完全硬化該 基體材料。如下所述,實施進一步之熱處理,以 材料^去該成孔劑材料,從而形成一多孔基體材料 上當形成该犧牲材料溶液時,相對於成孔劑之數量,可 調整,體材料之數量以獲得需要之孔隙率。舉例言之,在 -示範性實施例中,犧牲材料(162)包含以重量計犧牲材 料(162)總重量大約1%至大約鄕之成孔劑材料。 /該作為例證之製程中之下一步係在ILD層(13〇)中 二溝渠區域。參照圖5,該作為例證之步驟開始係在 犧=料⑽)之該層上形成一第二狐(抗反射層) !」,Λ形成一具有一開口(185a)之第二光阻劑圖案 (一)’!由開口(185a)€露第二ARL(抗反射層)(184) 如隨後所說明’形成開口(185a)使其對準通 中开β、盖、1且開口(185a)界定一用於在肋層(130) 〒形成一溝渠之蝕刻圖案。 =圖6,將光阻劑圖案(185)用作一钱刻遮罩,藉 ί 1刻,(184)、犧牲材料(162)與1LD層⑽), 製:_以形成一溝渠(叫在-作為例 ,之方法巾,_有—㈣化學物之乾式 材Γ刻化學物適合於物成該等“之該 ^ 上所提及’選擇用於姓刻溝渠(⑽)之 D亥乾式_化學物,以便例如以比耻 連率(舉例而言)㈣犧牲材料(日、 特別地,實卿卿材料⑽ i7pif 12780¾ 製程 需要溝渠深之π (wn 絲面下形成具有一 r )。在該乾式蝕刻製程中,使殘留 之-部分之非填充區域(=)屢木〇9〇)與通路孔⑽) 參照圖7,使用一灰化製程 阻劑具選擇性之任域刻製程,除去第二光阻^圖荦f85) =8:Γ,牲材料⑽)或 之捕枓。其後,貫施自犧牲材 料之製程:以將殘留之犧牲材料⑽、16=^ 成;,’)。特別地’藉由分解被分散遍 為一多孔基體材料。如此,今將該犧牲材料轉化 體材=該基_繞;孔基 熱至施::,藉由將該犧二加 :該卿材料,從而可自該犧牲 枓。貫施加熱大約i分鐘至大約2小時。成孔劑材 另-惰性周圍環境中實施加熱 。空、氮或 材料之沸點在大約150攝氏度至 外射線施加剛刪,咖㈣^材^ 19 I2780^ipif 另—示範性實施例中,可使用-電漿處理步驟實 二亥成孔劑材料,以自該基材料分解該 、 5亥讀處理係使用—氮基電漿或氫基電漿而實施。 持盆犧牲材料(162’、162a,)以便該基體材料保 構錢性(該基體基材料保持其結構)之同時但又 ’、、、f、的係有利的。因此’當包含犧牲材料(162)之 ❹孔犧牲材料(162,)時’沒有應力施力二該 力)因此:射=於_產生之應 ILD層被知告、破裂或破壞。此外, = 多孔性導致該犧牲材料之表面積有效增 避罩Π 可更快地被除去通路孔〇50)中與硬 3=;^=4(16。,_,且_在 程度。之㈣该1LD層之損害顯著地降低至最小 在圖7中’藉由各種方法中之一,可易於除去殘留之 162a?) 〇 ? 機材料形成且1㈣⑽)由一有 j 更用微式剝離製程可除去多孔犧牲材料 a。备犧牲材料(162)為一無機SOG材料時, 在除去光阻细案(185)與ARL(i84)之後,使用一 製程可除去形成於硬遮罩層(140)上之該犧牲材料及 Ϊ:於Ϊ=(15〇)中之犧牲材料(叫如上面所提及, 學物(諸如一 HF溶液),以便以比⑧ ^ 、侍夕之速率有選擇地蝕刻該犧牲材料。舉例言12780 ° ° such as the ratification group (TaN) layer, titanium nitride (TiO) layer, nitride (wn) layer or aluminum nitride (A1N) layer; (iv) - metal oxide layer, such as alumina ( AL2〇3) layer, oxide (Ta〇) layer or titanium oxide (but) layer; or (7) one layer 'for example, such as SiCb or other materials such as SiOF and SiON are difficult to fight. The next step in the exemplary embodiment process includes forming a via hole in the ILD layer (130). For example, as further described in FIG. 2, an ARL (anti-reflection layer) (144) is formed on the protective layer (140), and a photoresist pattern (145) having an opening (145a) is formed through the opening. (145a) exposing a portion of the surface of the ARL (144). The opening (14 (4) is aligned with the lower interconnect line (11 turns) and is used to form a pattern of via holes (150) as described in Figure 3. Referring to Figure 3', in particular, the photoresist pattern (145) is used. As an etch mask, one or more separate etching processes (147) are applied to the structure of FIG. 2 to thereby sequentially engrave the ARL (144), the protective layer (10) and the rib layer (130) to A via hole (15 Å) is formed downward to the etch stop layer (1). The crucible (130) can be completely known (4) on the process side, such as [the dry-type oxidation process" which is suitable for the side ILD layer (1), which is referred to FIG. 4, after forming the via hole (15〇), using an ashing System = (〇 2 or Η 2 plasma) or organic stripper removed. Thereafter, a layer of sacrificial material is deposited (1 = 15 I2780^7p consisting of a combination of material containing the collision/secret (9) 'sacrificial material (the soil t-material 14 porogen (porogen)). The specific ancient "inorganic matrix material fish" h ▲ sacrificial material (162) is preferably formed by an organic or material from the matrix material, wherein the pore-forming agent pores while maintaining the A = u in the filament material The structural integrity of a number of fine-grained H-based limb materials is generated. The material of the hexamole and ruthenium porphyrin comprises jinyi, yuan or diced and pinentene, of which 10 to 40%. (4) All of the core/silk materials such as polyarylene ether, poly:=::(162) can be-porogen-based material and -ester-based materials of "methyl vinegar or ethylene squamous methacrylic acid A: two _ And::=== normalized fabric type glass body, suitable material for producing a number of pores or voids in the material family (solid object can be used), such as a large number of material pores of the polymer (4) and it is used The type of porogen depends on the compatibility of the porogen. For example, it is preferred to select the thermal stability of the material: The porogen material is thermally cleavable when the temperature is lower than the radix of the substrate. Further, the spheroidal material is preferably selected to treat the sacrificial material while the phase of the porch U material is Separation system: the pore former aggregates and forms a pore former. The 16 I2780UPif material is dispersed throughout the matrix material. The uniform gap filling feature is formed by the material provided to a minimum extent. The formation of the second hole reduces ILt, and the engraving characteristics are similar. The dry etching characteristics are as follows:: The dry dry-type chemical of the material, the sacrificial material (:, for - the specific ratio of the help layer (the dry silk engraving rate is slightly dry, the rhyme rate is better) In the formation of the wire, the sacrificial material remains in the via hole (〗 〖5G), the material 〇 62): U is as follows: Second, the porogen material The residue base === the material of the layer (10)) = the wet layer 牺牲 the sacrificial material 'will depend on the _ select = layer (13G) and the sacrificial material (162) required to form the ild; :=!==, ,, first face #技, 1 田田远, such as 疋 之 之 之 之 之 料Formed to the substrate to form a sacrificial material for hardening the sacrificial material (1_there is a further heat treatment of the base 2) to separate the pore former from the matrix material, and form a shape of 278,044 〇7p,f a porogen material block that is spread over the base material and completely hardens the base material. As described below, a further heat treatment is performed to remove the porogen material to form a porous matrix material. When sacrificing the material solution, the amount of bulk material can be adjusted to obtain the desired porosity relative to the amount of porogen. For example, in the exemplary embodiment, the sacrificial material (162) comprises sacrificial material by weight. (162) A porogen material having a total weight of from about 1% to about 鄕. / The next step in the illustrated process is in the second trench area of the ILD layer (13〇). Referring to Figure 5, the exemplified step begins by forming a second fox (anti-reflective layer) on the layer of the material (10), and forming a second photoresist pattern having an opening (185a). (One)'! The second ARL (anti-reflective layer) (184) is exposed by the opening (185a) as described later. 'The opening (185a) is formed such that it is aligned with the opening β, the cover, and the opening (185a) defines a The rib layer (130) 〒 forms an etched pattern of the trench. = Figure 6, the photoresist pattern (185) is used as a mask, by ί, (184), sacrificial material (162) and 1LD layer (10), to form a trench (called - As an example, the method towel, _ there-(4) chemical dry material engraving chemistry is suitable for the material to be mentioned in the "the ^" selected for the surname ditch ((10)) D Hai dry _ Chemicals, for example, to a ratio of shame (for example) (iv) sacrificial material (day, in particular, Shiqingqing material (10) i7pif 127803⁄4 process requires a trench depth of π (wn under the surface of the silk has an r). In the dry etching process, the residual-part of the unfilled area (=) is replaced by the via hole (10)) and the via hole (10). Referring to FIG. 7, an ashing process resist is used to selectively perform the engraving process to remove the The second photoresist ^ Fig. f85) = 8: Γ, the material (10) or the trap. Thereafter, the process of self-sacrificing material is applied: the remaining sacrificial material (10), 16 = ^;, '). In particular, it is dispersed by a decomposition into a porous matrix material. Thus, the sacrificial material is converted into a body material = the base_wound; the pore-based heat is applied to::, by : The material of the material, from which the heat can be applied. The heat is applied for about 1 minute to about 2 hours. The pore-forming agent is heated in an inert atmosphere. The boiling point of the air, nitrogen or material is about 150 degrees Celsius to the external ray. Applying just deleted, coffee (4) ^ material ^ 19 I2780 ^ ipif In another - exemplary embodiment, the - plasma processing step can be used to make the second porogen material to decompose from the base material, 5 Hai read processing system - Nitrogen-based plasma or hydrogen-based plasma. The potted sacrificial material (162', 162a) is held so that the matrix material is structurally friendly (the matrix-based material retains its structure) while but ',,, f The system is advantageous. Therefore, 'when the sacrificial material (162,) containing the sacrificial material (162) is used, 'there is no stress applied to the force'. Therefore, the ILD layer is detected and cracked. Or damage. In addition, the porosity causes the surface area of the sacrificial material to effectively avoid the hood and can be removed more quickly in the via hole 50) and hard 3 =; ^ = 4 (16., _, and _ in degree. (d) The damage of the 1LD layer is significantly reduced to a minimum in Figure 7 'by various methods One can easily remove the residual 162a?) The material is formed and 1(4)(10)) The porous sacrificial material a can be removed by a micro-stripping process. When the sacrificial material (162) is an inorganic SOG material, After removing the photoresist pattern (185) and the ARL (i84), the sacrificial material formed on the hard mask layer (140) and the sacrificial material in the Ϊ=(15〇) are removed using a process (called As mentioned above, the material (such as an HF solution) is used to selectively etch the sacrificial material at a rate of 8^.

20 12780%pif. 若犧牲材料(162)由—S〇G層(諸如-HSq層)步 ^-Ϊρ-Λ?〇) ^ Si〇C&quot;MBf 5 (162)^ hIdH 濕化學方形以在犧牲材料(間盘 6 (130)之該材料之間提供高選擇性。 由於該基材料中存在該等細孔 二率比除去相同的無孔基材料快 另外防㈣害!LD層⑽)。貝^低至取小程度,或 且J多層孔二:有機基材料形成, 化製程或Η2基電物用-電漿灰 :^_’,,)。當該犧\二== 可同時由在:實例中’ 料中生成細孔,則更為有效。犧牲材 :::除去該犧牲材料_成孔劑:=中在= 二:退=:uv製程。隨後實ί: 、匕3包浚處理製程及熱處理萝程。 除去多孔犧牲材料⑽,、162a,)後,該作為例證之方 I2780f 法中之η亥下步驟包括除去姓刻終止層(120)中被曝露於 通路孔(150)之該底部上以曝露下部傳導層(11〇)之該 部分。、此蝕刻製程可使用已知之技術實施,以有選擇地蝕 刻1成钱刻終止層(12〇)之材料,而不會姓刻ild層 (130)。圖8之示例圖中描述該最後所得到之結構。 其後,參照圖9,藉由用諸如銅之傳導材料填充溝渠 (190)與通路孔(15〇)而形成一上金屬互連(23〇)(雙 重金屬鑲嵌互連)。更特定言之,在—示範性實施例中,形 成上互連結構(23Q)之—方法包括於溝渠(190)與通路 = (=〇)之該等側壁上形成一共形阻障層(2〇〇)。在一示 範f生只轭例中,阻障層(2〇〇)可使用一濺射澱 以用諸如™或之㈣(舉例言之)形成一厚度為成大 至大約立500埃之阻障層。其後,一層傳導材料被沉 二阻障層(2〇〇)上方,以用傳導材料填充該通路 CMP) ^溝渠(19〇),且然後實施一平坦化(舉例而言, Mdn/ϋ向下平域該結狀魏面至該硬遮罩層 一金屬)線^此完成形成具有—雙重金屬鎮嵌結構(2〇3)之 由第亡之該等示例性方法被稱為_(經 單分“ ^欠步驟)’該VFDD使用一 SLR (阻礙 (之WDD聊步驟,犧牲材料 料。在# ^ / 4與成孔·合之錢或無機材 示範性實施例中,將參照圖叫8 = 料作相歡圖表料―WDDM ^ 22 I2780^ipif 驟)。利用該示例性方法,該犧 成,以在侧製程中用作光阻劑。現首:有機基體材料形 述,示例財法,但吾人應瞭解;圖圖Γ8描 所4田述之該等示例性方法+ ^ &quot; 2與3 處理步驟之前的處理:驟 ==、—10開始之該等 參照圖10,在形成通路孔(15〇)(例 犧: 料組合之基體材料,且提供Μ 成孔劑材 ㈣料⑽中空洞的形成降低至】==;以= 貫施例中,犧牲材料(262)之基 ;乾性 例,Α 成。如利用上述之該等示範性實施 式€ = 季父圖10與圖4中之示例性之圓主 :形在成:犧?,(, 在此不乾性貫施例中,借藤 :犧如下面(圖15)將要說明,在-隨後之二 層犧牲_ (262)用作—餘刻遮罩。曼之_衣私中將 (28f照圖12,於層犧牲材料(262)上形成一硬遮罩層 ⑵2)。硬遮罩層(282)可為二氧切層、氮切層、碳 23 !278〇^4 I87i)7pif 化石夕層、SiON、SiCN、SiOCN、Ta、TaN、Ti、TiN、Al2〇3、 BQ、HSQ。選擇形成硬遮罩層(282)之材料,以使其相 對於犧牲材料(262)具有一高蝕刻選擇性。 參照圖12,於硬遮罩層(282)上形成一 ARL (抗反 射層)’且形成一具有一開口(285a)之光阻劑圖案(285), 經由開口(285a)曝露ARL (抗反射層)(284)之表面之一部 刀。形成開口(285a),使其對準通路孔(150),且開口(285a)20 12780% pif. If the sacrificial material (162) consists of -S〇G layer (such as -HSq layer) step ^-Ϊρ-Λ?〇) ^ Si〇C&quot;MBf 5 (162)^ hIdH wet chemical square at the expense The material (intermediate disk 6 (130) provides high selectivity between the materials. Since the presence of such pores in the base material is faster than removing the same non-porous base material, it is additionally protected against the LD layer (10)). The shell is low to a small extent, or J multilayer hole 2: organic-based material formation, chemical process or Η2-based electrical material - plasma ash: ^_',,). It is more effective when the sacrifice \ two == can be simultaneously generated by the pores in the : instance. Sacrificial material ::: Remove the sacrificial material _ pore forming agent: = medium in = two: retreat =: uv process. Subsequent to the actual: 匕, 匕 3 package processing process and heat treatment. After removing the porous sacrificial material (10), 162a, </ RTI>, the exemplifying method of the I2780f method includes removing the bottom portion of the surname stop layer (120) exposed to the via hole (150) to expose the lower portion. This portion of the conductive layer (11〇). The etching process can be carried out using known techniques to selectively etch the material of the stop layer (12 Å) without the surname of the ild layer (130). The resulting structure is depicted in the example diagram of FIG. Thereafter, referring to Fig. 9, an upper metal interconnection (23 〇) (double damascene interconnection) is formed by filling the trench (190) with the via hole (15 〇) with a conductive material such as copper. More specifically, in the exemplary embodiment, the method of forming the upper interconnect structure (23Q) includes forming a conformal barrier layer on the sidewalls of the trench (190) and the via = (= 〇) (2) 〇〇). In an exemplary yoke example, the barrier layer (2 turns) may use a sputter lake to form a barrier having a thickness of up to about 500 angstroms, such as TM or (d) (for example). Floor. Thereafter, a layer of conductive material is overlying the barrier layer (2〇〇) to fill the via CMP) with a conductive material (19〇), and then a planarization is performed (for example, Mdn/ϋ The lower flat domain of the knotted divergent surface to the hard mask layer of a metal) line is formed to form a double metal intercalation structure (2〇3). The exemplary method is called _ (single order) Sub-"^ owing step" 'The VFDD uses an SLR (obstruction (the WDD chat step, sacrificial material material. In #^ / 4 with the hole or the money or inorganic material exemplary embodiment, will refer to the figure called 8 = 料 图表 ― ― WDDM ^ 22 I2780 ^ ipif )). Using this exemplary method, the sacrifice, used as a photoresist in the side process. However, we should understand; Figure Γ8 describes the exemplary methods of the method of the field + ^ &quot; 2 and 3 before the processing step: the beginning of the step ==, -10, see Figure 10, in the formation of the path Hole (15〇) (Example: the base material of the material combination, and the Μ pore forming agent (4) material (10) hollow hole formation is reduced to 】 ==; In the embodiment, the base of the sacrificial material (262); the dry example, the enthalpy. If the exemplary embodiments of the above formula are used, the exemplary circle in the figure 10 and the figure 4 is in the form of a figure: ?, (In this case of non-dryness, by the vine: sacrifice as below (Figure 15) will be explained, in the next two layers of sacrifice _ (262) used as - the residual mask. Lieutenant (28f according to Fig. 12, a hard mask layer (2) 2 is formed on the layer sacrificial material (262). The hard mask layer (282) may be a dioxic layer, a nitrogen cut layer, a carbon 23!278〇^4 I87i) 7pif fossil layer, SiON, SiCN, SiOCN, Ta, TaN, Ti, TiN, Al2〇3, BQ, HSQ. The material of the hard mask layer (282) is selected to be made relative to the sacrificial material (262). Having a high etch selectivity. Referring to Figure 12, an ARL (anti-reflective layer) is formed on the hard mask layer (282) and a photoresist pattern (285) having an opening (285a) is formed through the opening (285a) A blade that exposes the surface of the ARL (anti-reflective layer) (284). An opening (285a) is formed to align the via hole (150), and the opening (285a)

界定一用於在ILD層(130)中形成一溝渠區域之蝕刻圖 案0 參照圖13,將光阻劑圖案(285)用作一鞋刻遮|, 順序蝕刻ARL (284)之該等部分與藉由開口(285a)所曝露 之硬遮罩層(282),從而實施一個或多個蝕刻製程(3〇7), 藉此使硬遮罩層(282)形成圖案。在—示範性實施例中, 貫祕刻製程(307),以便使用—單_製雜刻該等層 :,(282)。在另一示範性實施例中,為每一該等層 )契(282)使用獨立之侧製程實施侧製程(3〇7), 二L=284)例如為有機材料且硬遮罩層_例如為 以在一既定時段實施—第二_製程即), 以蝕刻猎由開口(285a)所曝露之犧牲 學物導致: 一。在一具體實==圖案(-)與 麵廳之_氣體,使用—乾式_製程實施第二= 24 I278〇t 刻製程(317)。 如圖14所描述,實施第二㈣製程(3 :犧,才料⑽a)至通路孔(51〇)中之一水平,該3 f,要之溝渠水平相同或比其更低。利用該示例性钕刻 、王(7) ’曝露形成圖案之硬遮罩層(282)。 形成圖案之硬遮罩層(282)與犧牲材 &gt;,&quot; )用作一蝕刻遮罩,蝕刻保護層(140)之該等 =料分與ILD層⑽)以形成一溝渠_ 伴1^二_製程(327)。在該示範性實施例中,侧 ⑽)之與ILD層⑽)該等被曝露部分, f層⑴〇)之頂表面下方形成溝渠⑽)至一需要水Defining an etched pattern 0 for forming a trench region in the ILD layer (130). Referring to Figure 13, the photoresist pattern (285) is used as a shoe mask, and the portions of the ARL (284) are sequentially etched. One or more etching processes (3〇7) are performed by the hard mask layer (282) exposed by the opening (285a), thereby patterning the hard mask layer (282). In the exemplary embodiment, the process is etched (307) to scribe the layers using a single-pattern: (282). In another exemplary embodiment, a separate side process is implemented for each of the layers (282) using a separate side process (3〇7), two L=284) such as an organic material and a hard mask layer _ In order to implement in a given period of time - the second process is to etch the hunting material exposed by the opening (285a): 1. The second = 24 I278〇t engraving process (317) is performed using a dry-process in a concrete == pattern (-) and a chamber. As depicted in Figure 14, a second (four) process (3: sacrifice, material (10) a) is performed to one of the via holes (51 〇), which is the same or lower level. A patterned hard mask layer (282) is exposed using the exemplary engraving, king (7)&apos;. The patterned hard mask layer (282) and the sacrificial material &gt;, &quot;) are used as an etch mask to etch the protective layer (140) and the ILD layer (10) to form a trench _ 1 ^ 二_Process (327). In the exemplary embodiment, the side (10)) and the ILD layer (10) are formed by the exposed portion, the bottom layer of the f layer (1) is formed with a trench (10) to a desired water.

士料ί—示例性方法中,使用一相對於犧牲材料(262)而 罩層(282)、保護層⑽)與μ層⑴〇) 刻化學物實施㈣(327)。如此,以一 層(】=料ί262)快得多之速率钱刻保護層(140)與ILD 罩層㈤;===:)上之犧牲層(262)在硬遮 γηλ. ^ d掉後用作一蝕刻遮罩,且以便在通路孔 刻坆^部内的犧牲材料不被過度則,藉此保護姓 ϋ (12G)與下部互連線(關杨露至紐刻空 程心二ί二。圖6中所描述’在此蝕刻製程027)過 範I刻掉—數量相對較小之犧牲材料(臟)。在-示 =例中,利用一採用CXFy卿摩 -之乾式蝕刻製程實施蝕刻製程。 7pif 12780¾ 士 f照圖16’當用上述參照圖7之該示例性方法步驟 時,實施一製程,自殘留之犧牲材料(262、262a)除去成孔 劑材料,以將犧牲材料(262,262a)轉化為一多孔基體材料 (262 ' 262a’)。特別地,藉由分解該被分散遍佈於該基體 材料之成孔劑材料的穴/區域(p〇ckets/regi〇ns),犧牲材料 (26^2、262a)被轉化為多孔基體材料(262,、262a,),以藉此 基體材料中生成若干細孔或空洞。如此,將該犧“ 匕成—多孔基體材料,其中該基體為—環繞被散佈之 空隙/細孔之固相。 斜夕^所提及’藉由加熱該犧牲材料至高於該成孔劑材 犧牲材該基材料分解該成孔劑材料,從而可自該 ,牲^杨去該成孔㈣料。加熱持續讀丨分鐘至2小 ““if或氮環境中實施加熱。在n&amp;f _ t, 之彿點在大約150攝氏度至小謂攝氏度 可將^_。在具體實施财,加_犧牲材料時, 料助除去該成孔劑材 製程自該乾性貫施例中’可使用一電漿處理 劑材料Ί 孔劑材料’從而實施除去該成孔 通路孔々漿或氫基電漿實施該電漿處理。 基體材料牲材料(262a,)保持其結構完整性(該 050)之多孔^/把、、°但孔較多係有利的。因此,通路孔 壁表面增ΓΐΓΖ)不對通路孔(150)中該1ld層之側 產生之應力?卜由於如該傳統過㈣ 力)此外,该多孔結構有效地增加了犧牲材料之In the exemplary method, a mask (282), a protective layer (10), and a μ layer (1) are used to perform a chemical (4) (327) with respect to the sacrificial material (262). Thus, the sacrificial layer (262) on the protective layer (140) and the ILD cover layer (5); ===:) at a much faster rate (1) = material 262) is used after the hard mask γηλ. ^ d An etch mask is formed, so that the sacrificial material in the via hole is not excessive, thereby protecting the surname (12G) and the lower interconnect (Guan Yanglu to New Zealand). The "etching process 027" depicted in Figure 6 is etched away - a relatively small amount of sacrificial material (dirty). In the example of - shown, the etching process is performed using a dry etching process using CXFy. 7pif 127803⁄4 士在照图16' When using the exemplary method steps described above with reference to Figure 7, a process is performed to remove the porogen material from the residual sacrificial material (262, 262a) to sacrifice the material (262, 262a) Converted to a porous matrix material (262 '262a'). In particular, the sacrificial material (26^2, 262a) is converted to a porous matrix material by decomposing the pockets/regions of the porogen material dispersed throughout the matrix material (262). , 262a,) to thereby form a number of pores or voids in the matrix material. In this way, the sacrificial-porous matrix material, wherein the substrate is a solid phase surrounding the dispersed void/pores. As mentioned, by heating the sacrificial material above the pore-forming agent The base material decomposes the porogen material so that it can be used to make the hole (four) material. Heating is continued for 丨 minutes to 2 hours "" or nitrogen is applied to heat. In n&amp;f _ t, the Buddha's point is about 150 degrees Celsius to a small degree Celsius can be ^_. In the specific implementation of the financial, plus _ sacrificial materials, the material to help remove the pore-forming agent process from the dry example of the application of a The slurry treating agent material Ί pore material 'and thereby performing the plasma treatment to remove the pore-forming via hole slurry or hydrogen-based plasma. The matrix material (262a,) maintains its structural integrity (the 050) of the porous ^ /, ,, °, but more holes are advantageous. Therefore, the surface of the via hole wall is increased.) The stress generated on the side of the 1d layer in the via hole (150) is due to the conventional (four) force. The porous structure effectively increases the sacrificial material

26 127 轉 7plf 表面積,使得更易於除去多孔材料(262,,262a,),因此在除 去通路孔(150)中之多孔材料(262a,)時,將對該ILD層 之損害顯著地降低至最小程度。 其次,參照圖17,除去殘留之多孔犧牲材料(262,、 262a’),以曝露通路孔(150)中之蝕刻終止層(12〇)。萨由 各種方法中之一可谷易地除去该多孔犧牲材料。舉例古 之,當多孔犧牲材料(262,、262a,)包含一有機基材料且IL^ 層(130)由一無機材料形成時,使用具有一蝕刻化學物之 任何合適的钱刻製程(舉例而言,一濕式剝離步驟)可除 去多孔犧牲材料(262,、262a,),#中選擇該飿刻夢程使立 =巧牲材料⑽,、麻,}與ILD層⑽〕之該材料間 楗仏南运擇性。此外,由於該基材料中存在該等 導,該犧牲材料之速度比相同的無孔基 孔美材制侧_侧溶液/4财轉透進該多 …該細中存在該等細孔有效地增 =犧^料速度之增加使得除去該多孔犧'J而 有效,將_ ILD層(13G)之損* _夬速而 另外防止了對該ILD層⑽之^牛低至取小程度,或 的下二2,、262a,)後,該示例性方法 技術實施該钱剩_、 ' ^ )使用已知之 )之材枓,而不钱刻ILD層⑽)。圖7之示娜 27 1278064 1^7(57pif 圖表描述最後所得到之結構。 , 其後,參照圖18,藉由用諸如銅之傳導材料埴充包含 溝朱(190)與通路孔(150)之全部區域(2 ,上金屬互連(330)(雙重金屬鑲嵌互連)。更特定古=烕一 一示範性實施例中,形成上互連結構(230) ^二;=勺在 於溝渠(190)與通路孔(150)之該等側壁上形成二$ 阻障層(3〇〇)。在一示範性實施例中,舉例言之,用^者^ _ 施&lt; TaN之材料,使用-騎殿積步驟形成阻障層 (300),以形成一厚度大約50埃至5〇〇埃之阻障層。其後曰, 於該共形阻障層(300)上方沉積一層傳導材料,以用該傳 導材料填充通路孔(150)與溝渠(190),且然後實施二平 坦化製程(舉例而言,CMP)將該結構之上^面二;平坦 化至硬遮罩層(140),因此完成形成具有一雙重金屬镶嵌 結構(330)之一金屬線層。 ^ 儘管此處參照該等附圖已描述了若干示範性實施例, 吾人應瞭解本發明並不偈限於此處所描述之該等示範性實 &gt; 施例,熟習此項技術者可容易地進行其他各種變化與更 改,而不偏離本發明之精神與範圍。如該等所附專利申請 範圍所界定,所有此等變化與更改皆被包括於本發明之^ 圍内。 【圖式簡單說明】 圖1至9為橫斷面視圖,其舉例說明一根據本發明之 若干示範性實施例之用於形成一半導體裝置之金屬線層之 方法。 28 I278〇64Plf 圖10至18為橫斷面視圖,其舉例說明一根據本發明 之另一示範性實施例之用於形成一半導體裝置之金屬線層 之方法。 【主要元件符號說明】 100 半導體基底 105 ILD (層間介電)層 110 下部互連線 120 蝕刻終止層26 127 to 7plf surface area makes it easier to remove the porous material (262, 262a,), so the damage to the ILD layer is significantly reduced to a minimum when the porous material (262a) in the via hole (150) is removed. degree. Next, referring to Fig. 17, the remaining porous sacrificial material (262, 262a') is removed to expose the etch stop layer (12 Å) in the via hole (150). The porous sacrificial material can be easily removed by one of various methods. For example, when the porous sacrificial material (262, 262a,) comprises an organic based material and the IL^ layer (130) is formed of an inorganic material, any suitable engraving process having an etch chemistry is used (for example That is, a wet stripping step) can remove the porous sacrificial material (262, 262a,), and select the material between the engraving and the material of the ILD layer (10), the hemp, and the ILD layer (10). Minnan is selective. In addition, due to the presence of the isotropic material in the base material, the velocity of the sacrificial material is higher than that of the same non-porous base pore material side-side solution/4% turn-in. The increase in the speed of the material makes it effective to remove the porous layer, and the damage of the _ILD layer (13G) is _ idling and additionally prevents the ILD layer (10) from being low to a small extent, or After 2, 2, 262a,), the exemplary method technique implements the remaining _, '^) using the known material, without the IOD layer (10). Figure 7 shows Na Na 27 1278064 1^7 (57pif diagram depicts the resulting structure. Thereafter, referring to Figure 18, by using a conductive material such as copper to fill the trench (190) and the via hole (150) All areas (2, upper metal interconnects (330) (dual damascene interconnects). More specific ancient = 示范 一 示范 示范 示范 示范 形成 形成 形成 上 上 上 上 上 上 上 上 上 = = = = = = = = = = = = = 190) forming a barrier layer (3〇〇) on the sidewalls of the via hole (150). In an exemplary embodiment, for example, using the material of the ^T_T&T; a step of forming a barrier layer (300) to form a barrier layer having a thickness of about 50 angstroms to 5 angstroms. Thereafter, a conductive material is deposited over the conformal barrier layer (300). The via hole (150) and the trench (190) are filled with the conductive material, and then a planarization process (for example, CMP) is performed to planarize the structure; planarization to the hard mask layer (140) Thus completing the formation of a metal line layer having a dual damascene structure (330). ^Although several references have been made herein with reference to the drawings The present invention is not limited to the exemplary embodiments described herein, and various other changes and modifications can be readily made by those skilled in the art without departing from the spirit of the invention. And all such changes and modifications are included in the scope of the invention as defined in the appended claims. FIG. 1 to FIG. 9 are cross-sectional views illustrating A method for forming a metal line layer of a semiconductor device in accordance with several exemplary embodiments of the present invention. 28 I278〇64Plf FIGS. 10 through 18 are cross-sectional views illustrating another exemplary embodiment in accordance with the present invention. A method for forming a metal line layer of a semiconductor device of the embodiment. [Main element symbol description] 100 semiconductor substrate 105 ILD (interlayer dielectric) layer 110 lower interconnection line 120 etch stop layer

130 第二 ILD 層 140 保護層 144 ARL (抗反射層) 145 光阻劑圖案 145a 開口 147 蝕刻製程 150 通路孔 162 犧牲材料 162a’ 犧牲材料 162’ 多孔犧牲材料 184 第二ARL (抗反射層) 185 第二光阻劑圖案 185a 開口 190 溝渠 195 非填充區域 200 阻障層 29 I2780f 262 262a ^ 262b • 282 284 285 290 295 •327 犧牲材料 犧牲材料 犧牲材料 硬遮罩層 ARL(抗反射層) 光阻劑圖案 溝渠 全部區域 第三蝕刻製程130 second ILD layer 140 protective layer 144 ARL (anti-reflective layer) 145 photoresist pattern 145a opening 147 etching process 150 via hole 162 sacrificial material 162a' sacrificial material 162' porous sacrificial material 184 second ARL (anti-reflective layer) 185 Second photoresist pattern 185a opening 190 trench 195 unfilled region 200 barrier layer 29 I2780f 262 262a ^ 262b • 282 284 285 290 295 • 327 sacrificial material sacrificial material sacrificial material hard mask layer ARL (anti-reflection layer) photoresist Third pattern etching process for all regions of the pattern pattern trench

Claims (1)

I27mpif 十、申請專利範圍: L —種形成互連結構之方法,其包含: 底上導體基底上形成一侧終止層,該半導體體基 低上办成有一下部傳導層; 在該蝕刻終止層上形成一ILD (層間介電)層. 形成—穿過該ILD層之通路孔’以曝露該蝕二级 之一部分,該通路孔對準該下部傳導層之一部分、、&quot; 料二===通路孔’該犧牲“含-基材 在该ILD層中形成一與該通路孔對準之溝渠· 化為除去該成孔劑材料,以將該:牲材料轉 之該基=該多孔犧牲材料包含具有細孔於其中 層之通路孔中之多孔犧牲材料,以曝露該侧終止 法 ,去該蝕刻終止層被曝露的部分;以 2藉:才料填充該溝渠與通路孔形成一互連。 ,苴中ΐ 1項所叙軸錢結構之方 法 苴中使用Κ二弟1項所迷之形成互連結構之方 j使用灰化製輕除去該多 4.如申請專利範園第】 犧牲材枓。 法,其中自該犧牲材料除去談^迷之形成互連結構之方 材料至高於該犧牲材料之&quot;㈣材料包括加熱該犧牲 ’以自該基材料分解該成 31 12780絲pif. 孔劑材料。 5·如申凊專利範圍第4 法,其中實施加熱約1分鐘至約2 3形成互連結構之方 6·如申睛專利範圍第4 ' 法,其中在一真 产=之形成互連結構之方 7.如申料職=加熱。 法,其中該成孔劑材料之該輪斤,形成互連結構之方 400攝氏度左右之範圍内。’ $ 150攝氏度至小於 法,之形成互連結構之方 外線。 3力熱該犧牲材料時對該犧牲材料施加紫 法,9其中^^=第1項所述之形成互連結構之方 料分解該成孔劑材料包合應用—電漿處理自該基材 法之形成互連結構之方 如申言主‘:水t風基笔聚實施該電漿處理。 法,其中兮二^域第1項所述之形成互連結構之方 U ,基麵含-有機材料。 方法,其中今二1耗圍# 11項所述之形成互連結構之 丙烯酸甲自旨美 +匕3 ♦方香醚基材料、一聚甲基 14· 乙綱甲基丙稀酸醋基材料。 申请專利範圍第1項所述之形成互連結構之方 32 I2780647Pif 法,其中該犧牲材料之基材料包含—無機材料。 15·如申請專利範圍第14項所述之來点 方法,其中該無機材料為一 S〇G (旋塗式破璃)材料結構之 、16·如申請專利範圍第15項所述之形成 方法,其中该SOG材料包含一 HSq (氫化仵 °之 材料或一 MSQ(曱基倍半矽氧烷)基材料。夕虱烷)基 17·如申請專利範圍第丨項所述之 法’其中該犧牲材料包含以重量計佔該犧 1 %至約70%之該成孔劑材料。 “里、、、勺 18·如申請專利範圍第^員所述之形成互 法,其進-步包含於該ILD層上形成—㈣層。、、。 法:中第1項所“連結構之方 上形孔側壁及該下部傳導層之被曝露部分 在遠共形阻I1早層上沉積一層傳導纟士 料填充該祕孔與溝渠;以及傳&amp;材枓,賤該傳導材 平坦化該層傳導材料。 20·如申請專利範圍第i項所述 法,其中形成該通路孔包括: ^ 形成一 AR (抗反射)層; 於该AR層上形成一光阻劑圖案. 案用作1刻遮伽該AR層 與该ILD層而形成該通路孔;以及 33 12780紈pif 除去該光阻劑圖案與該AR層。 21. 如申請專利範圍第1項所述之形成互連結構之方 ' 法,其中形成該溝渠包含: 4 形成一 AR (抗反射)層; 於該AR層上形成一光阻劑圖案;以及 . 藉由將該光阻劑圖案用作一蝕刻遮罩來蝕刻該AR 層、該犧牲層與該ILD層而形成該溝渠。 22. 如申請專利範圍第1項所述之形成互連結構之方 法,其中形成該溝渠包含: 形成一硬遮罩圖案; 向下除去藉由該硬遮罩圖案所曝露之犧牲材料至該 , ILD層之一表面下方大約至少一預定溝渠水平; 藉由向下蝕刻該ILD層至該預定溝渠水平而形成該溝 渠; 將該硬遮罩圖案用作一蝕刻遮罩;以及 除去該硬遮罩圖案。 • 23.如申請專利範圍第22項所述之形成互連結構之 方法,其中形成該硬遮罩圖案包含β· 形成一硬遮罩層; 在該硬遮罩層上形成一 AR (抗反射層)層; 在該AR層上形成一光阻劑圖案;以及 藉由將該光阻劑圖案用作一 I虫刻遮罩钱刻該AR層、 該硬遮罩層而形成該硬遮罩圖案。 24.如申請專利範圍第22項所述之形成互連結構之 34 I278〇^〇7pif 同時 二u進一步包含除去該光_圖 除去猎由該硬遮罩圖案所曝露之犧牲材料層 25·如申請專利範圍第22 方法,其中儀刻該助相形成該2之形成互連結構之 層圖案。 X/冓本之時除去該硬遮罩 26·如申請專利範圍第23 方法,其中該硬遮罩層包含二氧化2之形成互連結構之 石夕層、SiON、SiCN、SiOCN、Ta τ Χΐ曰、亂化石夕層、碳化 BQ、HSQ其中之一,士一4壬α’aN、Ti、丁iN、Al203、 高蝕刻選擇性之材料。5 一目對於該犧牲材料而言具有 、27·如申請專利範圍第丨項所 法,其中該钱刻終止層由氮化石夕、石山〜$成互連結構之方 形成,且其相對於該Μ層具有‘石 =lCN或其組合 28.如申請專利範圍第!項^擇性。 二其中該ILD層包含_低介電係數材:成== 方法::其:撕 —種形成半導體裝置之方: 在—半導體基底上之一介電居中包含: 用—犧牲材料埴充m形成一通路孔; 料與-成孔劑材料之=通路孔,該犧牲材料包含一基; 35 1278064 187〇7pif 化為-=::去;多=:-_牲材料轉 尹之該基材料4及^孔她材料包含具有細孔於ί 中之,多孔犧牲材料。 、 申明專利範圍第31項所 之方法’其中該犧牲 材=之形成半導體裝置 如申請專利範有機材料。 之方法,其中該有機材料為—^半導體裳置 34.如申請專利範圍第%項所述材料。 之方法,其中該S〇P材料包含—聚芳香_^ 置 基丙:酸Γ;基或;乙烯基,基__材;Γ 之方法,其中言形成半導體裝置 之方法,其中該無機材料為—S0G(旋裳置 37. 如中請專鄕_36項=才二斗。 之方法,其中該SOG材料包含__ 裝置 基材料或一 MSQ (甲基倍半石夕氧院)基材=切钱) 38. 如申請專利範圍第31項所述 之方法= 犧,包含以重量計佔該犧以 量約1%至約70%之成孔劑材料。 可才十〜重 39. 如申請專利範圍第31項所述 之方法’其中使用一濕式剝離製程除去該‘孔犧置 4〇.如申請專利範圍第M項所述之形成半導體裝置 36 i2780fei7pif · 41 士、灰化製程除去該多孔犧牲材料。 1.如申睛專利範圍帛31項所 之方法,其中自該犧牲材 广+ 衣置 犧牲材料至—高於該犧牲材料=孔3料包括加熱該 該成孔劑材料。 /弗2,以自該基材料分解 42·如申請專利範圍第41馆 之方法,其中加埶持# 項所述之形成半導體裝置 心、T加熱持績約1分鐘至約2小時。 43·如申請專利範圍第41馆%、+、 之方法,苴中名吉处四 項所述之形成半導體裝置 44 :由二環境或氮環境中實施加敎。 之方法範圍第41項所述之形成半導體f置 《方法,其巾該纽崎料 斜W衣置 約4〇〇攝氏度之範圍内。 ”、、、、50攝氏度至小於 45·如申請專利範圍第41 之方法,其進一步包含加執生^^形成半導體裝置 加紫外線。 義牲材枓&amp;對該犧牲材料施 46·如申請專利範圍第31 之方法,其中除去該成孔劑材 '=之形成半導體裝置 基材料分解該成孔劑材料。、匕3應用—電漿處理自該 47.如申請專利範圍第46項 之方法,其巾細—氮基電^基辭導體裝置 復如申請專利範圍第3电水貫施該電漿處理。 之方法,其中該介電層包含介形成半導體裝置 於約4.2。 兒係數材料,其中k小 仍·如申請專利範圍第3 、斤述之形成半導體裝置 I278〇647pif 之方其中實施該方法用於構造-雙重金屬鑲嵌互連。 U•一種形成半導體裝置之方法,其包含: 在半導體基底上形成一下部傳導層;以及 屬 鑲嵌接至該下部傳導層之—接觸部分之雙重金 其中形成該雙重金屬鑲嵌互連包含: 部傳i層成—通路孔’其中該通路孔對準該下 料與孔’該犧牲材料包含-基材 除去該通路孔中該多孔犧牲材料;以及 用傳導材料填充該通路孔。 之方二第50項所述之形成半導_ 二該雙重:屬鑲:^ 38I27mpif X. Patent Application: L. A method for forming an interconnect structure, comprising: forming a side termination layer on a conductor substrate on a bottom, the semiconductor body base having a lower conductive layer on the lower substrate; on the etch stop layer Forming an ILD (interlayer dielectric) layer. Forming a via hole through the ILD layer to expose one of the etched secondary portions, the via hole being aligned with a portion of the lower conductive layer, &quot; The via hole 'the sacrificial'-containing substrate forms a trench in the ILD layer aligned with the via hole, and is formed to remove the porogen material to transfer the material to the substrate = the porous sacrificial material A porous sacrificial material comprising pores in the via holes of the layer is exposed to expose the side termination method to the portion where the etch stop layer is exposed; and the trench is filled to form an interconnection with the via hole. , 苴中ΐ 1 method of the structure of the axis of money, the use of the second brother of the second brother to form the interconnection structure j to use the graying system to remove the more 4. For example, the application of the patent garden枓. Law, from which the material of sacrifice The material that forms the interconnect structure to the higher than the sacrificial material includes: heating the sacrificial ' to decompose the material into 31 12780 filament pif. pore material from the base material. The fourth method of the range, wherein the heating is performed for about 1 minute to about 23 to form the interconnecting structure. 6. For example, the fourth patent of the scope of the patent application, wherein one of the real structures forms the interconnection structure. Material = heating. The method, wherein the pin of the porogen material forms a square of about 400 degrees Celsius. '150 degrees Celsius to less than the law, forming the outer line of the interconnect structure. Applying a purple method to the sacrificial material when the sacrificial material is heated, wherein the material forming the interconnect structure described in item 1 decomposes the porogen material inclusion application-plasma treatment from the substrate method The method of forming the interconnection structure is as follows: the main body of the invention: the water-based wind-based pen is integrated to implement the plasma treatment. The method, wherein the square U of the interconnection structure described in the first item of the second domain contains the organic material. Method, wherein the present invention forms an interconnection structure as described in Item #11 Acrylic acid from the United States + 匕 3 ♦ aryl ether-based material, a polymethyl 14 · ethyl methacrylate vine-based material. Patent application scope 1 to form the interconnection structure of the party 32 I2780647Pif method The base material of the sacrificial material comprises an inorganic material. The method according to claim 14, wherein the inorganic material is a S〇G (spin-coated glass) material structure, 16 The method of forming according to claim 15, wherein the SOG material comprises a HSq (hydrogenated ruthenium material or an MSQ (fluorenyl sesquioxane) based material. The method of claim </ RTI> wherein the sacrificial material comprises from 1% to about 70% by weight of the porogen material. "Li,,, spoon 18" as described in the patent application scope of the formation of the mutual method, the further step is included in the ILD layer to form - (four) layer.,. Method: the first item in the "connection structure The exposed side wall of the upper hole and the exposed portion of the lower conductive layer deposit a layer of conductive scorpion material on the early layer of the far conformal resistance I1 to fill the secret hole and the ditch; and pass the &amp; This layer of conductive material. 20. The method of claim i, wherein the forming the via comprises: forming an AR (anti-reflection) layer; forming a photoresist pattern on the AR layer. The via layer and the ILD layer form the via hole; and 33 12780 纨pif removes the photoresist pattern and the AR layer. 21. The method of forming an interconnect structure according to claim 1, wherein the trench comprises: forming an AR (anti-reflection) layer; forming a photoresist pattern on the AR layer; The trench is formed by etching the AR layer, the sacrificial layer and the ILD layer by using the photoresist pattern as an etch mask. 22. The method of forming an interconnect structure of claim 1, wherein forming the trench comprises: forming a hard mask pattern; downwardly removing the sacrificial material exposed by the hard mask pattern thereto, At least one predetermined trench level below a surface of one of the ILD layers; the trench is formed by etching the ILD layer down to the predetermined trench level; using the hard mask pattern as an etch mask; and removing the hard mask pattern. The method of forming an interconnect structure according to claim 22, wherein the hard mask pattern is formed to include β· to form a hard mask layer; an AR is formed on the hard mask layer (anti-reflection) a layer); forming a photoresist pattern on the AR layer; and forming the hard mask by using the photoresist pattern as an I-etch mask to engrave the AR layer, the hard mask layer pattern. 24. Forming an interconnect structure as described in claim 22, I 278 〇 〇 p p p p p p p 进一步 进一步 进一步 进一步 进一步 p p p p p p p p p p 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲 牺牲The method of claim 22, wherein the auxiliary phase is formed to form a layer pattern of the interconnect structure. The hard mask is removed at the time of X/冓. The method of claim 23, wherein the hard mask layer comprises a layer 2 of an interconnect structure of dioxide dioxide, SiON, SiCN, SiOCN, Ta τ Χΐ One of the enamel, chaotic layer, carbonized BQ, HSQ, Shiyi 4壬α'aN, Ti, butyl iN, Al203, high etching selectivity material. [1] The first item has a method for the sacrificial material, and the method according to the third aspect of the patent application, wherein the money stop layer is formed by a side of a nitride rock, a rock mountain, and an interconnect structure, and is opposite to the crucible. The layer has 'stone=lCN or a combination thereof. 28. As claimed in the patent scope! Item selection. Second, the ILD layer comprises a low dielectric constant material: == method:: it: tear-forming the semiconductor device side: one of the dielectric substrates on the semiconductor substrate comprises: forming a m-filled material with a sacrificial material a via hole; a material and a porogen material = via hole, the sacrificial material comprises a base; 35 1278064 187 〇 7pif is converted to -=:: go; more =: - _ material is transferred to the base material 4 And the hole her material contains a porous sacrificial material with pores in it. A method of claim 31, wherein the sacrificial material is formed into a semiconductor device such as a patented organic material. The method wherein the organic material is a semiconductor wafer 34. The material as recited in claim 0.001. The method, wherein the S〇P material comprises a method of forming a semiconductor device, wherein the inorganic material is a method of forming a semiconductor device; —S0G (Spinning 37. If you want to specialize in _36 items = only two buckets. The method, wherein the SOG material contains __ device base material or a MSQ (methyl sesquivalent stone base) substrate = Cut money) 38. The method described in claim 31 of the patent scope = sacrificial, comprising from about 1% to about 70% by weight of the porogen material. The method of claim 31, wherein the method of claim 31 is used in which a wet stripping process is used to remove the hole. 4. The semiconductor device 36 i2780fei7pif is formed as described in claim M. · The 41 士, ashing process removes the porous sacrificial material. 1. The method of claim 31, wherein the sacrificial material from the sacrificial material + to the sacrificial material is higher than the sacrificial material = the hole material comprises heating the porogen material. / 弗 2, to decompose from the base material 42. The method of claim 41, wherein the formation of the semiconductor device described in the item #, T heating performance of about 1 minute to about 2 hours. 43. If the method of applying for the patent scope No. 41%, +, and the method of forming the semiconductor device described in the four items of the name of the Kyrgyzstan is carried out, the twisting is carried out by the environment or the nitrogen environment. The method of claim 41 is to form a semiconductor f-set method in which the Nikko material is placed within a range of about 4 degrees Celsius. ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The method of claim 31, wherein the porogen-forming material is removed to form the semiconductor device-based material to decompose the porogen material. The 匕3 application-plasma treatment is from the method of claim 47. The towel-nitrogen-based electro-conductor device is as claimed in the patent application of the third electric water. The method includes a dielectric layer comprising a semiconductor device at about 4.2. k small still as described in the patent application scope 3, the formation of the semiconductor device I278〇647pif which is implemented in the construction of the dual damascene interconnection. U• A method of forming a semiconductor device, comprising: Forming a lower conductive layer on the substrate; and a double gold that is inlaid to the contact portion of the lower conductive layer, wherein the dual damascene interconnect is formed: a via hole 'where the via hole is aligned with the blank and the hole'. The sacrificial material comprises - the substrate removes the porous sacrificial material in the via hole; and filling the via hole with a conductive material. Said to form a semi-conductor _ two of the double: genus setting: ^ 38
TW94143335A 2004-12-08 2005-12-08 Methods for forming dual damascene wiring using porogen containing sacrificial via filler material TWI278064B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020040103088A KR100745986B1 (en) 2004-12-08 2004-12-08 Fabrication method of dual damascene interconnections of microelectronics device using filler having porogen
US11/223,310 US20060121721A1 (en) 2004-12-08 2005-09-09 Methods for forming dual damascene wiring using porogen containing sacrificial via filler material

Publications (2)

Publication Number Publication Date
TW200623325A TW200623325A (en) 2006-07-01
TWI278064B true TWI278064B (en) 2007-04-01

Family

ID=38626104

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94143335A TWI278064B (en) 2004-12-08 2005-12-08 Methods for forming dual damascene wiring using porogen containing sacrificial via filler material

Country Status (1)

Country Link
TW (1) TWI278064B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6960839B2 (en) * 2017-12-13 2021-11-05 東京エレクトロン株式会社 Manufacturing method of semiconductor devices

Also Published As

Publication number Publication date
TW200623325A (en) 2006-07-01

Similar Documents

Publication Publication Date Title
CN100501969C (en) Methods for forming interconnecting structure and semiconductor devices
US7094669B2 (en) Structure and method of liner air gap formation
TWI660457B (en) Process for damascene structure with reduced low-k damage
TWI316731B (en) Method for fabricating semiconductor device and semiconductor device
JP4850332B2 (en) Etching method of dual damascene structure
JP4166576B2 (en) Low-k wiring structure composed of multilayer spin-on porous dielectric
JP5382990B2 (en) Method for forming an interconnect structure
JP4169150B2 (en) Method of forming a metal pattern using a sacrificial hard mask
TWI567870B (en) Interconnection structure and manufacturing method thereof
TWI253713B (en) Dual damascene structure formed of low-k dielectric materials
US7285853B2 (en) Multilayer anti-reflective coating for semiconductor lithography and the method for forming the same
CN101553907B (en) Structures and methods for low-k or ultra low-k interlayer dielectric pattern transfer
TWI228794B (en) Method of selectively making copper using plating technology
US20150021779A1 (en) Hard mask for back-end-of-line (beol) interconnect structure
US9870944B2 (en) Back-end-of-line (BEOL) interconnect structure
TWI299543B (en) Method for forming dual damascenes with supercritical fluid treatments
JP2003179135A (en) Method for manufacturing copper interconnect having interlayer insulator of very low permittivity
TWI292933B (en) Method of manufacturing a semiconductor device having damascene structures with air gaps
US7300868B2 (en) Damascene interconnection having porous low k layer with a hard mask reduced in thickness
TW200411770A (en) Method for manufacturing a semiconductor device
TWI278064B (en) Methods for forming dual damascene wiring using porogen containing sacrificial via filler material
TWI338934B (en) Methods for forming semiconductor devices, damascene structures and interconnect structures
TWI269352B (en) Method for fabricating semiconductor device
JP2005217371A (en) Semiconductor device and method of manufacturing the same
KR100440080B1 (en) Method for forming metal line of semiconductor device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees