TWI270968B - Electronic device and method of manufacturing same - Google Patents

Electronic device and method of manufacturing same Download PDF

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Publication number
TWI270968B
TWI270968B TW092108376A TW92108376A TWI270968B TW I270968 B TWI270968 B TW I270968B TW 092108376 A TW092108376 A TW 092108376A TW 92108376 A TW92108376 A TW 92108376A TW I270968 B TWI270968 B TW I270968B
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Taiwan
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layer
cavity
cover
semiconductor component
electronic device
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TW092108376A
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English (en)
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TW200402138A (en
Inventor
Samber Marc Andre De
Johannus Wilhelmus Weekamp
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Koninkl Philips Electronics Nv
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Publication of TW200402138A publication Critical patent/TW200402138A/zh
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Publication of TWI270968B publication Critical patent/TWI270968B/zh

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    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
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Description

1270968 玖、發明說明： 發明所屬之技術領域 本發明揭示一種電子裝置，其包括一主體，該主體具有 包含一内側及一隙缝之一空穴，一具有接點之半導體元件 ，該半導體元件存在於該空穴中且至少其部分接點係位於 該空穴之隙缝中。 本發明亦揭示一種電子裝置之製造方法，該電子裝置包 括一主體，該主體具有包含一内側及一隙缝之一空穴，一 具有接點之半導體元件，該半導體元件存在於該空穴中且 至少其部分接點係位於該空穴之隙缝中。 先前技術 此種方法及此種半導體裝置係揭示於第6,087,721號美 國專利中。該已知半導體裝置包括其上配備一絕緣材料之 主體之一導熱層。存在有一雙極電晶體，其充當該半導體 元件。此電晶體之接點皆在隙缝中。在背向隙缝之一面上 ，電晶體置於一導電表面。此表面係最好經由一導熱之中 間層與該導熱層接觸。 該已知半導體裝置之缺點在於其接點必須與接線連接。 為微型化起見，吾人期望以金屬或烊料凸塊取代接線。然 而，若存在更多元件，則半導體必須能夠與所述更多元件 連接。 發明内容 因此，本發明之首要目的係提供一種如序言中所述類型 之半導體裝置，可藉由焊料或金屬凸塊將其置於一載體上。 諸接點經由導電連接件與接觸面電性接觸，達成上述目 84902 -6- 1270968 的，該等接觸面係錯定於電性絕緣材料中。在根據本發明 之裝置中I接觸面係作為電性絕緣材料中之島狀物與橋狀 物’其g當用於該等接觸面之—黏接㈣卜該等接觸面 係存在於-平面中’其與該空穴平行，而大體上伸展至該 空穴之外。如此’可以焊料或金屬凸塊之方法或以一類似 方法將該裝置配置於一載體上。 本發明之首要優點為：該等接觸面可十分接近接點，而 若使用引線或接線則不可能達成。如此，使由引線或接線 之自感應所引起之較高頻率處之損失最小化。 本發明之第二項優點係其被採用後可形成小尺寸。可選 擇接觸面之尺寸遠遠大於接點之尺寸，以便確保充足之供 電，並與載體上之布局精準度保持一致。 在第-項具體實施例中，該主體包括_電性絕緣材料， 其封裝除該隙缝以外之半導體㈣。事實上此线即為配 備有一護套之該半導體元件或其所組成之一陣列。此護套 可為此-或多個半導體元件在一臨時載體上配備接點，模 製護套並移除臨時載體而實現。其顯要優點尤其體現於具 有不止-個半導體及其他元件之實施例中，其中為接觸面 配備導I互連，以便根據所需之—圖案與該等半導體裝置 互連。適宜的半㈣元件之組合包括基於不同基板之半導 體元件’譬如石夕、GaAs、㈣及此其他元件則如磁阻式 感測㈣機電元件(MEMS)、主體聲波毅器及類似物。 在第二項具體實施例中，該電性絕緣材料形成一護套， 其亦填滿該空穴。如此，該絕緣材料亦充分地封裝該半導
84902.DOC 1270968 體元件。如此可省却一額外保護層。結果，在選擇包圍空 穴之主體時可有更大的自由。該主體可為一聚合物材料， 亦可為玻璃或陶瓷。其亦可為包括元件及導體之一多層基 板。採用玻璃有一額外優點，即可用粉末喷砂法以低成本 製造適當之空穴。 在一較佳具體實施例中，存在一導熱層，其與半導體元 件之間存在熱傳遞，且其至少部分位於該空穴内側，如此 可確保散熱。此對動力元件尤為重要。若使用一習知雙極 電晶體，則導熱層可作為集極之連接。接著將導熱層導向 其與一接觸面接觸之第一面。最好係將位於一基板上之接 觸面與該裝置之其他部分裝配為一體。 在另一項具體實施例中，該導熱層僅覆蓋空穴内側之一 部分。本實施例尤其適於接點皆在隙缝處之半導體元件， 譬如積體電路、場效電晶體。與一具有内部導體之主體結 合時尤其有利。在此情況下，該導熱層實際上延續於整個 基板中，因而亦提供與該裝置背向隙缝之一面之導電性連 接。 在一項不同之具體實施例中，該裝置包括經由導電線路 (即互連）按所需與半導體元件接觸之其他元件。可將該等 元件納入具有所需尺寸及深度之獨立空穴中，但亦可利用 薄膜及厚膜程序將該等元件裝配或安置於主體上。此外， 該空穴中原本可能存在一些元件。可將導電線路安排在該 主體中。亦可將該等線路與該等接觸面連接。該裝置因而 在另一適宜之位置具有連接點。此類元件之範例有被動元
84902.DOC 1270968 件，譬如電阻器、線圈、電容器及變壓器；高頻元件譬如 諧振器、帶狀線、偶合器、開關；以及感測器。 該半導體元件最好係一電晶體。電晶體十分適宜用作功 率擴大器。在一具有此種電晶體之裝置中，要求接點位於 一側；適當地散熱；裝置高度小；且裝置製造成本低。根 據本發明之裝置符合上述之一切要求。 許多材料適合用作絕緣材料，只要其可以液體狀態使用 。適宜材料之範例有聚合物，譬如環氧樹脂類材料、聚丙 晞酸醋、聚酿亞胺，以及陶瓷;材料，譬如二氧化碎、氧化 I呂及以溶凝膠加工法製備之類似材料，以及有機材料，譬 如環丁晞苯。使用一熱固材料尤其有益，因為遮蓋不一定 透明。為排除寄生電容，最好使用具有較低介電常數之材 料，譬如一烷基替代二氧化矽、氫矽酸鹽（HSQ)、環丁烯 苯、SiLk等。 本發明之第二項目的係提供一種如序言所述類型之方法 ，以該方法可獲得一半導體裝置，可利用凸塊將其置於一 載體上，且該方法可同時施行於許多裝置。 本發明之第二項目的之達成係依靠包括以下步驟之方法： --為該主體配置半導體元件及一遮蓋，該遮蓋包括一導 電材料製成之圖案化層及一犧牲層； —將主體及遮蓋組裝，其方式使得半導體元件之接點與 遮蓋之圖案化層連接； --在遮蓋與主體之間配置一護套，將圖案化層機械地錨 定於護套中；以及 84902.DOC -9- 1270968 --自遮蓋移除犧牲層。 犧牲層之採用將生產簡化為主要係一遮蓋及一主體之裝 配，其後裝備護套。該工藝用途十分廣泛。若需要，可提 供結構性校準裝置用於校準遮蓋及主體。為將遮蓋及主體 中之導電層互連，使用一已知導熱連接裝置，譬如一各向 異性導電膠、一焊料或金屬凸塊、或類似物。如此之額外 優勢在於，該工藝之實施可不受制於空穴之具體形狀、主 體之材料或半導體元件之構造。至關重要之處在於，半導 體元件之接點及接觸面之間建立有良好連接。同時，在設 計及構造之選擇上有充分自由：首先，可局部上，即在接 接點處為接觸面提供增厚部分來平衡高度差。其次，可利 用凸塊以留出一定間隙。其三，可利用標準元件大規模應 用該工藝。於是，可修改空穴之設計。 選定之犧牲層形成一導電層之基板，並可在裝配後移除 。譬如矽及鋁係適宜之材料，可以蝕刻法將其徹底移除。 氧化物，譬如氧化鋁及二氧化矽，亦與聚醯亞胺、丙烯 酸酯及其他縮聚合物同樣適宜。譬如可藉由蝕刻、拋光或 剝離之方法將其移除。亦可將該等技術結合使用，如犧牲 層包括多個疊層時尤為有效。此多個疊層之一範例係一 Si-Si02-Si之疊層。圖案化層之厚度為（譬如）1至40 μιη，較 佳為5至15 μηι。該犧牲層之厚度為（譬如）25至75 μπι。 在第一項具體實施例中，具有半導體元件之主體的製備 方法為： —將半導體元件置於一臨時載體上，接點位於臨時載體 84902.DOC -10- 1270968 之側面； --將半導體元件成型，從而形成由電性絕緣材料製成之 主體；以及 —移除臨時載體，從而配置成隙縫。 本具體實施例尤其適於製造多晶片模組。 在第二項具體實施例中，具有半導體元件之主體在空穴 内側具有一導熱層，該空穴與半導體元件之間存在熱傳遞 ，且其中將該半導體元件置於主體之導電層上以提供具有 半導體元件之主體。如此使得該裝置之製造具有良好散熱。 實現此具體實施例之另一方法為，不將該半導體元件置 於主體之空穴中，而是置於遮蓋之導電圖案化層中。此選 擇性實現方法係根據申請專利範圍第10項之方法。 在一較佳具體實施例中，在遮蓋之圖案化層及犧牲層之 間存在一圖案化子層，該圖案化層及該子層包括由一凹陷 相互分開之第一及第二圖案，該凹陷在子層平面上之直徑 大於在圖案化層平面上之直徑。如此將該圖案化層直接機 械地錨定於護套中··當配置護套時，凹陷即被填滿；由於 凹陷在子層上之直徑較大，護套存在於圖案化層之下、之 上及緊鄰圖案化層。以此連接，若子層大體上根據與圖案 化層相同之遮罩製造圖案，則較有利。然而，不同處在於 ，在與第一側平行之一平面上，子層中圖案之直徑小於圖 案化層中之對應圖案。特定言之，若該圖案化層充當子層 之蝕刻遮罩，且若施行一濕式化學蝕刻操作，導致形成一 側蝕，則較為有利。 84902.DOC -11 - 1270968 該子層可為犧牲層之-部分。或者，該子層可包括不同 材料。若子層為犧牲層之—部分，則藉由對圖案化層材料 有選擇性之蝕刻劑的蝕刻處理來獲得子層之小直徑。 護套材料最好剌-絕、輯料。若護套之製備不僅使得 接觸表面錯定於護套中’且使得半導體元件封裝於護套中 ，則較有利。機械錨定係因遮蓋之圖案導電層之圖案之直 徑大於下面子層之對應圖案所致。相對於子層，圖案層之 圖業具有錯定於護套中之凸出邊緣。 在一較佳具體實施例中，主體包括多個空穴。半導體元 件安裝完畢後，將主體與一適當遮蓋組裝。僅在移除犧牲 層後，才將已組裝之主體與遮蓋分成獨立之電子裝置。 “在另一項具體實施例中，主體由玻璃組成。經由噴砂工 藝在此玻璃主體中形成空穴，隨後在空穴内側塗敷一導熱 層，該導熱層延伸至空穴以外。噴砂工藝之_較佳範例係 粉末喷砂，其本身已為熟悉此項技術者所知。採用玻璃之 優點在於其提供極佳之絕緣性。此外，不僅對於空穴之形 成，而且就將大塊玻璃板分成獨立之裝置而言，玻璃皆易 於加工。另外，藉由選擇玻璃，可調節其熱導性。 在-不同之具體實施例中，主體之製備係藉由將一導熱 層及一犧牲層之一薄片變形以形成空穴而達成，在主體與 遮盍之間配備護套後，即將犧牲層移除。事實上，主體及 遮蓋採用相同的材料。在一額外步驟中，將主體變形。該 變形操作可為一折疊操作《為形成空穴，可較佳地採用一 模型來擠壓薄片。此方式已取得良好成果。在已正式出版 84902.DOC -12- 1270968 之歐洲專利申請案EP 02078208.2(PHNL020719)中更詳細 地描述了薄片變形工藝，其内容以引用方式併入本文。 在本實施例之一具體較佳變型中，在移除犧牲層後，使 主體配備有一保護塗層，譬如藉由採用一聚合物材料成型 。合成之裝置主要包括半導體元件、接觸面、導熱層及護 套。該裝置非常輕，且可形成小尺寸，而同時散熱能力充 分。 根據本發明之裝置及方法的該等及其他方面顯然源自且 將由下述之實施例闡明。 實施方式 圖1係根據本發明之一裝置100的第一項實施例之剖面圖 。該裝置100包括一主體20，譬如以玻璃製成，該主體具有 一第一側面21及與第一側面相背之一第二側面22。該主體 20在第一側面21上具有包含一隙缝38之一空穴30。該隙缝 38被一圖案化層45及一護套35封閉。空穴30具有一内側39 ，空穴30之底部31即位於其中。在本範例中，空穴30之内 側39全部敷有一導熱層33，其厚度在5及50 μιη之間，較佳 介於10至25 μιη之範圍。導熱層30延伸至主體20之第一側 面21之末端34。空穴30容納一半導體元件10，本例中為一 雙極電晶體，具有發射器，在主體20之第一側面21上具有 基極11、12、13,並且在空穴30之底部31上具有一集極接 點。電晶體10經由主體30之底部31與導熱層33處於熱接觸 中。利用一導電黏接層14將半導體元件10安裝於空穴底部 3 1。此外，空穴中充滿護套35，圖案化層45亦機械地錨定 84902.DOC -13- 1270968 於其中。厚度較佳地介於10至15 μπι之間的圖案化層45包 括接觸面47、48。接觸面48與導熱層33之末端部分34接觸 。接觸面47與電晶體10之接點11、12、13接觸。除接觸面 47、48以外，圖案化層45可包括互連，電晶體藉由該互連 與裝置中之其他元件連接。譬如，導電層可不覆蓋空穴 之整個内表面，而僅存在接觸。其後藉由接觸面47及48之 適宜選擇性連接，提供至主體20之第一側面2丨的一互連。 具有圖案之導熱層33因而亦可適宜地用作放置另外元件之 互連層。若半導體元件1 〇為一場效電晶體，或另一接點 白在側之元件’則導熱層3 3不必延仲至主體2 〇之第一側 面21，其限制條件為已實行另一種散熱方式，譬如經由主 體20中之導熱體或經由一導熱互連，例如一自空穴川之底 部31至裝置100之第二側面22的金屬互連。 圖2顯示圖1所示裝置100之製造過程中的幾個階段。圖 2Α中所示主體20及圖2Β中所示遮蓋4〇作為啟動元件。 圖2Α顯示裝配前之主體20。主體2〇由玻璃構成，且以粉 末噴砂法在電路板平面上配置有空穴3G。空㈣之隙缝％ 位於主體20之第-側面21±。在主體财形成所述空穴％ 之工藝本身已為吾人所知，且其用於（譬如）基於聚合發光 二極體的顯示幕中。空穴3〇之深度可根據要放置之半導體 元件之高度調節。空穴3〇形成後，經由一遮罩以錢射法 沈積銅質導熱層33。亦可在微影触刻工藝中在導熱層上刻 製圖案’尤其若其為生產過程的最後步驟，即當空穴充填 時。微影蝕刻法形成圖案所需且以旋塗法塗敷之光學抗蝕
84902.DOC -14- 1270968 別將塗佈在第-側面上。導熱層33完成後，放置半導體元 件10 ’孩半導體元件配備有黏接層14。隨後，在接點11、 12、13及導熱層末端處給半導體元件塗敷焊料或金屬凸塊 。所用焊料材料可為（例如）pbSn。 圖2B顯示裝配前之遮蓋40。本範例中，並非必要地，遮 蓋40具有一第一側面41及一第二側面42，於第一側面41上 塗敷圖案化層45，於第二侧面42上塗敷犧牲層44。一子層 46與圖案化層45接觸，在本實施例中該子層係犧牲層44之 一邵分。在此，犧牲層44係一厚約60 μπι之鋁質層。圖案 化層45包括銅，厚約10 μηι。圖案化層45及子層46包含圖 案47 ’圖案之間具有一凹陷461。該凹陷461在子層46平面 中之直徑大於在圖案化層45平面中。 遮蓋40之製造如下：以微影蝕刻法在圖案化層45上形成 一籠頭形狀之二氧化矽遮罩，其後利用氯化鐵水溶劑以蝕 刻法將圖案化層45之銅自該遮罩移除。於此過程中，在遮 盍40中形成一凹陷461。藉由該凹陷461即定義了接觸面47 、48。隨後使用另一選擇性蝕刻劑移除部分犧牲層44。於 此過程中，犧牲層44相對於圖案化層45發生側餘，因此形 成子層46。譬如苛性鈉可用作鋁之選擇性蝕刻劑。 圖2C顯示將遮蓋40與主體20裝配後之裝置1〇〇。藉由遮 蓋之圖案化層45及主體20的第一侧面21上之導熱層33中所 配備的機械校準裝置，將主體20及遮蓋40校準。另可選擇 (譬如）光，以用於上述校準。為在圖案化層45及導熱層33 之間獲得一充分密封之連接，在約200°C下進行一熱處理。 84902.DOC -15· 1270968 應注意，進行裝配後，可選擇將半導體元件1〇置於遮蓋 40上。尤其在該例中，各種互連技術，譬如焊接、導電黏 接劑、金屬凸塊、擴散連接，可一方面用於將接點丨丨、12 13及接觸面47互連，另—方面將導熱層33之末端與接觸 面48互連。金屬凸塊可替代焊料作為主體2〇之接點與遮蓋 之接觸面47、48之間的連接裝置。然而在該例中，通常要 求在銅上、並較佳地在導熱層33及圖案化層45上塗敷一黏 接層，譬如一層Au、Α§、Pd及/或Ni。其中，Α·Αυ之合 金，譬如Au-Sn，可用於凸塊。採用八卜如極其有利於與一 丙烯酸酯層之結合，如已正式出版之歐洲專利申請案Ep 02077228.1(NL020471)中所述。 圖2D顯示將絕緣材料之護套35配置於空穴3〇中之後的 裝置100。在本範例中，係將一環氧化物用作絕緣材料。毛 細管力（其後視需要進行一真空處理）可確保環氧化物亦充 滿凹陷46卜該填充程序後，實施另一加熱步驟以固化絕緣 材料。 圖2E顯示移除犧牲層44之後的裝置1〇〇。本範例中，利 用苛性鈉以蝕刻法移除該層。事實上，此時裝置1〇〇已完成 。隨後，可在接觸面47、48上配置凸塊。若已在電路板平 面上製造裝置100,則首先將主體2〇分為獨立之裝置。為簡 化此分離程序，將圖案化層45及導熱層33製作圖案，使其 離開鋸切路徑。亦可選擇將額外塗層配置於接觸面47、48 上。 圖3A至Η顯示裝置ι〇〇之製造方法的第二項具體實施例
84902.DOC -16- 1270968 。它們顯示製造過程中不同階段之剖面圖。♦實上，該方 法之實施方式與關於圖2八至轉述之方法相同。盆間之區 別在於將與遮蓋之薄片基本完全相同之—薄片料具有： 熱層33之主體2〇。在此應用中，該薄片必須先變形。在— 稍後階段’可以-絕緣層替代薄片之犧牲層。進而，可保 持裝置限於-封裝於護套層35、25之中的導熱層Μ及—半 導體兀件ίο,同時接觸面47、48皆位於裝置1〇〇之第一側面 21。如此具有裝置1〇〇極輕且可小尺寸製造之優點。 圖3A至C顯示裝配之前製造主體2〇之三個步驟。一具有 導電層33之薄片5G及-犧牲層36用作啟動元件。將導熱層 33製作圖案後，若需要，根據所需圖案形成薄片5〇。為此 目的，使一模型接觸到薄片5〇，該薄片處於一硬基板上 (其可為模型之-部分）。模型具有—所需之圖案，從而形 成空穴30。該模型為(例如)具有所需圖案之一以基板(具有 Ni凸塊）。該模型可位於薄片5〇之任一側；換言之，模型之 圖案可能為空穴：30之正極或該空穴之負極。 圖3〇頭不遮盍4〇。圖3E顯示已裝配之裝置100。圖3F顯 示配備護套35後之裝置1⑼。該等步驟與關於圖2B至20所 述之步驟完全相同。 圖3G顯示移除犧牲層44及36後之裝置1〇〇。當裝置丨⑻浸 於一蝕刻浸泡劑時，此過程可於單一步驟中完成。當然， 犧牲層可由一不同材料構成，此時使用兩道蝕刻浸泡劑。 若犧牲層由一絕緣材料製成，或若僅導熱層33中配備之圖 案係自空穴30之底部31至主體之第一侧面21之連接，則無
84902.DOC -17- 1270968 需移除犧牲層36。 圖3H顯示已配置另一護套25之後及接觸面47、48上已配 置焊料60之後的裝置1〇〇。 圖式簡單說明 圖式中： 圖1係該裝置第一項具體實施例之剖面圖； 圖2A至E係主體、遮蓋及裝置在該方法之不同階段的剖 面圖； 圖3 A至Η係主體及遮蓋在該方法之第二項具體實施例的 不同階段之剖面圖，其結果形成該裝置之第二項具體實施 例0 各圖未按比例繪製，且為清楚起見，放大了一些尺寸 對應區域或部分盡可能以相同的參考數字代表。 圖式代表符號說明 10 半導體元件 11 ， 12 ， 13 14 20 21，41 22，42 25 30 接點 導電黏接層 主體 第一侧面 第二側面 另一護套 空穴 31 底部
84902.DOC -18 - 1270968 33 導熱層 34 末端部分 35 護套 36，44 犧牲層 38 隙缝 40 遮蓋 45 圖案化層 46 子層 47，48 接觸.面 50 薄片 60 焊料 100 裝置 461 凹陷 84902.DOC -19-

Claims (1)

1270968 拾、申請專利範園： 1. 一種電子裝置，其具有： 包含一空穴之一主體，該空穴具有一内側面及一隙缝； 配備有接點之一半導體元件，該半導體元件處於該空 穴中，且至少其部分接點係位於該空穴之隙縫處； 其特徵在於：該等接點經由導電連接件與接觸面電性 接觸，該等接觸面係錨定於電性絕緣材料中。 2. 如申請專利範圍第1項之電子裝置，其中該主體包括一電 性絕緣材料，其封裝除隙縫以外之該半導體元件。 3. 如申請專利範圍第1項之電子裝置，其中該電性絕緣材料 形成一護套，其同時亦充滿該空穴。 4·如申請專利範圍第3項之電子裝置，其進一步包括一導熱 層，該導熱層與該半導體元件之間存在熱傳遞，且其係 至少部分位於該空穴之内側。 5·如申請專利範圍第4項之電子裝置，其特徵在於··該主體 為由具有導電中間層之絕緣材料製成之一多層基板，該 導熱層為該多層基板之中間層的一部分。 6. 如申請專利範圍第1項之電子裝置，其特徵在於：存在其 他元件，其經由導電互連按需要與該半導體元件之該等 接點連接。 7. 一種製造電子裝置之方法，該電子裝置包括具有包含一 内侧及一隙缝之空穴之一主體，以及具有接點之一半導 84902.DOC 1270968 體元件，該半導體元件處於該空穴中，且至少其部分接 點係位於該空穴之該隙缝處； 該方法包括以下步騾： -為主體配備半導體元件及一遮蓋，該遮蓋包括由導 電材料製成之一圖案化層及一犧牲層； -組裝該主體與該遮蓋，其方式使得該半導體元件之 諸接點與該遮蓋之圖案化層連接； -在該遮蓋與該主體之間配置一護套，該圖案化層機 械地錨定於該護套中；以及 -自該遮蓋移除該犧牲層。 8·如申請專利範圍第7項之方法，其中具有該半導體元件之 該主體的配置步騾為： -將該半導體元件置於一臨時載體上，該等接點位於 該臨時載體之側面； -成型該半導體元件，隨之形成該電性絕緣材料之主 體；以及 -移除該臨時載體，隨之配置該隙缝。 9·如申請專利範圍第7項之方法，其中該主體在該空穴之内 側具有一導熱層，該導熱層係與半導體元件之間存在熱 傳遞，且其中經由將該半導體元件置於該主體之該導熱 層上，以提供具有該半導體元件之該主體。 84902.DOC 1270968 ιο·—種製造電子裝置之方法，該電子裝置包括具有包含一 内側及一隙缝之空穴之一主體，以及具有接點之一半導 體元件，該半導體元件處於該空穴中，且至少其部分接 點係位於該空穴之該隙缝處；該方法包括下列步驟： -配置該主體及一遮蓋，至少該空穴之部分内側配備 有一導熱層，且該遮蓋包括一導電材料之圖案化層及一 犧牲層； -將該半導體元件置於該遮蓋之該圖案化層上； -組裝該主體及該遮蓋，其方式使得該半導體元件與 該導熱層之間存在熱傳遞，且該半導體元件之諸接點與 該遮蓋之該圖案化層連接； -在該遮蓋與該主體之間配備一護套，該圖案化層機 械地錨定於該護套中；以及 -自該遮蓋移除該犧牲層。 11. 如申請專利範圍第8、9或10項之方法，其特徵在於：在 該遮蓋之該圖案化層與該犧牲層之間存在一圖案化子層 ，該圖案化層與該子層包括一第一及一第二圖案，該等 圖案係由一凹陷相互隔開，該凹陷在該子層平面上之直 徑係大於在該圖案化層平面上之直徑。 12. 如申請專利範圍第8或10項之方法，其特徵在於：該主體 包括複數個空穴，且其在放置半導體元件後與一適宜遮 84902.DOC 1270968 蓋組裝，並在移除該犧牲層後，將所組裝之主體及遮蓋 分成諸多獨立之電子裝置。 13·如申請專利範圍第9或10項之方法，其特徵在於··該主體 包括玻璃，且以一噴砂工藝形成該空穴，其後在該空穴 内側塗敷一導熱層，該層延伸至該空穴之外。 14.如申請專利範圍第9或10項之方法，其特徵在於：經由將 一導熱層及一犧牲層之薄片變形，形成該空穴，以製成 該主體，在該主體與該遮蓋之間配置該護套後即移除該 犧牲層。 84902.DOC 4-
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