TW490771B - Integrated high frequency module and its wafer level manufacture and package method - Google Patents

Abstract

This invention provides a novel wafer level high frequency module manufacture process, which can integrate and modulate individual device manufacture process in wafer level, and integrated wafer level package technique. Various active devices are made first using most cost-effective and yield-advantaged manufacture process, various passive devices are made then through a wafer level integrated manufacture process, and integrated process flow is completed by wafer level package technique, which provide complete function of the high frequency module and protect devices from being damaged during package dicing and thus yield loss. The inventive method avoids the use of underfill process to prevent modulated various devices from damage in the underfill process. Moreover, the inventive method also provides wafer level test and burn-in for the high frequency module, which can reduce cost in package and test.

Description

<Background of the invention> The invention relates to an integrated high-frequency module and its manufacturing and sealing, especially the use of a low-cost, high-precision thin, thick-film integrated front-end system, and a wafer-level die package or wafer at the later stage. The fUp chi / package process performs all kinds of wire bonding and tin-lead balls to complete the new integrated 1-frequency module of each component and the outside world, sexual connection (interconnection) and interface packaging. 〈Description of the prior art〉 X ♦ The vigorous development of mobile communications has accelerated the demand for related high-frequency wireless electronic parts. The mobility of wireless communication products depends on the size of the components and battery life. Parts manufacturers are also working to develop smaller, cheaper, and better-performing components. The final method of miniaturization is to integrate it with I c to become a system-on-chip (S0C). However, the system chip is easier said than done. Especially when integrating unique designs from different companies and different Intellectual property (IP), it often takes a considerable amount of time for integration and conversion. Therefore, it is necessary to develop system-level integration technology at the factory to quickly integrate the dies of different design companies, different wafers, and different processes. At the same time, individual dies can be tested first, that is, KGD (Κ η 〇wn G ο 〇d D) process, and then system-level module assembly (assembly), and then can go one step further for wafer-level testing to improve yield and reduce unnecessary packaging costs. For the client, through the customization design, the design time, product volume, power consumption, and electromagnetic interference (EM I) of the product can be shortened. Therefore, in order to achieve the small size, the fifth, the invention description (2) = 2 and the goal of reducing the integration complexity of the system, the circuits of other functions are now implemented as high-density integrated circuits, and then belong to different The technology of Luogui Shimengfang Shiga 4G-Fu Dufang or wafer materials is integrated with passive components to form a high-frequency module (System-in-a-package) technology. Requires :: i :: ㊁: High-frequency module integrating active and passive components, first 2 ^ ^-4 ^ ° 1 unit. The application of integrated passive components is as follows: Two Jd: Technology makes it more cost-effective and functional before 1. It is as follows:-a kind of low-temperature co-fired ceramics 4§ r 4lJ ^ a kind of film-type integration compatible with Ic process High pain. The biggest advantage of the low-temperature co-fired pure ceramic products is high-frequency = high, but the problems to be solved are equivalent, including the line from the end to the end-:: above 5 ° mm), measurement difficulties, upstream ceramics Yes = the last part is not easy, and the ceramics will shrink during the manufacturing process, which will make the g mold result very different, and it is not easy to trim. Basically, in terms of production costs, the process-compatible thin-film integrated high-frequency module is compatible with low-temperature co-firing, ceramics; the production costs of the two are roughly ^! · ^ ^, And the purchase of clothing is generally similar, but at present The advantages of the thin-film type full-frequency module are that it can produce smaller modules with less accuracy and 0, and can integrate active components in the establishment of the component model =, electrical system to achieve a systematic overall circuit simulation Analysis and after the company's "Complete and systematic simulation data * and solid process database, the development cost of mobile communication high-frequency modules and the time to market required to enter the market (Time to Market). Figures la and lb are the United States Intarsia company's 5th page 490771 of the year 20, 5. Description of the invention (3) An integrated passive film manufacturing process disclosed by Wireiess Systems Design in August and December Component high-frequency module (references 1, 2). Figure la illustrates the steps of forming a resistor, and Figure lb illustrates the use of a thin film process compatible with the IC process to fabricate integrated passive components including inductors, capacitors, and resistors. As shown in Fig. 1a, the formation of a thin film resistor firstly deposits and defines a resistance layer n on a glass substrate 10, and then deposits and defines a first metal pattern 12 by a step of etching or lift-off. The first metal pattern 12 serves as an electrode at both ends of the resistor r. Thereafter, a second dielectric layer 15 is deposited and defined as an insulation use. As shown in FIG. 丨 b, the integrated integrated passive element is firstly deposited and defined on the substrate 丨 〇, and then _ is used to define the first metal by etching or by a lift-off process. Pattern 丨 2 The first metal pattern 12 is used as a resistor! ^ Both electrodes; thereafter, a first dielectric layer 13 and a second metal pattern 14 are deposited, the first dielectric layer 13 and the first metal sandwiched between the upper and lower layers. Pattern 1 2. The second metal pattern 丨 4 to form a capacitor [; which: 'formed a second dielectric layer 15 for isolation on the resistor R and the capacitor C; the second dielectric layer 15 must have sufficient The thickness is to cover the components and all are coated on the substrate; subsequently, the lead-through holes are defined on the second dielectric layer i 5, and then formed = electrical = connected, and the adhesion with the subsequent metal wires 17 Buffer layer: 定 定 羞 Usign 〇Γ adheSi〇n Uyer), and then, when the second metal pattern 17 is deposited and deposited, at the same time, a solder bumper is formed to complete the electrical connection of the assembly: gold = Package (metal pad) 〇 And such components are generally used in semiconductor integrated circuit package type 'as shown in the figure and figure Shows. As shown in Figure 10, first

2. Description of the invention (4) Mode ball 18, followed by flip-chip bonding (after bonding to the molecular substrate cover 19, and then filling with glue 2 Ο 1 d picture _; The reliability of the contact. Or, as on the first board 10, the active element 21 is first bonded to the glass substrate and the glass substrate by a flip-chip bonding method, and then a tin ball 1 8 is grown on the metal layer. Bonding Fang Jun = Γ! After the molecular substrate cover 19 is bonded, it is filled with glue 20. This packaging method adds a real glue step, and its material 20 flows naturally by capillary phenomenon. Although it is easy to refine, the reliability of the wrong contact, However, due to its fluidity and flow time, it is not produced. 2. Control will reduce the process yield, and its curing time is long, which affects the part manufacturing. This invention aims to provide a variety of components that can integrate modules at the wafer stage. Complete two new! New manufacturing process and integrated packaging technology to provide high-frequency module ^ good ^ clever 'and to protect components from damage during package cutting and manufacturing process = t. In addition, this technology must be Able to avoid the use of fillers 丨 All components of its &amp; 枳 group will not be used in the filler process When it is damaged, especially the three-dimensional structure such as the spiral tube electric • 11-frequency switch manufactured by the ancient integrated micro-electro-mechanical system (mems) technology (Reference 3). Therefore, the present invention comes to the 'yield of the political process to the process.' At present, this related technology has not been developed yet. The development of today ’s MEMS wafer-level die packaging technology can be divided into several types. “I am a wafer-level die packaging, which involves a very important issue. Regarding the problem of the four-wheel line of the boat, how to make the transmission line in the q TL part manufactured with the wafer-level die packaging method match the circuit of the system is an important technique.

5. Description of the invention (5). Generally, V-grooves are etched or be etched out of beryllium on the substrate and the corresponding silicon is used. Then, the metal substrate is used to guide the lightning. In order to fix the metal wire to the guide belt, it can be matched with the system or the system; or straight (Reference 4). The structure of the electrical connection is directly completed. The surface structure 1 = t is a three-dimensional structure, not as flat as 1C to reduce water-gas interaction, which can avoid direct contact with the atmosphere, which may cause zero drift. In Ic: ς J 生 ”, for example, the pressure gauge is put into the cover, and in Ic, which is a well-known industry, the place where epoxy resin is used is: microcomputer G2: the effect of airtightness. But Different from IC, this tree = transducer, so it must be in contact with the outside world. Because of you == two are compared with micro-electromechanical components, then it must be packaged in the package 7; the airtight consideration of the interface. In addition, the industry of micro-electro-mechanical components has the biggest difference with the 1C industry. Many of the micro-electro-mechanical components often need to be operated under vacuum. For example, this can improve the sensitivity of vibration components, such as those using micro-electro-mechanical methods. Responsiveness of IF and RF filters made by micro-mechanical oscillators (micr〇-mechanical res〇nat〇r). So, for some micro-electromechanical products | On the one hand, it is necessary not only to consider electronics like 1C products The problem of heat dissipation of components; on the other hand, it is necessary to reduce the effect of air on component operation and signal strength. And wafer-level die packaging technology may be the most effective and low-cost method to overcome this problem. Page 8 490771 V. Invention Description (6) General At the above points, the integrated high-frequency module of the present invention and the method for manufacturing and packaging the crystal, applying the new micro-electromechanical technology, can provide a module-level wafer-level die that integrates various active and passive components, and avoids The use of the filling process can effectively improve the complete efficiency of the process yield and wide-range high-frequency module. And from the <General Summary of the Invention> the purpose of this invention is to solve the shortcomings of the above-mentioned prior art. To mention: i:!: Integrated high-frequency mode The assembly and its manufacturing and packaging method can serve one purpose. ° 'Wafer-level die packaging of moving parts. This is the high-frequency module of the present invention and its wafer-level soil. ^ The manufactured high-frequency module can be provided. Acres, packaging methods, .. 1 棋 chess, and directly into wafer-level testing (wafer-level testing) production of ancient phase Yi 〆 round-level burn-in (one n) group system characteristics and crystal In order to achieve the above-mentioned purpose, it is too clear-purpose. | Manufacturing and packaging methods are used respectively-Syria, f eight days, and round-level: and :, sealed by Shi Xi substrate etching, breaking 70 pieces of glass Substrate VCadhes.ve 1 ay er ^ ^ ^ ^ It is pulled out of the metal substrate on the front of the substrate, and the interface bonding is completed by 1 μm, so {take out the signal to complete the package, and ^ ^ wire or wafer-level die packaging method. The aforementioned / This integrated main In order to achieve the above purpose, the passive substrate f silicon substrate can be used interchangeably. The manufacturing and packaging methods are respectively high-frequency modules and their wafer-level sealing and etching made of silicon substrates as the glass of the active and passive components. Substrate ^. Go or use lamination

Page 9 Rule ‘People with anode, earth bucket, i, 490771

V. Description of the invention (8) The wafer-level die package of the combined main breaking element. To achieve the above-mentioned purpose, the ☆ _ method is a clever engraving = wafer-level die packaging of the S-component of the aforementioned high-frequency active and passive components. This method is used to manufacture and package an integrated active and passive element. =: The high-frequency module of the present invention and its wafer-level bonding. Various types of active and passive components are used as substrates, on which crystals of passive components are mounted. Round die package. _ The above purpose of the present invention and its implementation are more clearly understood than the description made by γ ·. /, 4 points, white can refer to the following detailed description of the preferred embodiment according to the drawings>, the structure shows the integration of passive components in the high-frequency mode of the U-chip package ^ method! = High frequency of the preferred embodiment The method for mounting the wafers of the component module is described. In the first one, the glass substrate of the active and passive components, the plate: two = medium, is based on the above system: •: The process is advanced: = the main board of the front panel is pulled out by a wire. The third embodiment is a glass substrate backed by a top-up and pole-joint method; a cover of 3 = is closed by a male process; and a fourth example is a manufacturing example of a wire drawn by a wire. Phantom clothing is used as a tin-lead ball on the back of the substrate. 5. Description of the invention (9) The process of taking out the signal on the back; (adhesive layer) To access the five consecutive embodiments is to use the following layers as the active and passive elements to be integrated; = Substrate manufacturing process. Sixth implementation The manufacturing method of the back of the board. In the seventh embodiment, the base element for the high-frequency component is fabricated, and the active and passive components are fabricated on it. The substrate is fabricated by active or adhesive bonding to complete: Second, the substrate is the first to be used for making active and passive components. Yi Yun ’s eight examples are two = the process of bonding by% pole bonding method or layer bonding method; the ninth = 1 a flexible soft board as the substrate 'joining active and passive components with various types of sand-based fish f stone The manufacturing and packaging method of the evening element f. The tenth embodiment explains; · Describes the manner in which wafer-level testing and wafer-level burn-in can be performed. Figures 2a to 2j are wafer-level die manufacturing and packaging methods for high-frequency component modules according to the present invention. Figures 2a to 2h show a manufacturing process of integrated active and passive components. First, a resistive layer 202 is deposited and defined on the acoustic substrate 2 01 (see Figure 2 &amp;Figure); thereafter, a first metal layer 2 03 is deposited and defined by an etching or peeling method. Layers 203 are formed at both ends of the resistive layer 202 to form an electrical resistive structure R ′. In addition, the first metal layer extends on the substrate 201 to serve as the front first lead and metal pad (see section 2b). Figure). Then, a first protective layer 205 is deposited and defined to insulate the first wire from the metal layer on the substrate after encapsulation and after encapsulation (Figure 2c), and then 'the dielectric layer is deposited and defined 206 And the second metal layer 207 (see FIG. 2d), the dielectric layer and the upper and lower layers sandwiching the first metal layer 20 3, the second metal layer 207 forms a metal layer / dielectric layer / metal layer capacitor structure (Please refer to Figure 2e);

Page 12 490771 V. Description of the invention (ίο) A protective layer 2009 is formed by spin-on (see 2fgj); this protective layer 2 9 is a dielectric with a low dielectric constant. Material, with sufficient thickness to cover passive components such as resistors and capacitors and uniformly coated on the substrate 201; then, a contact window 210 is defined on the protective layer 209, and a third metal layer 211 is deposited and defined to form a front surface (See Figure 2g). After the third metal layer is completed, various active and passive components can be fabricated on the protective layer 209 by various methods. Taking the electroplating process as an example, the previously defined second wire can be used as the bottom lower electrode of the electroplated structure, and then follow the normal electrical clock procedure to form a passive component such as a microcomputer # electric type three-dimensional inductance L (as shown in FIG. 2h), Active components such as microwave switches L (nncrowave SWltch). In addition, the Shi Xiji signal processing IC chip and the active element 212 such as a power amplifier of the GaAs series are bonded and assembled at a proper position of the second metal layer 2U by a flip-chip bonding method. The fixed boundary parts are matched with passive components enclosed in the protective layer 209, which can provide different types of modules. & Wind y as shown in Figures 2a to 2h. After completing the production of a figure including the main quilt ..., another substrate 213 can be used as a cover for bonding, ^ Protected in the substrate cover 213 'through different designs , Module 'can have different ways of exporting. Figures 2 丨 and 2 ″ show the structure of an embodiment in which a signal is pulled out from a metal pad. In this case, a cap is fabricated using another wafer-level substrate 213. On the substrate 213 of the same size and shape of γ 100, the rear surface of the graded substrate plate 2i3 defines and etches the shape of the cover, and the front surface of the soil plate 213 and the base are concave on the inside of the cover.

Page 13 V. Description of the invention (11) Second &quot; Accumulator 216, the production of the substrate cover 213 is completed. After that, π and ㈣ cover 213 correspond to the above-mentioned wafer-level substrate 021 frequency board group 2 1 4. The substrate cover 2 1 3 and the substrate 2 001 face each other, and the cover 213 and the substrate 201 in the back of the house are irrelevant. Place the fixed Ψ m ^, η -η ^ in the B-chip bonding machine, and perform multiple steps of heating or heating in the manner described below, and complete the installation as described below. A cavity 215 is formed in the full d groove, and the inner wall of the cavity can protect internal components from external electromagnetic waves. The RF frequency module 2 1 4 is located in the cavity 2 丨 5. After completing the packaging process of grade-level die, 铖% yen and yen 'τ ^ ^ ^ ^ After the cutting process, you can carry out the metal 塾 formed by ^ face brother-wire as shown in Figure 3b Call 217 to pull out the prelude to the «T Tunshi *. Wucheng. Lishu's substrate 201 and sealing plate: ★ glass substrate, or substrate, board. Collar, 丨 Silicon substrate and glass ·: Using the points made in Figures 2a to 2h to penetrate the ancient phase-from, can be used in six IT two ice 丨 ^ 70% r ^ frequency% module module is also used in The method of making the tin shot on the front side of the f board.

= To complete wafer-level die fabrication and packaging. Section 3D illustrates an embodiment of this package. Firstly, a 3 ^ 3d picture is 44 ^ y, and another wafer-level substrate 3 01 is used for sealing. On a wafer-level substrate 300, which is used as a capping substrate 301, the front surface of the substrate 301 is more beautiful, and the shape of the cap is etched at the wafer level of the north. Surface defines and seals a metal layer in the inner groove

Page 14 490771 V. Description of the invention (12) 304 ′ f The production of the substrate cap 3301 is completed. After that, the substrate cover 301 and the high-frequency module 3002 double-sided single-side alignment machine manufactured on the substrate 300 are aligned with the cover substrate m and the substrate_, The cover substrate 301 and the substrate 300, which have been fixed, are moved into the machine, and then the steps of heating, voltage, or pressure, or plural use steps are performed to complete the bonding process. After joining = the relative position of the board cover 301 and the substrate 300 is as shown in FIG. 3a. The cavity is formed into a cavity 303, and the inner wall of the cavity is a metal layer 304 that can protect internal components from electromagnetic interference, and the aforementioned high frequency is within this cavity. ^ After the sealing substrate 301 is bonded to the wafer-level element substrate 300, it is then deposited by positive electroplating, or is made by conductive resin coating. This step deposits the first metal on the metal connecting substrate 300. ’㈣ ’s step coverage (step comonage) makes gold σ: two are set on the outer side wall of the capping substrate 301, and then a metal pad 307 is defined on the capping substrate 301 by a mask procedure, and then, • Dagger: i Lisi 307 coat as a tin shot 308, or make a tin shot 3 0 9 in the cover groove of the covering layer 3 05, as shown in the heart and%. After that, the complete die-level packaging process of this module can be completed only by over-cutting, and the surface bonding technology (Surface M〇unting sequence)

Technology) ’This high-frequency module is bonded to a circuit board or a ceramic substrate. Fu board 30 ^ he / piece / module is integrated for use. The aforementioned substrate 300 and the cover V, glass substrate, and high-resistance silicon substrate, or the silicon substrate of the glass substrate and the ',' youji ', electric layer, can also be high-resistance silicon substrates. Page 15 ^ 〇77i V. Description of the invention (13) Μ broken glass substrate, or a public lightning board. Pre-deposited on the surface, after the completion of the silicon substrate of the electrical layer and the aforementioned high-frequency component module of the glass-based module, it is also a way of wire bonding. Take out and replace the H 2 by the gold button on the substrate moon. To manufacture its wafer-level die: J. Figures 4a to 4m are diagrams of the present invention using wafer-level dies to make S technology. The commercial frequency component module is installed, and the base is reversed, and it is done from the back of the board. . As shown in FIG. 4a and FIG. 4b, the resistive layer 402 is deposited and defined on the substrate 400 first, and then deposited: the first metal layer 403 is defined by an etching or peeling process. &amp; The first metal layer 403 and the resistance layer 4G2 may form a resistance structure R. Thereafter, as shown in FIGS. & 4 to 4, the substrate is pushed through the substrate 4qq from the back to form a contact window 405, and then a second metal layer 406 on the back is deposited so that this metal layer is connected to the first metal layer 403 on the front, It covers the side wall of the contact window 405 and extends to the back of the substrate 400. Through the way of the screen definition, the first wire on the back of the substrate 40 () and the metal pad 406 can be defined. After the back wires and metal pads 406 are completed, the process of integrating the active and passive components 407 on the front side of the wafer-level base I-board 400 can be continued, and the wafer-level sealing substrate 401 can be bonded to On the glass substrate 丨 40¾, as shown in Figure 4k. After that, the grains are cut, and the individual grains formed are shown in Figure 41. After wiring 408 to the metal on the back of the substrate (pad 406, the signal can be taken out through the back of the glass substrate 408 to complete the packaging of the high-frequency module. The aforementioned substrate 408 and the cover substrate 4 〇1 can also be a glass substrate and a high-resistance silicon substrate, or a silicon substrate with a pre-sinked, dielectric layer on the glass substrate, or a high-resistance silicon substrate and a glass-based: plate 'or on it. A silicon substrate and a glass substrate with a dielectric layer deposited in advance.

Page 16 490771 V. Description of the invention (14) p The high-frequency component module can also be designed by different processes, and the signal can be taken out as a tin shot on the substrate moon coat. Figures 5a to 5m are diagrams showing the packaging of high-frequency components using the manufacturing and packaging technology of crystalline silicon and grade dies. The back of the wafer and f wafer-level substrates is taken out by making tin balls. The second signal is private. As shown in FIG. 5a and FIG. 5b, the resistive layer 502 is firstly defined and defined at the wafer level, and then the first metal layer 503 is deposited and then etched or stripped. This first metal layer can form a resistive junction with electricity. Thereafter, as shown in FIG. 5c to the first surface, the substrate is penetrated to form a contact window 505, and then a second metal metal layer on the back is deposited to connect the first metal layer 503 on the front and cover the contact (extended from the side wall of 505 to the wafer). The back of the level substrate 500. By defining the mask, the back of the wafer-level substrate 500 can be defined with a back wire, metal 塾 506. To be completed back wire and metal 塾 5 After 〇6, as shown in Figures 2a to 2h, the integrated active and passive components 507 can be fabricated on the front side of the wafer and the substrate 500, and the wafer-level capping substrate 501 can be connected to the ^ SS level: on the substrate 5㈣, as shown in FIG. 5k. After that, as shown in FIG. 5i, it is possible to make a tin-lead ball 5 on a metal pad 506 on the back of the wafer-level substrate 500. 〇8 于 • 金 〈It is a pad to take out the signal. You can also make a tin ball 509 as shown in Figure 5m in the contact window 50 5 of the cover metal layer, and take out the signal. The gift 500 and the cover substrate 5G1 can be Glass substrate and high-resistance m glass substrate and silicon substrate with pre-deposited dielectric layer on it, can also be = glass substrate, or pre-deposited dielectric on it "Board 17th page 490771 V. Description of the invention (15) Figures 6a to 6e illustrate another use of adhesive iayer 'as the interface between the cover and the substrate for packaging high-frequency component molds. F. First, according to the process method shown in Figures 2a to 2h, a high-frequency module 60 including active and passive components is fabricated on a wafer-level substrate_, and then another wafer-level substrate 601 is used to make a cover. Then, it is sequentially plated with a metal layer 603, and etched to form a cover shape, as shown in the figure. Then, an adhesion layer 6 04 is attached to the cover substrate. This adhesion layer 604 can be a tin-lead ball, Photosensitive resin (UV Epoxy), BCB, or other materials that can improve the bonding ability of the capping substrate 6101 and the dielectric protective layer 606 or the metal layer 607 on the substrate 6 ^ 0 (refer to Shell Material 5). The wafer-level capping substrate 601 and the wafer-level substrate 60 0 are aligned and pressed, and then the layer 6 04 can bond the capping substrate 601 to the substrate 600. The bonded wafer The relative position of the stage cover 601 and the wafer-level substrate 600 is shown in Fig. 6b. Then, as shown in Figs. 6cW, 6d, and 6e, the round-shaped stage is successively described. This sealing is performed by cutting 601 and wafer-level substrate 6 q 〇, and then wiring to the metal pad on the die to complete this high-frequency module. It is the same as the first embodiment: the substrate described in this embodiment The 600 and the capping substrate 601 can be; a glass substrate and a high-resistance silicon substrate, or a glass substrate with a J substrate :: electrical layer silicon substrate deposited thereon, or a high-resistance silicon substrate and A glass substrate, or a silicon substrate and a glass substrate on which a dielectric layer is deposited in advance. Figures 7a to 7f are the sixth embodiment of the present invention. When the high-frequency components and modes are completed at the wafer level After the front side of the substrate, related active and passive components that need to be integrated can also be bonded to the back side of the wafer-level substrate in a wafer bonding manner. The gas manufacturing method is shown in Figures 7a to 7f. First, according to the manufacturing process of Figures 2a to 2h_, a high-frequency module is fabricated on a wafer-level glass substrate 700. Page 18 490771 V. Description of the invention (16) --- ~ --- 7〇2, Then, the substrate 700 is pushed through the substrate 700 by means of electrical discharge machining, holmium laser, ultrasonic or dry, engraving, etc., so as to form a lead-through 704 connecting the front and back wires. In addition, another wafer-level silicon substrate 701 is used to make a cap, which is sequentially plated with a metal layer 703 and etched to form a cap shape, as shown in the figure. Thereafter, the aforementioned wafer-level glass substrate 70 0 is bonded to the wafer-level silicon capping substrate 700 by the aforementioned anodic bonding or adhesive bonding, and then a metal 70 is deposited from the back of the wafer-level glass substrate 70 0. 5 In the back surface of the substrate and the lead hole 704, το is electrically connected to the front surface and the back surface. After cutting and capping the substrate 701 and the glass substrate 700, the crystal grains shown in FIG. 7d are formed. After that, as shown in Figure 7e, the passive and active components that need to be integrated are bonded on the back of the glass substrate by die bonding, such as filters, Shi Xiji signal processing IC die, Shi Shenhua Gallium series power amplifiers, etc., are connected to each other and the signals are taken out by way of wiring 707, and finally the module is sealed by 708. On the other hand, after completing the die as shown in FIG. 7d, “the passive and active components 7 0 6 that need to be integrated are bonded to the back side of the substrate 7 0 by the flip-chip bonding method” and then sealed with the sealant 709. The method can complete the manufacturing and packaging of the module as shown in Figure f. In addition, after completing the die • I as shown in Figure 7d; 'the active and passive components that must be integrated 7 0 6 Grain bonding and subsequent hitting, wire bonding, or sealing, or flip-chip bonding and sealing, are combined on the back of the substrate 7 0 0 with a metal cover 7 1 0 or the aforementioned Shi Xi cover 7 1 〇 is bonded to the base plate 70 〇 to protect the components on the back of the substrate 7000, the results are shown in Figure 7g and 7h. And the completed structure as shown in Figure 7g and Figure 7h can also be as described above t The wire or tin ball method mentioned in the embodiment is used to complete the final external electrical property: connection.

Page 19 V. Description of the invention (17) The wafers, glass-grade, high-resistance silicon substrates used in the foregoing sixth embodiment or the first // UU are changed to the following: cover substrate 701 and Shi Xi The seventh embodiment of the cover 710 is changed from glass to glass ΓΛ. This is the first example at the wafer level substrate _::: Ϊ The production of high-frequency module 802 including active and passive components, :: bu at the wafer level An active device 803 is fabricated on the substrate 801 or the active device 803 is bonded to the substrate 801 by die bonding. After that, the wafer-level substrate 80% gold is bonded by the above-mentioned method or the above-mentioned bonding method. = Substrate 8G1 is aligned and bonded to complete its packaging. The material selection of this wafer-level substrate &lt; /, soil plate ^ 0 1 can be all silicon substrates, or all glass substrates, and are bonded by the aforementioned bonding method, or one is a silicon substrate and the other This is a glass substrate, and the substrate 800 and the substrate 801 are aligned and bonded in the manner of anodic bonding or the aforementioned bonding layer bonding. Figure ^ shows the eighth embodiment of the present invention. First, a module 902 containing active and passive components is fabricated on the wafer-level substrate 900 by using the foregoing method. In addition, another wafer-level substrate 901 is used. The high-frequency module is produced in the manner described above. After ° ', another wafer-level substrate 9 04 is used as the bonding substrate to bond the two substrates 90 0 and 901. First, the substrate is defined and etched on the wafer-level substrate 904. In order to form a space for placing the still frequency modules 902 and 903, the wafers, substrates 90, 904, and 901 are then bonded in the wafer bonding machine to complete the packaging of the south frequency module. The material selection Y of the wafer-level substrate 900 and the substrate 901 may both be Shi Xi substrates, and the bonding substrate 904 is a glass substrate, which are bonded to each other by an anodic bonding method; or the aforementioned wafer-level substrate 900 and substrate 901 All ^ U771 V. Description of the invention (18) is a glass substrate, and the bonding substrate 9 04 is a silicon substrate, and they are also bonded by anodic bonding; wafer-level substrates 900, 900, and 900 can also be selected. It can be made of various materials such as silicon substrate or glass substrate, and it can be aligned and bonded by the above-mentioned adhesive layer bonding method to complete the module packaging process. Fig. 10 illustrates a method of manufacturing and packaging a high-frequency module of an integrated integrated passive component made by the aforementioned method using a flexible flexible board as a substrate. As shown in Fig. 10, the substrate 100 is a flexible material, such as polyethylene. After the buffer layer 001 is made on the substrate, a metal layer is deposited with &amp; as the metal pad 1002 '. On the metal pad 1002, a tin-lead ball 1003 can be grown. After that, it must be assembled and integrated. The integrated passive components can be fixed on the flexible substrate by remelting tin-lead balls in a standard process in Surface Mounting Technology. Other various Shi Xiji manufactured by different processes Active components 丨 0 05 or other non-silicon-based active components 006 can also be assembled on a flexible substrate 10000 in this way, and then the current process of sealing and dancing or adding a metal cover can be used to Complete the production of the module. The 104 element mentioned in the process of the present invention can be completed by using the method mentioned in the first embodiment of the foregoing FIG. 2a to FIG. 2h. • 丨. · ': Each of the embodiments described above can realize wafer-level die packaging of high-frequency modules in various manufacturing methods. This packaging process also has the advantages of providing wafer-level testing and wafer-level burn-in. As shown in FIG. 11, which is a schematic diagram of the aforementioned packaging process before capping and bonding, various types of active components 1 1 01 and passive components 丨 〇 2 are fabricated on a wafer-level substrate 丨 丨 〇 2 Before the cover is joined and cut, a wafer-level test can be performed at this stage. The substrate is placed on a hot pad 11104 in a cavity 1103 with a controlled temperature and humidity, and a probe (pr〇be) 11 is used. 〇5 amount

Page 21 490771 V. Description of the invention (19) '----- Test the system-level characteristics under each condition, and select the available chips (Kn〇wn G〇〇d D 1 e, KGD) to cover the performance. Join. Defective grains can be found through the measurement results, and then trimming is performed by laser and other methods to meet the specifications, or defective grains are selected for recycling for rework before sealing and bonding. Performing wafer-level testing can avoid the use of bad chips, which can cause bad integrated modules, and the aforementioned wafer-level chip seals 1 do not require the step of filling (unde rfi 丨 i). , So heavy industry is allowed. From the foregoing, the present invention can be described based on specific embodiments and the accompanying drawings. Anyone familiar with this technology can refer to this description to understand this description more clearly. Different modifications and combinations of the examples and other embodiments of the invention. Therefore, the above examples are intended to describe the present invention, but not to limit the invention. References: ^ 1. C. Faulkner,, f RF modules enables an integrated approach to system design, n Wireless Systems Design, Dec. 2000, pp · 37-40. I, • 丨:, 2. G · Ronald, nThin -film pass i ve integration yields tiny Bluetooth module, 丨, Wireless Systems • .Design, Aug. 2000, pp. 23-30. Lu 3. JJ Yao,, fRF MEMS from a device perspective,, f Journal of Micromechanics and Microengineering , 10, pp.9-38, 2000. 4. M. Esashi, M Encapsulated Micro mechanical

Page 22 490771 V. Description of the invention (20) sensors,, f Microsystem Technologies, 1, pp. 2-9, 1 994. 5. F. Niklaus, P. Ennoksson, E. Kalvesten, and G. Stemme, 丨 丨Low-temperature full wafer adhesive bonding, &quot; Journal of Micromechanics and Microengineering, 11, pp. 100-107, 2001.

490771 Brief description of the drawings Figures 1a to 1d are schematic diagrams of the structure of a passive component high-frequency module integrated in the prior art. '' Brother 2a to Brother 2j are diagrams in the present invention using wafer level chip scale package (WLCSP) technology, the substrate on which the high-frequency module is fabricated and the cover made of another substrate are bonded to each other A flowchart of taking out signals by wiring on the front of the substrate. Figures 3a to 3d show the method of making a tin-lead ball on the front side of the substrate after the substrate on which the high-frequency module is fabricated and the cover made of another substrate are bonded to each other in the wafer-level die packaging technology of the present invention. Take out the signal map. (Figures 4a to 4m show the use of wafer-level die packaging technology in the present invention. The substrate on which the high-frequency module is fabricated and the sealing seedling made of another substrate are bonded to each other. The flowcharts in Figures 5a to 5m illustrate the use of wafer-level die packaging technology in the present invention where the substrate on which the high-frequency module is fabricated and the cover made of another substrate are connected to each other: the substrate is fabricated on the back of the substrate after fabrication. The process of taking the signal out of the tin-lead ball method: Figure. "Figures 6a to 6e are the seals made of the substrate on which the high-frequency module is fabricated and another substrate in the present invention using wafer-level die packaging technology. Cover &lt;, (After bonding to each other by the adhesive bonding method, take out the signal 2 on the front side of the substrate (signal flow chart.) Figures 7a to 7h show the use of wafer-level die packaging technology in the present invention. After the substrate on which the audio module is made and the other substrate are sealed, they are bonded to each other by anodic bonding or adhesive bonding, and then on the back of the substrate.

Type 1 is a simple description of the process flow diagram of the gate, moving element. Fig. 8 shows the substrate of the present invention using s as a high-frequency module, and another compound ®, ..., and die packaging technology, which is fabricated on top to complete the production of high-frequency modules = the substrates with active components are connected to each other ^ π take 1F <flow chart. Figure 9 is a substrate plate 8Θ of the present invention using a high-frequency module. In the die packaging technology, two bonding substrates made of a high-frequency module to complete the flowchart of a high-frequency module are connected to each other. Figure 10 is the present invention The flexible flexible board is used as the substrate, and the process flow chart of the component can be used in the i.e. '11. The active and passive brothers joining various silicon-based and non-silicon-based devices are shown in Figure 11. This is a high-frequency module made by the present invention. Box lamp BB round-level test and measurement of high-frequency module system special note Η Japanese yen-level burn-in schematic diagram-the reference numerals and their names in the diagram> '10, 201, 300, 400, 500, 600, 700, 800, 900, 901, 1 0 0 0, 1 10: substrate, 11, 2 0 2, 4 0 2, 5 0 2: resistance layer "12, 1, 203, 403, 503: first metal pattern k 14, 2 0 7: Second metal pattern. 17, 211: Third metal pattern 13: First dielectric layer 15: Second dielectric layer '18: Third dielectric layer

Page 25

Brief description of the drawing 16: L: Structure of the buffer layer microwave switch Inductive structure or MEMS g Resistor structure Capacitive structure 205 206 207 209 210 213 Covering substrate 904 214 1101, 215; 216 306 Two metal layer protective layer contact window 301, 401, 501 601, 701, 710, 801, 1007 Bonding substrate 302, 407: High-frequency module 3 03: Cavities 304, 603, first metal layer 507 ^ 602 &gt; 702 ^ 802 &gt; 902 ^ 903 703 ,: metal layer 3 0 5, 5, 0 6, 70 5: metal pad 3 0 8, 3 0 9, 5 0 8, 1 0 0 3: tin-lead ball 212, 706, 803, 1004, 1005, 1006, 1102: Active and passive components 405, 505, 704: Contact window 604: Adhesive layer 217, 408, 6 0 5, 70 7: Hit, wire

Page 490 771

Page 27

Claims (1)

490771 Amendment No. 90109115 Scope of patent application 1. A high-frequency module integrating active and passive components, including: an insulating substrate; a resistive layer deposited on the insulating substrate; formed on both ends of the resistive layer and extending on the insulating substrate A first metal layer constituting a resistance structure and a front first wire and a metal pad; a first protective layer formed on a portion of the first metal layer extending on the insulating substrate; and the first layer formed on the resistance layer A dielectric layer on a metal layer; a second metal layer formed on the dielectric layer, so that the first metal Layer, dielectric layer and second metal layer constitute a capacitor structure; a second protective layer that covers passive elements such as resistors and capacitors and is evenly coated on an insulating substrate; a contact window formed on the second protective layer; A third metal layer deposited and defined on the second protective layer; and a main and passive element formed on the second protective layer and the third metal layer. 2. A method for manufacturing a high-frequency module integrating active and passive components, including the following steps: Provide a substrate; Deposit and define a resistance layer on the substrate; Deposit and define a first metal layer; deposit and define a first protective layer as a first metal layer to be isolated from a metal layer on a cap after packaging; deposit and define a dielectric layer and a second metal layer; i n-on) forming a second protective layer; Page 28 Niu Liuzheng, apply for a special ^ * on the first layer of Kuan, define the second wire that contacts f 'on the protective layer and deposit and define the third gold *% to the front; 3 make on the second protective layer Various active and passive components. The second protection patent covers the first high-frequency mode stage, in which active and passive components such as silicon-based signal processing are formed on the lc, non-'2 layer, or amplifier, flash M (flash — eight dual-bit signal processor, etc.) The main method is described in item 2 of the scope of the invention, in which various electrodes are fabricated to include a variable electrical type inductor or a micro-switching element or a micro-electro-mechanical type under the bottom layer using a second wire as a plating structure. Step 5: If a method for packaging high-frequency modules integrating active and passive components includes providing a first substrate and a second substrate; making a high-frequency module on the first substrate; making a cover on the second substrate; Deposit gold in the inner groove of the second substrate as the cover, and align the second substrate as the cover with a high frequency and ', and then fix it with a jig; The second base of the cover ... The substrate is moved into the θ-sheet bonding machine, and the heating or voltage step ^ is performed, or the plural steps of the foregoing three methods are used to cut the 乂 and is ordered by the first lead on the front; To pull out Number., Is playing into the Ding pad Page 29 490771 VI. The steps for applying for a patent are as follows: a method for sealing a high-frequency module of a whole mouth of active and passive components, including providing a first substrate and a second substrate; and, making a high-frequency module on the second substrate; making on the second substrate Cover · j is used as the first part of the cover, and the inner side of the substrate is used as the second part of the cover. ^ ^ / Build-up metal, aligned with each other, and then fixed by a fixture; /, the first substrate of the 3-way frequency module After the solid phase is sealed, the substrate is moved into the wafer bonding machine, and the two substrates and the first containing the high-frequency module are pushed; or the three methods described above; number;: ;; Goga and electricity f; pressure The step of joining elements suddenly forms a metal layer from the front and the flail metal layer can climb on the first metal layer on the soil plate as a cover ^ on the side wall of the second edge of the cover; The tin-lead ball is produced on the surface; the metal pad is defined, and the metal pad 7 is entered: Γ cut to complete the wafer-level die packaging process. For example, in the scope of patent application H1, a cavity is formed in the inner groove of the kilogram, and the functional elements covered in the encapsulation method 1 of item 6 are not subject to external electromagnetic waves; the wall is a metal layer to protect the interior of the cavity. . Disturbance, and high-frequency module functional components8. An ancient step of integrating active and passive components is as follows: &lt; A frequency module packaging method, including providing a first substrate; Sixth, the scope of the application for the patent deposits and defines the resistance layer and the first metal layer on the first substrate, and penetrates the first substrate from the back to form a contact window; μ then deposits a second metal layer on the back of the first substrate to make this metal Layer is connected to the first metal layer on the front surface of the first substrate and covers the side wall of the contact window and extends to the back surface of the first substrate; defines the first back wire and metal pad on the back surface of the first substrate; — The substrate is being cut; 9 in! : ""; The signal is taken out by wire bonding on a surface metal pad. 9 · A high-frequency chip integrating active and passive components is as follows: π shoulder module packaging method, including providing a first substrate and a second substrate; Make high-frequency modules on the top; etch through the first substrate to form substrate holes; remove the lead connected to the lunar surface to make a cover on the first substrate; The second substrate of the cover contains metal deposits; they are aligned with each other, and then fixed with a clamp; "The first substrate phase of the ASU module moves the fixed second base substrate as a cover to the wafer bonding machine, and adds The first step of the temperature 3 audio frequency module, or the multiple use or dusting steps of the foregoing three methods; and 70% of the bonding process deposits and defines the metal on the back of the lead-through hole and the substrate; —The metal pad on the back of the substrate is made of tin jealousy. 10. If the 8th or 9th degree of the scope of the patent application is applied, the seal is pulled out. The cavity inside the cover forms a cavity, and the inner wall of the cover is: // Where the seal is located in this cavity Inside. "Magnetic interference" and high-frequency module functional element 11 · A high-level integration step of active and passive components is as follows: · Behr group packaging method, including providing a first substrate and a second substrate; making a high-frequency mode on the first substrate Group; making a cover on the second substrate; etching to form a cover shape, plating a metal layer on the second substrate in order to attach an adhesive layer to the cover substrate; aligning the first substrate with the second substrate, Press people, add pressure 'or the plural use methods of the foregoing: heat treatment or external two cut two lines, you can complete this _ module includes step X kinds of high-frequency module integration of active and passive components: ^^, provide the first A substrate and a second substrate; making a high-frequency module on the first substrate; #passing through the first substrate to form a base hole; a bow connected by a lunar wire 丨 making a cap on the second substrate; Metal is deposited in the inner groove of the two substrates; 490771 is the amendment i No. 9 (η_κ VI. The scope of the patent application is to align the second substrate as a cover with each other, and then fix it with a missing piece; ",,, and The first substrate phase moves the fixed second substrate, which is the cover, into the wafer bonding machine, and performs heating or electricity = the first step of Wu Er, or the steps of using the plural methods of the foregoing three methods. ; Where the process of joining deposits and defines the metal on the lead-through and the back of the substrate; cuts and joins the components to be integrated on the substrate and wire on the metal pad on the back of the substrate to pull out 俨, = sealant or gold ^ The cutting base cover covers the substrate. The components include the following steps. The method of packaging the active and passive components to the frequency module includes providing a first substrate and a second substrate; making a high frequency module on the first substrate; A substrate to form a lead L · that connects the front and back wires of the substrate, and make a cover on the second substrate; deposit metal in the inner groove of the second substrate as the cover; Align with a high-frequency module and fix it with a clamp. The second substrate will move the fixed second substrate as a cover and the first substrate with the high-frequency module into the wafer bonding machine for heating or heating. Pressure or applied pressure step, or a plurality of steps used in the aforementioned three methods, the program is completed engaged; [deg.] 490771 No. 9010911R patent application scope deposits and defines the metal on the back of the via and the substrate; flip-chip bonding of the active and passive components to be integrated in North America with a sealant or metal cover or Shixi Meishe Yunwan: g: Gan Yue ,, 1 4 A component inserted into the back of the substrate. 14. A high-frequency module integration step of integrating active and passive components is as follows: a method for mounting, including providing a first substrate and a second substrate; making a high-frequency module on the first substrate; making a cover on the second substrate; The components are bonded on the first-beauty board as the cover. Align each other, and then fix it with a clamp. The substrate phase of the substrate is to be used as a sealed stem after the substrate phase is fixed. The A substrate is moved to the wafer. In the bonding machine, T enters the first step of 7 $ 1, 3 surface frequency module, or the aforementioned = method 3 L ΐ step of voltage or pressure 4 do not return to the plural steps, 4 y sequence. / Kind of process of joint 15 · A seal of a high-frequency module integrating active and passive components, including the following steps:… confrontation method, including providing a first substrate, a second substrate and a third substrate; on the f-substrate Making high-frequency modules; making high-frequency modules on the second substrate; defining and forming a joint substrate outside shape on the three substrates; of; aligning the first substrate and the third substrate with each other; The first substrate and the third substrate are moved into the wafer bonding machine 6. The scope of patent application or the plural of the three methods mentioned above are the steps of heating or voltage or pressure to complete the bonding process; align the second substrate with the gold containing the first substrate, and then use jigs Fix it; /, the composite substrate phase of the second substrate moves the fixed second substrate and the combined substrate to the wafer bonding machine, and enters the multiple steps of the if board and the third substrate, or uses the voltage or Order of pressure. The process of completing the joining step 16 is as follows: A kind of integration of the main and sub-stations includes the following steps: The packaging method of the frequency module, the substrate is covered; the first flexible lead and the first flexible flexible board are provided. And the first metal layer formed on the first flexible flexible board as a pad; 幵 &gt; a tin slanting ball formed on the metal pad; a silicon-based active-opening of a plurality of two components to be integrated and bonded to tin-lead ^ Shi Xiji active component, or the former i will be integrated as described in the patent application, the integrated integrated passive component is connected to the tin lead, as mentioned in the above item or item 2, and a cover is made on the second substrate. · 'Use this as the cover of the second substrate tray with the substrates aligned with each other, and then-—. ,,, and the first flexible seven and complete the package; ,,, the common method of the assembly process fixed 3 Move the fixed _ flexible substrate to the wafer bonding machine = ς, including high-frequency mode No.-Inner Star Warming or Voltage or I Case No. 9010911R 6. The scope of the patent application to complete the process of joining including the step of step 'or a plurality of steps of the foregoing three methods. ‘Mentioned in’ ‘Mentioned in’ Mentioned in ^ 17. The second substrate of the packaging method according to item 6 of the patent application may be a metal material cover. 1 8 · If the second substrate of the packaging method No. 16 of the patent application scope is a silicon substrate containing a metal coating film. 々19 · If the second substrate of the packaging method No. 16 of the scope of patent application is used, the second substrate may be a broken glass substrate. 2 0 · — A method for performing wafer-level testing of high-frequency modules is as follows: 笫 制作 制作 Make high-frequency modules on a wafer-level first substrate; use a probe or probe card on the wafer The system characteristics of the directional frequency module in the "level substrate". 21. If the method in the scope of patent application No. 18 has been tested, the active components in question can be recovered and replaced. Any T 22. If the method of applying for the scope of patent No. 18 is used in the test process :: using field shot processing: ¾ (Laser trimming) and other common methods in the industry to trim the characteristics of passive components at the wafer stage. 23. According to the method of applying for the item No. 18 of the patent scope, after the test is completed and the grade is sealed, the module still in the wafer state can be placed in the ring, and then supplemented with a probe or wafer-level proca To apply external AC telecommunication wall or DC bias to perform long-term burn-in and other accelerated aging treatments.