TWI232576B - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

Info

Publication number
TWI232576B
TWI232576B TW092127176A TW92127176A TWI232576B TW I232576 B TWI232576 B TW I232576B TW 092127176 A TW092127176 A TW 092127176A TW 92127176 A TW92127176 A TW 92127176A TW I232576 B TWI232576 B TW I232576B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
insulating film
aforementioned
carbon
patent application
Prior art date
Application number
TW092127176A
Other languages
English (en)
Chinese (zh)
Other versions
TW200409341A (en
Inventor
Masayuki Tanaka
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of TW200409341A publication Critical patent/TW200409341A/zh
Application granted granted Critical
Publication of TWI232576B publication Critical patent/TWI232576B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW092127176A 2002-10-15 2003-10-01 Semiconductor device and its manufacturing method TWI232576B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002299918A JP2004134687A (ja) 2002-10-15 2002-10-15 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
TW200409341A TW200409341A (en) 2004-06-01
TWI232576B true TWI232576B (en) 2005-05-11

Family

ID=32288916

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092127176A TWI232576B (en) 2002-10-15 2003-10-01 Semiconductor device and its manufacturing method

Country Status (4)

Country Link
US (2) US20050118838A1 (enExample)
JP (1) JP2004134687A (enExample)
CN (1) CN1269223C (enExample)
TW (1) TWI232576B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004134687A (ja) * 2002-10-15 2004-04-30 Toshiba Corp 半導体装置及びその製造方法
US7306995B2 (en) * 2003-12-17 2007-12-11 Texas Instruments Incorporated Reduced hydrogen sidewall spacer oxide
US7422968B2 (en) * 2004-07-29 2008-09-09 Texas Instruments Incorporated Method for manufacturing a semiconductor device having silicided regions
US7732342B2 (en) * 2005-05-26 2010-06-08 Applied Materials, Inc. Method to increase the compressive stress of PECVD silicon nitride films
KR100652427B1 (ko) * 2005-08-22 2006-12-01 삼성전자주식회사 Ａｌｄ에 의한 도전성 폴리실리콘 박막 형성 방법 및 이를이용한 반도체 소자의 제조 방법
JP2007287856A (ja) * 2006-04-14 2007-11-01 Toshiba Corp 半導体装置の製造方法
US20080293192A1 (en) * 2007-05-22 2008-11-27 Stefan Zollner Semiconductor device with stressors and methods thereof
US7803722B2 (en) * 2007-10-22 2010-09-28 Applied Materials, Inc Methods for forming a dielectric layer within trenches
JPWO2010061754A1 (ja) * 2008-11-28 2012-04-26 学校法人東海大学 不揮発性半導体記憶装置及びその製造方法
JP6035007B2 (ja) * 2010-12-10 2016-11-30 富士通株式会社 Ｍｉｓ型の窒化物半導体ｈｅｍｔ及びその製造方法
JP2014514757A (ja) * 2011-03-28 2014-06-19 日本テキサス・インスツルメンツ株式会社 化学的に改変されたスペーサ表面を有する集積回路
CN102790008A (zh) * 2011-05-16 2012-11-21 中芯国际集成电路制造(上海)有限公司 形成接触插栓的方法
US9355910B2 (en) * 2011-12-13 2016-05-31 GlobalFoundries, Inc. Semiconductor device with transistor local interconnects
CN103489787B (zh) * 2013-09-22 2016-04-13 上海华力微电子有限公司 提高源漏接触和氮化硅薄膜黏附力的方法
JP6529956B2 (ja) * 2016-12-28 2019-06-12 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ 半導体装置の製造方法、基板処理装置およびプログラム
CN110233106B (zh) * 2018-03-05 2022-10-25 中芯国际集成电路制造(北京)有限公司 半导体结构及其形成方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW297142B (enExample) * 1993-09-20 1997-02-01 Handotai Energy Kenkyusho Kk
JP2956571B2 (ja) * 1996-03-07 1999-10-04 日本電気株式会社 半導体装置
JP3050165B2 (ja) * 1997-05-29 2000-06-12 日本電気株式会社 半導体装置およびその製造方法
JP2001168092A (ja) * 1999-01-08 2001-06-22 Toshiba Corp 半導体装置およびその製造方法
TW495887B (en) * 1999-11-15 2002-07-21 Hitachi Ltd Semiconductor device and manufacturing method of the same
JP3914452B2 (ja) * 2001-08-07 2007-05-16 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP3586268B2 (ja) * 2002-07-09 2004-11-10 株式会社東芝 半導体装置及びその製造方法
JP2004134687A (ja) * 2002-10-15 2004-04-30 Toshiba Corp 半導体装置及びその製造方法
US7105439B2 (en) * 2003-06-26 2006-09-12 Taiwan Semiconductor Manufacturing Co., Ltd. Cobalt/nickel bi-layer silicide process for very narrow line polysilicon gate technology
US7148546B2 (en) * 2003-09-30 2006-12-12 Texas Instruments Incorporated MOS transistor gates with doped silicide and methods for making the same

Also Published As

Publication number Publication date
CN1497737A (zh) 2004-05-19
JP2004134687A (ja) 2004-04-30
TW200409341A (en) 2004-06-01
CN1269223C (zh) 2006-08-09
US20060249800A1 (en) 2006-11-09
US20050118838A1 (en) 2005-06-02

Similar Documents

Publication Publication Date Title
TWI232576B (en) Semiconductor device and its manufacturing method
US11404405B2 (en) Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same
CN101494192B (zh) 接触孔插塞的制造方法
TW556273B (en) Method for establishing ultra-thin gate insulator using anneal in ammonia
TWI497647B (zh) 使用矽化物電極和矽化物－鍺化物合金電極之ｃｍｏｓ整合方案
US20100052079A1 (en) Semiconductor devices and fabrication process thereof
US6645798B2 (en) Metal gate engineering for surface p-channel devices
TW526596B (en) Semiconductor device and a process for forming the same
US8610181B2 (en) V-groove source/drain MOSFET and process for fabricating same
TW201013929A (en) Power mosfet with a gate structure of different material
JP2005510872A (ja) シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法
TWI227509B (en) Semiconductor device and the manufacturing method thereof
JP3803631B2 (ja) 半導体装置及びその製造方法
CN1790740B (zh) 半导体器件及用于形成栅极结构的方法
USRE42180E1 (en) Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same
JP2006128427A (ja) 半導体装置の製造方法及び半導体装置
JP3768871B2 (ja) 半導体装置の製造方法
US6348413B1 (en) High pressure N2 RTA process for TiS2 formation
JP2005243664A (ja) 半導体装置およびその製造方法
KR20110021782A (ko) 컨택트 형성 방법, 반도체 장치의 제조 방법 및 반도체 장치
US20080067612A1 (en) Semiconductor Device Including Nickel Alloy Silicide Layer Having Uniform Thickness and Method of Manufacturing the Same
TW432663B (en) Method for forming semiconductor plug
TW531795B (en) Self-aligned metal silicide process using cobalt silicide
JP2005026273A (ja) 半導体装置及びその製造方法
JP2004349607A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees