TW548798B - High Q inductor with faraday shield and dielectric well buried in substrate - Google Patents

High Q inductor with faraday shield and dielectric well buried in substrate Download PDF

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TW548798B
TW548798B TW091102429A TW91102429A TW548798B TW 548798 B TW548798 B TW 548798B TW 091102429 A TW091102429 A TW 091102429A TW 91102429 A TW91102429 A TW 91102429A TW 548798 B TW548798 B TW 548798B
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well
inductor
substrate
scope
patent application
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Raul E Acosta
Jennifer L Lund
Robert A Groves
Joanna Rosner
Steven A Cordes
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/34Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36Electric or magnetic shields or screens
    • H01F27/363Electric or magnetic shields or screens made of electrically conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/34Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36Electric or magnetic shields or screens

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Inorganic Insulating Materials (AREA)
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Description

548798 A7 ____B7 五、發明説明(夏 ) 技術領域 本發明係關於高頻率積體電路内高Q值電感器之設計及結 構。 背景 目刖%境中可以看出無線通信與無線產品之快速增加, 諸女數據機、傳呼機、2波段收音機、振蓋器及行動電話, 其包括具有咼頻率操作電感器之積體電路(iCS),欲使這些 產品較有效率、精巧、質輕及在無線電頻率與微波頻率下 呈穩定則會有壓力。因此必須有效率且經濟地製造包括電 感器在内之最大量要求裝置與元件於單一…内,及限制處 理步驟之數量與類型而相符於目前IC製造中所實施者。將 習知積體m路之性能推進到高頻率範圍即會發現需克服以 達成所要求目標之限制,電感器即一已做檢查以利理想化 之區域。 品質因數Q為一 1C中普遍接受之電感器性能指示,Q係如 圖1所示一電感器内之功率損失與能量儲存,高Q值係相符 於低電感器與基板損失、低串聯電阻與高電感。高頻率可 視為較大於大約500 MHz,為了此頻率範圍則有必要取得 一大於大約10之Q值。製造ICs於矽基板上之技術已妥為建 立,不利的是,製於一具有矽基板之1(:内之平面式螺旋電 感為典型上會在RF時呈現高損失,且因而呈現低Q值,呈 現之損失係多項因數所致。由電感器產生之電磁場係對半 導體石夕基板以及包含1C在内之裝置與導電線有不利影響, 此交互作用之結果即為耦合、交聯雜訊 '電阻、爭生式電 548798 A7 B7 五、發明説明(2 容、減小電感及Q值降低所致之損失。相關於一矽基板上之 特定螺旋狀電感器之Q之元素係载述於5,76〇,456號美國專 利第一攔第5 5行及以下者内。 、 改善Q因數之一方法為改變1C所包含之材料,使用矽以外 之基板諸如GaAs及藍寶石亦屬可行,惟,其需保持製程盡 I相容於已妥為建立之現有矽技術,而非進行製程變化及 處理相關於使用非石夕基板材料之現有問題。
Uao等人之6,〇46,109號美國專利揭露一方法以改善一矽 基板上之1C之Q值-即產生隔離區以將電感器分隔於有負面 影響之其他區或裝置,隔離區係藉由一高能量束諸如χ射線 或伽瑪射線,或藉由粒子諸如質子及重氫子,投射於選定 之矽半導體區,造成投射區之電阻增加而產生。投射之貫 穿深度可依需要加深,以減雜訊、線損失及確使裝置分 隔。 刀 改善Q因數之另一方法為改變電感器本身之形狀及尺寸, 以克服平面式螺旋電感器之原有限制。Alf〇rd等人之 6,〇〇8,102號美國專利揭露二種形狀,即螺管形及螺旋形, 用於對準由成型電感器内之111:電流產生之磁場,藉此減小 介電質損失、串擾及增大Q值。
Burghartz 等人之 6,1 14,937、5 884 99〇、5 793 272 及 6,〇54,329號美國專利揭露具有矽基板之高Q值螺管形及螺 旋形電感益以用於高頻率,其揭露多項實施例且皆針對藉 由增加電感以提咼Q值。所揭露結合於丨C内以利提高Q值之 裝置包括:一塗覆有一介電層之基板,具有一螺旋形圳溝
548798 A7
548798 A7 B7 五、發明説明(4 ) --- 等人之5,446,3 1 1號美國專利揭露一建構於矽基板 上之夕層式電感器,其係以絕緣之氧化物疊層。電感器係 呈並聯,以避開串聯電阻且金屬層係利用通孔串聯,可在 2.4 GHz得到一 q值 7。
Van R〇osmaien等人之6,124,624號美國專利揭露一多層式 電感σα 係由緊透、間隔之並聯長方形條堆疊組成,即避免 跨7及/或相交/埋入。諸層係以二氧化矽分隔,該結構據稱 叮&向(5值於25@2 GHz,其利用通孔做多種串聯與並聯式 連接以減小串聯電阻,及加強疊層條之互感。一交錯式堆 疊據稱有助於利用減小寄生式電容而提高Q值。
Zhao等人之6,146,958號美國專利揭露減小串聯電阻,因 而增大Q值,其利用一連續式通孔連接一較低高度之螺旋電 感杰至一罕父南向度者。 改善Q因數之一方法為產生屏蔽或區域於1(:内,其包括材 料或開放空間,以控制或限制電磁線可貫穿IC之範圍,藉 以減少基板損失。Wen等人之6,169,008B1號美國專利揭露 衣成一 微米深之圳溝於一 1C之介電質基板内,且以高電 阻之蠢晶層填入圳溝,磊晶層之摻雜劑濃度較低於基板者 數倍強度,因而可做為一介電質。磊晶層係經回蝕,一介 電層沉積於所有諸層上且電感器捲繞於介電層上,藉以增 加基板與繞組之間電阻及增加Q值。
Chang等人在IEEE電子裝置文ν〇ι.14, No.5公開之,,矽 上之大型懸浮電感器及其使用在一 2微米CMOS RF放大器” 中揭露藉由選擇性蝕刻一螺旋電感器下方之一 2 0 0 - 5 0 0微米 本紙張尺度適用中國國家樣準iCNS) A4規格(210X297公着)
k 548798 A7 B7 五、發明説明(5 ) 深之孔穴,而產生一高Q值螺旋電感器,以減小基板損失與 提高Q值。 ^
Andrews之5,959,522號美國專利揭露一具有上方與下方高 •透磁性之結構,即大於大約1.1 ,其間之一屏蔽層係一含有 螺旋電感線圈之層,且可選擇性包括一圈環。透過一設計 用於減低串聯電阻、渦電流及散失之電阻電流之開放式中 央區域,屏蔽層即相互耦合且聚集電流感應而成之磁力 線,磁力線之濃度可增加一較小區域内之電感。屏蔽層之 一徑向突起圖樣可增加有效之電感,若下方之屏蔽層為非 導電性,其亦可做為對於基板之屏蔽,且提高9值。
Grzegorek等人之5,760,456號美國專利揭露介置一圖樣化 之嵌段式導電平面,其具有一氧化物絕緣層以覆蓋頂、底 表面,其功能如同基板層與螺旋電感器層之間之一靜電屏 蔽。導電平面包括一周邊區以電氣性連接於一固定之低阻 抗參考電壓,其包含金屬、多晶矽或基板之一重度摻雜 區。假没其相隔於電感器之距離足夠,則導電平面之設計 及位置即可減小寄生式電容m,及防止電場電流流 至基板且增大Q值,同時減小電感器表面積亦可減小串聯電 阻且增大Q值。該案指稱其在大約2GHz之頻率時提供一高 達6之Q值。
Wen等人之5,918,121號美國專利維持一平面式螺旋電感 器於一矽基板上之概念,及針對於藉由製成一數千〇hm_cm 電阻之磊晶區以減小電感器與基板之間損失,例如輕度摻 以砷與磷之矽。磊晶區係由一氧化物絕緣體圍繞於頂部與 I___ - 9 -_ 本紙張尺度適用中國國私標準(CNS) A4規格(210 X 297公董) 丨 548798 A7 B7 五、發明説明(6 ) 側面上以及基板上,其具有一大約丨〇-2〇 〇hni_crn電阻。由一 中間金屬介電質圍封於頂部與側面上之平面式電感器係位 於磊晶層頂部正上方之氧化物層部分正上方,其結果為減 少感應電流至基板之損失,且增大Q值。
Park等人之6,153,489號美國專利揭露製成一圳溝於矽基 板内’且以絕緣之多孔石夕填入圳溝,其為高電阻材料,然 後塗覆一介電層,在其上製成一下方金屬線及一第二介電 層,隨後為一平面式螺旋電感器圖樣,其經由一通孔以連 接於金屬線。另者,螺旋可製於多孔矽層内。在一變換型 式中,在以多孔矽填入圳溝之前,一相反導電率型式於基 板者之高濃度摻雜劑係植入圳溝内,及在鄰近於且連接於 多孔石夕之一點處製成一多晶矽圳溝電極。替代於離子植入 製成一導電性摻入層,可以使用高度摻雜之多晶矽。施加 一逆偏電壓於基板與摻入層之間可以產生一P-N結合耗盡層 於基板内’生成之結構據稱可進一步減低寄生式電容及減 小金屬層至基板之損失,且增大Q值。 改善Q因數之一方法為重新設計IC實際領域,C〇rriett等 人之5,959,5 15號美國專利揭露藉由留下一開口於中央且其 周圍鬆弛地纏繞以數圈螺旋電感器,有效地減小電感器之 下方相交長度,即螺旋電感器内圈至外連接部之間之導電 線長度。該專利揭露將裝置遠離於L - C槽電路,以消除下方 相交及一共振器内之寄生式互連電阻,且增大卩值。 本發明之結構及方法並未揭露於相關技藝中,本發明之井 係深入基板内,在備有一絕緣層於下方及一低k介電質填入 -10 - 548798 A7 B7 五、發明説明(7 上方深井之基板内之屏蔽位置可以減小耦合於基板與裝置 之寄生式電容,寄生式電容之減小則增加了螺旋電感器之 自我共振頻率,造成增大之Q值。本發明之介電層不需要整 體皆厚,需要高長寬比之連接通孔,以利減小耦合於基板 之寄生式電容。在本發明中,電感器與基板之間之電容性 耦合係藉由僅在電感器正下方增加介電質厚度及電感器之 各圈呈均一距離而減小。在本發明中設置屏蔽於介電質填 充井底部即可降低電感器與屏蔽之間之寄生式電容,增加 電感β螺旋之自我共振頻率,長段形屏蔽可減少渦電流。 本發明之方法可順暢地積合於新的與現有的技術中,使用 一實質有機介電質以增加電感器線圈與基板之間間距可減 J寄生式電谷,及设置一圖樣化導電屏蔽(接地平面)於基板 上之井底部可在任意剩餘寄生式電場到達基板前即終止 之,二者皆有助於增大Q值。其他優點將為習於此技者所明 瞭。 發明概要 本發明之一目的在提供一高Q值電感器於一1(:結構内,其 適用於一高頻率之環境中。 本發明之另一目的在藉由消除電感器放射出之寄生式電場 穿透基板所造成之損失,以增大一積合電感器之Q值。 本發明之又一目的在使用相容於一般採用於1(:製造中之方 法與材料以達成上述目的。 上述及其他目的係在本發明中達成,其中自電感器至基板 之電各性搞合係藉由提供一填入有機低介電常數(k)材料之 ____ - II - 本紙張足度適用中國國家標準(CNS) A4規格(210X297公爱)

Claims (1)

  1. 548798 5_〇2429號專利申請案 A8 中又申請專利範圍替換本(92年6月)g
    ’其中井係斜壁式。 ’其中斜壁式井係以一低k !· 一種用於一積體電路之裝置,包含: a· —半導體基板; b. 一井,設於基板内,該井具有一地板面; c·一導電性接地屏蔽,係呈平面狀地設於井之地板面 上;及 d•一電感器,設於井上方且平行於屏蔽。 力申,專利範圍第1項之裝置,其中基板包含一 fe〇l CMOS 或 BiCMOS 基板。 3 ·如申請專利範圍第1項之裝置,其中基板包含矽、 GaAs、HRS、石英、藍寶石、或SiGe。 4·如申請專利範圍第工項之裝置,其中井係大約2〇微米深 度。 5·如申請專利範圍第1項之裝置 6 ·如申請專利範圍第5項之裝置 介電材料填注。 7·如申請專利範圍第6項之裝置,其中似介電材料包含聚 酸亞胺、SiLk或空氣。 8 ·如申清專利範圍第1項 八雜、$ , 裝置其中導電性接地屏蔽係由 :離《長形共平面段組成’其係共同連接且以—端接 9·ΙΓΐΠ第8項之裝置’其中導電性接地屏蔽係由 屬 '摻雜^、摻雜之多晶碎切化物组成。 1〇.:t請專利範圍第!項之裝置,其中準電 由鈍化/絕緣材料以分隔於基板。 并献係精 548798 A8
    11·如申請專利範圍第1〇項之裝置,其中鈍化/絕緣材料係 Si〇2、S i3N4、或BPSG。 12·如申請專利範圍第j項之裝置,其中電感器係一螺旋平面 式電感器。 13_如申請專利範圍第i項之裝置,其中電感器係藉由一鈍化 /絕緣材料以分隔於導電性接地屏蔽。 14. 如申請專利範圍第13項之裝置,其中鈍化/絕緣材料係 Si〇2、Si3N4、或BPSG。 15. —種製造一導電性接地屏蔽以用於一積體電路内的電感 器之方法,包含·· a•提供一半導體基板,其係以一第一鈍化/絕緣層塗 覆; ’ b·在第一鈍化/絕緣層内進行圖樣化及透過基板上之一 區域以蝕刻一具有壁面與一地板面之井,該區域係預 先選定使邊距較大於預期設於井正上方之一電感器; c .依序以一第一純化/絕緣層、一電感器及一光罩覆蓋 井之壁面與地板面; d·透過光罩以蝕刻一具有連接部至井外之接地屏蔽; e ·順應地施加一第三鈍化/絕緣層於井之壁面與蝕刻後 之接地屏敗,及 f.以低k介電材料填注於井。 16. 如申請專利範圍第15項之方法,其中提供一半導體基板 之步驟包含提供一含有矽、GaAs、HRS、石英、藍寶 石、或SiGe之基板。 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 548798 A8 B8 C8 六、申請—-- 17.如申請專利範圍第15項之方法,其中提供一半導體基板 <步驟包含提供一 FEOL做為一基板。 18’如申凊專利範圍第1 5項之方法,其中鈍化/絕緣層包含 Sl〇2、Si3N4、或BPSG。 19·如申請專利範圍第1 5項之方法,其中蝕刻一具有斜壁面 與一地板面之井之步驟包含使用濕法蝕刻而以一選用於 基板材料之蝕刻劑蝕刻一具有斜壁面與一地板面之井。 %·如申請專利範圍第19項之方法,其中使用濕法蝕刻一井 之步騾包含使用TMAH於一矽基板。 21·如申請專利範圍第15項之方法,其中以一電感器覆蓋井 之壁面與地板面之步驟包含以一金屬、摻雜之矽、摻雜 之多晶矽或矽化物覆蓋井之壁面與地板面。 22·如申請專利範圍第丨5項之方法,其中以一光罩覆蓋井之 壁面與地板面之步騾包含以具有連續性於井外之固化光 致抗姓劑覆蓋井之壁面與地板面。 23·如申請專利範圍第15項之方法,其中以低k介電材料填 注於井之步騾包含以低k固化聚醯亞胺填注於井。 24. —種製造一積體電感器以用於一低損失Ic之方法,包含 執行如申請專利範圍第1 5項之方法;及持續製程步驟以 元成1C,包括製造一電感器於井之垂直方向正上方之步 驟。 25. 如申請專利範圍第2 4項之方法,其中井係填以一有機介 電質,及持續製程步驟以完成1C且製造一電感器之步驟 包括蝕刻於向下延伸入井内之電感器開口圈之間,及利 用反應離子蝕刻以去除有機介電質。 本紙張尺度適用中國國家標準*(CNS) A4規格(210 X 297公釐)
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Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6492708B2 (en) * 2001-03-14 2002-12-10 International Business Machines Corporation Integrated coil inductors for IC devices
US7310039B1 (en) 2001-11-30 2007-12-18 Silicon Laboratories Inc. Surface inductor
US6777774B2 (en) * 2002-04-17 2004-08-17 Chartered Semiconductor Manufacturing Limited Low noise inductor using electrically floating high resistive and grounded low resistive patterned shield
US7141883B2 (en) * 2002-10-15 2006-11-28 Silicon Laboratories Inc. Integrated circuit package configuration incorporating shielded circuit element structure
US20040222511A1 (en) * 2002-10-15 2004-11-11 Silicon Laboratories, Inc. Method and apparatus for electromagnetic shielding of a circuit element
US7868723B2 (en) * 2003-02-26 2011-01-11 Analogic Corporation Power coupling device
US9368272B2 (en) 2003-02-26 2016-06-14 Analogic Corporation Shielded power coupling device
US9490063B2 (en) 2003-02-26 2016-11-08 Analogic Corporation Shielded power coupling device
US8350655B2 (en) * 2003-02-26 2013-01-08 Analogic Corporation Shielded power coupling device
US20050014317A1 (en) * 2003-07-18 2005-01-20 Pyo Sung Gyu Method for forming inductor in semiconductor device
US6936764B2 (en) * 2003-08-12 2005-08-30 International Business Machines Corporation Three dimensional dynamically shielded high-Q BEOL metallization
US7075167B2 (en) 2003-08-22 2006-07-11 Agere Systems Inc. Spiral inductor formed in a semiconductor substrate
EP1553812A3 (fr) * 2003-12-11 2013-04-03 STMicroelectronics S.A. Puce à semiconducteur et circuit comprenant une inductance blindée
US7350292B2 (en) * 2004-03-19 2008-04-01 Hewlett-Packard Development Company, L.P. Method for affecting impedance of an electrical apparatus
US7255801B2 (en) * 2004-04-08 2007-08-14 Taiwan Semiconductor Manufacturing Company, Ltd. Deep submicron CMOS compatible suspending inductor
US7005371B2 (en) * 2004-04-29 2006-02-28 International Business Machines Corporation Method of forming suspended transmission line structures in back end of line processing
US7375411B2 (en) * 2004-06-03 2008-05-20 Silicon Laboratories Inc. Method and structure for forming relatively dense conductive layers
KR100632464B1 (ko) * 2004-08-03 2006-10-09 삼성전자주식회사 수동 소자 쉴드 구조를 포함하는 집적 회로 및 그 제조방법
US7663205B2 (en) * 2004-08-03 2010-02-16 Samsung Electronics Co., Ltd. Integrated circuit devices including a dummy gate structure below a passive electronic element
US7283029B2 (en) * 2004-12-08 2007-10-16 Purdue Research Foundation 3-D transformer for high-frequency applications
US7501924B2 (en) * 2005-09-30 2009-03-10 Silicon Laboratories Inc. Self-shielding inductor
JP4908035B2 (ja) * 2006-03-30 2012-04-04 株式会社東芝 半導体集積回路
DE102006022360B4 (de) 2006-05-12 2009-07-09 Infineon Technologies Ag Abschirmvorrichtung
DE102006062844B4 (de) * 2006-05-12 2016-11-17 Infineon Technologies Ag Abschirmvorrichtung zum Abschirmen von elektromagnetischer Strahlung
US8455350B2 (en) * 2006-08-18 2013-06-04 Globalfoundries Singapore Pte. Ltd. Integrated circuit system employing gate shield and/or ground shield
US7489218B2 (en) * 2007-01-24 2009-02-10 Via Technologies, Inc. Inductor structure
US8058960B2 (en) * 2007-03-27 2011-11-15 Alpha And Omega Semiconductor Incorporated Chip scale power converter package having an inductor substrate
US8492872B2 (en) * 2007-10-05 2013-07-23 Taiwan Semiconductor Manufacturing Co., Ltd. On-chip inductors with through-silicon-via fence for Q improvement
US8169050B2 (en) * 2008-06-26 2012-05-01 International Business Machines Corporation BEOL wiring structures that include an on-chip inductor and an on-chip capacitor, and design structures for a radiofrequency integrated circuit
US7811919B2 (en) * 2008-06-26 2010-10-12 International Business Machines Corporation Methods of fabricating a BEOL wiring structure containing an on-chip inductor and an on-chip capacitor
US7948346B2 (en) * 2008-06-30 2011-05-24 Alpha & Omega Semiconductor, Ltd Planar grooved power inductor structure and method
US8237243B2 (en) 2009-03-18 2012-08-07 International Business Machines Corporation On-chip capacitors with a variable capacitance for a radiofrequency integrated circuit
US8164159B1 (en) 2009-07-18 2012-04-24 Intergrated Device Technologies, inc. Semiconductor resonators with electromagnetic and environmental shielding and methods of forming same
EP2302675A1 (en) * 2009-09-29 2011-03-30 STMicroelectronics (Grenoble 2) SAS Electronic circuit with an inductor
JP6009139B2 (ja) * 2010-06-22 2016-10-19 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN102208405B (zh) * 2010-08-24 2015-11-25 华东师范大学 平面螺旋电感
US8648664B2 (en) 2011-09-30 2014-02-11 Silicon Laboratories Inc. Mutual inductance circuits
US8809956B2 (en) * 2011-10-13 2014-08-19 Taiwan Semiconductor Manufacturing Company, Ltd. Vertically oriented semiconductor device and shielding structure thereof
US8659126B2 (en) * 2011-12-07 2014-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit ground shielding structure
US8610247B2 (en) 2011-12-30 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for a transformer with magnetic features
US8644948B2 (en) 2011-10-28 2014-02-04 Medtronic, Inc. Converter device for communicating with multiple medical devices
US8710622B2 (en) 2011-11-17 2014-04-29 Harris Corporation Defected ground plane inductor
US8664717B2 (en) 2012-01-09 2014-03-04 Globalfoundries Inc. Semiconductor device with an oversized local contact as a Faraday shield
US9064868B2 (en) 2012-10-12 2015-06-23 Globalfoundries Inc. Advanced faraday shield for a semiconductor device
US9355972B2 (en) 2014-03-04 2016-05-31 International Business Machines Corporation Method for making a dielectric region in a bulk silicon substrate providing a high-Q passive resonator
TWI615860B (zh) 2015-04-24 2018-02-21 瑞昱半導體股份有限公司 積體電感
CN105140288B (zh) * 2015-09-11 2018-05-01 电子科技大学 射频ldmos器件
US9966182B2 (en) 2015-11-16 2018-05-08 Globalfoundries Inc. Multi-frequency inductors with low-k dielectric area
CN106653568B (zh) * 2016-12-02 2019-04-16 昆山纳尔格信息科技有限公司 一种低干扰电感结构的制造方法
CN106783019B (zh) * 2016-12-02 2018-08-28 江苏贺鸿电子有限公司 一种低干扰电感结构
US10510663B2 (en) * 2017-03-30 2019-12-17 Globalfoundries Inc. Transistor structures having electrically floating metal layer between active metal lines
WO2021081728A1 (zh) * 2019-10-29 2021-05-06 华为技术有限公司 一种半导体器件及其制造方法
US11011459B1 (en) * 2020-02-06 2021-05-18 Qualcomm Incorporated Back-end-of-line (BEOL) on-chip sensor

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5446311A (en) 1994-09-16 1995-08-29 International Business Machines Corporation High-Q inductors in silicon technology without expensive metalization
US5559360A (en) 1994-12-19 1996-09-24 Lucent Technologies Inc. Inductor for high frequency circuits
US5742091A (en) * 1995-07-12 1998-04-21 National Semiconductor Corporation Semiconductor device having a passive device formed over one or more deep trenches
US5760456A (en) 1995-12-21 1998-06-02 Grzegorek; Andrew Z. Integrated circuit compatible planar inductors with increased Q
US5793272A (en) 1996-08-23 1998-08-11 International Business Machines Corporation Integrated circuit toroidal inductor
US5861647A (en) 1996-10-02 1999-01-19 National Semiconductor Corporation VLSI capacitors and high Q VLSI inductors using metal-filled via plugs
US5736749A (en) * 1996-11-19 1998-04-07 Lucent Technologies Inc. Integrated circuit device with inductor incorporated therein
DE69737411T2 (de) 1997-02-28 2007-10-31 Telefonaktiebolaget Lm Ericsson (Publ) Verbesserter q-Induktor mit mehreren Metallisierungsschichten
AU6468198A (en) * 1997-05-02 1998-11-27 Board Of Trustees Of The Leland Stanford Junior University Patterned ground shields for integrated circuit inductors
US5959515A (en) 1997-08-11 1999-09-28 Motorola, Inc. High Q integrated resonator structure
US6153489A (en) 1997-12-22 2000-11-28 Electronics And Telecommunications Research Institute Fabrication method of inductor devices using a substrate conversion technique
US6046109A (en) 1997-12-29 2000-04-04 Industrial Technology Research Institute Creation of local semi-insulating regions on semiconductor substrates
TW363278B (en) * 1998-01-16 1999-07-01 Winbond Electronics Corp Preparation method for semiconductor to increase the inductive resonance frequency and Q value
US5959522A (en) 1998-02-03 1999-09-28 Motorola, Inc. Integrated electromagnetic device and method
US6008102A (en) 1998-04-09 1999-12-28 Motorola, Inc. Method of forming a three-dimensional integrated inductor
JP3214441B2 (ja) * 1998-04-10 2001-10-02 日本電気株式会社 半導体装置及びその製造方法
US6169008B1 (en) 1998-05-16 2001-01-02 Winbond Electronics Corp. High Q inductor and its forming method
JP2000022085A (ja) * 1998-06-29 2000-01-21 Toshiba Corp 半導体装置及びその製造方法
US5918121A (en) 1998-07-09 1999-06-29 Winbond Electronics Corp. Method of reducing substrate losses in inductor
US6037649A (en) 1999-04-01 2000-03-14 Winbond Electronics Corp. Three-dimension inductor structure in integrated circuit technology
US6221727B1 (en) * 1999-08-30 2001-04-24 Chartered Semiconductor Manufacturing Ltd. Method to trap air at the silicon substrate for improving the quality factor of RF inductors in CMOS technology
US6261892B1 (en) * 1999-12-31 2001-07-17 Texas Instruments Incorporated Intra-chip AC isolation of RF passive components

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US20030096435A1 (en) 2003-05-22
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US6534843B2 (en) 2003-03-18
KR100522655B1 (ko) 2005-10-19
WO2002065490A1 (en) 2002-08-22
ATE463828T1 (de) 2010-04-15
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US6762088B2 (en) 2004-07-13
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