TW548727B - Thin-film transistor device, its manufacturing process, and image display using the device - Google Patents
Thin-film transistor device, its manufacturing process, and image display using the device Download PDFInfo
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- TW548727B TW548727B TW091114358A TW91114358A TW548727B TW 548727 B TW548727 B TW 548727B TW 091114358 A TW091114358 A TW 091114358A TW 91114358 A TW91114358 A TW 91114358A TW 548727 B TW548727 B TW 548727B
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- thin film
- film transistor
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- transistor device
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- 239000010409 thin film Substances 0.000 title claims abstract description 86
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000013078 crystal Substances 0.000 claims abstract description 59
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 23
- 238000002425 crystallisation Methods 0.000 claims abstract description 7
- 230000008025 crystallization Effects 0.000 claims abstract description 6
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 6
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 5
- 229910052718 tin Inorganic materials 0.000 claims abstract description 4
- 229910052745 lead Inorganic materials 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 50
- 239000000758 substrate Substances 0.000 claims description 49
- 239000010408 film Substances 0.000 claims description 35
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000002689 soil Substances 0.000 claims description 10
- 239000011521 glass Substances 0.000 claims description 9
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 229910021480 group 4 element Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000010703 silicon Substances 0.000 abstract description 19
- 230000007547 defect Effects 0.000 abstract description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 18
- 238000005499 laser crystallization Methods 0.000 description 13
- 239000002245 particle Substances 0.000 description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 239000004575 stone Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 101000616556 Homo sapiens SH3 domain-containing protein 19 Proteins 0.000 description 1
- 102100021782 SH3 domain-containing protein 19 Human genes 0.000 description 1
- 101100214488 Solanum lycopersicum TFT2 gene Proteins 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000002050 diffraction method Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 210000000885 nephron Anatomy 0.000 description 1
- 235000012149 noodles Nutrition 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Description
548727 A7 B7 發明説明(1 發明領域 本發明係關於一種薄膜電晶體裝置,該裝置包含薄膜電 曰曰體’該等薄膜電晶體形成一多晶矽薄膜上,該多晶矽薄 膜係經過低溫熱處理,且用雷射在至少兩結晶面向所定義 的相關方向上掃描過兩次。本發明亦關於該薄膜電晶體裝 置之製造方法及一使用該薄膜電晶體裝置之影像顯示器。 發明背景 現有用於薄膜電晶體之矩陣薄膜係由一石英基板及以大 約900°C熱處理而形成於該基板上之粒徑相當大(5〇〇_6〇〇 nm)的多晶矽(以下稱為「高溫多晶矽」)所組成。形成於一 高溫多晶矽薄膜上之薄膜電晶體使用低顆粒邊界密度之結 晶良好的多晶矽作為它們的通道,具有2〇〇_350cm2/Vs的電 子移動性’接近形成於單晶石夕上面之薄膜電晶體的電子移 動性(最大 500 cm /Vs’ 請參見 Physics of Semiconductor
Devices,第29頁,第二版,作者ley)。然而,高溫多晶 石夕薄膜必須形成於能夠忍受高溫熱處理之昂貴的石英基板 上,因此,於薄膜上形成薄膜電晶體的製造成本相當高, 使電晶體的市場規模受限。 近來已有許多研究人員著手建立利用低溫熱處理在一基 板上形成多晶石夕(以下稱為「低溫多晶石夕」)的方法。根據 此方法’一非晶性矽薄膜以電漿CVD (化學汽相沉積)或類 似的技術形成於一不昂貴的玻璃或塑膠基板上,並用準分 子雷射退火該非晶性石夕使其成為多晶石夕。此方法使多晶石夕 薄膜能夠在低溫(最高150。〇形成,因而可以用低成本來製 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)
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548727 A7 B7 五、發明説明(2 造薄膜電晶體。然而,低溫多晶矽的顆粒比高溫多晶矽小 。此外’低溫多晶矽之晶粒的方向是隨機的。若多晶矽的 晶粒很小’則載體通道的顆粒邊界密度會很高。若多晶矽 晶粒的面向是隨機的,則在顆粒邊界的陷井階(trap — 1 eve 1)密度會很高。這兩種情況都會影響電晶體的特性。 因此’形成於低溫多晶矽基板上之薄膜電晶體,其電子移 動性被限制在大約150 cm2/Vs ,造成元件運轉速度較低,而 限制了可形成於單一玻璃基質(或塑膠基質)基板上的元件 種類。例如,影像顯示器的像素可形成於玻璃基質(或塑膠 基質)基板上’但其它電路元件,例如源極驅動器、閘極驅 動器、偏移暫存器和週邊控制單元等,必須做在傳統的印 刷電路板上’以電線與基板連接。其結果是,較小的影像 顯示單元,但很高的製造成本。 因此,需要有一種能夠增加晶粒尺寸並使晶粒之位置與 面向均一化的技術。已有許多用於增加低溫多晶矽之晶粒 尺寸以及使晶粒之位置與面向規則化的技術被提出來。 JP-A-3457 8 3/1999揭示一種使用一雷射束以5一g〇〇對石夕進 行兩次或更多次掃描的技術,JPH49592/1995揭示一種 以(n/2 + 1/4)轉動一雷射束來對矽進行兩次或更多次掃描 的技術。JP-A-199808/1998揭示一種使用一雷射束以g〇〇對 矽進行兩次或更多次掃描的技術。這些技術重複施加熱能 於石夕結體上加以退火,以獲得高品質。另一方面,本發明 以依據矽晶體之結構與成長機制所設計的雷射束對矽進行 掃描使矽結.晶。除了前述之先前技藝以外, -5-
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JP-A-321339/1995揭示一種形成多晶矽的技術,藉由在一 具有金屬元件的絕緣基板上加入一層非晶性石夕薄膜,選擇 性地培養結晶,造成結晶以平行於絕緣基板的方式成長, 而使{111}轴朝向載體移動的方向。JP-A —41234/1998揭示 一種技術’藉由在每一分鐘控制熱處理光束的形狀及控制 光束從一部位至另一部位之移動,來形成{1〇〇}軸係在垂直 於絕緣基板的方向,且(220)面與掃描方向平行(或夾45。角 )的矩形多晶矽。JP-A-55808/1996揭示一種藉由(i)以非等 向性蝕刻形成一第一多晶矽層以形成具有特定面(丨丨〇〇}、 {110}及{111})之一的種子結晶,及(i i )在該第一層上形成 一第二多晶矽層,而形成一層具有均勻面向之柱狀多晶矽 層的技術。然而前述所有的先前技藝都無法製造出具備足 夠電子移動性的電晶體。 則述先刖技藝所製造的顆粒尺寸不夠大(最大2 μΐβ),而 用於大螢幕液晶顯示器之薄膜電晶體實際上大約要有8叩 的顆粒尺寸。此外’先前技藝無法在精確的位置形成晶粒 以使7G件具備一致的性能。因此,先前技藝無法提供具備 需求特性的高性能TFT裝置來取代傳統低性能的TFT裝置。 先前技藝並未找到根據矽晶體成長機制來進行結晶的方法 。要解決此等問題,必須要開發一種最能與矽晶體之自我 組織功能相容的技術。 本發明之目的為H㈣晶趙成長機料基礎的結 晶方法來製作薄膜電晶冑,使低溫多晶矽之晶粒的面向均 一化及增加晶粒的尺寸(以形成偽單晶(pseud0_single 訂
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crystal)),以實現具備高電子移動性的tft裝置,及提供 低成本的大螢幕顯示器。 發明概要 為達刖述目的,將一矽薄膜或另一 IV_族元素(c、Ge、Sn 、or Pb)薄膜以一在一晶粒成長最大之側面方向上移動的 雷射束掃描,以便在薄膜上的精確位置形成高品質的晶體 (同時可明顯降低先前技藝所無法控制的瑕疵),從而實現 高品質的TFT裝置。 以下將首先說明本發明的基本原理。圖11(3)至11(〇〇所 不為,晶粒在將於稍後說明之根據本發明具體實施例所述 之兩不同面向上的形成過程。此例中,以面向{11〇}為例作 說明,然而,很明顯地,藉由改變指定角度(prescribes angle),此說明亦適用於其它面向。圖UA為從基板上方觀 看所見,矽晶粒{110}面的方向。轴<1〇〇>與軸<U1>兩者之 間夾54· 8°角並與基板平行。在矽的結晶過程中,轴<1〇〇〉 方向的成長率大於轴<111〉方向。因此,當基板用雷射束以 圖11(b)所示方向加以掃描時,種子晶體成長變成側向成長 的晶粒,其{100}轴在掃描的方向上。然後,如圖所 示,基板以另一雷射束加以掃描,此第二掃描方向與第一 掃描方向夾54· 8。角。晶體在第二掃描方向上成長,轉變成 具有{111}轴的晶粒。因此,有兩個不同方向的結晶區域於 一單一基板上形成。一薄膜電晶體rTFT1」的通道(形成於 一源極及一汲極之間)在第一結晶區域中於第一掃描方向 上形成,另一薄膜電晶體「TFT2」的通道在第二結晶區域 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
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:個TFT * 上形成。因此,在單-基板上,可形咸 八中一個具有沿<1〇〇>轴的通道,另一個具有沿 轴的通道。本發明提供—種在單—基板上形成不同面 -之曰曰粒的技術。本發明之特點如下文所描述。 根據本發明之第一個特點為,一薄膜電晶體裝置,該袭 置^ a (i)絕緣基板,(ii) 一形成於該絕緣基板上之多結 晶薄膜,及(iU)薄膜電晶體,每個電晶體各具有一源極、 一汲極、一通道及一閘極,它們形成於該多結晶薄膜上。 該多、、” a曰薄膜具有結晶區域,包括由丨v族元素C、s丨、、 及Pb之或其組合所組成的晶體。該結晶區域的面向包 括{100}、{110}及{111}至少其中兩個。 根據本發明第二個特點為,一影像顯示器,該影像顯示 器包含(1)複數個形成於一單一基板上的薄膜電晶體裝置 及(ii) 一像素驅動電路、一週邊控制電路及一邏輯電路至 少其中之一。每個薄膜電晶體裝置包括(i)一絕緣基板, (ii) 一形成於該絕緣基板上之多結晶薄膜,及(iii)薄膜電 晶禮’每個電晶體各具有一源極、一没極、一通道及一閑 極形成於該多結晶薄膜上。該多結晶薄膜具有結晶區域, 包括由IV族元素C、Si、Ge、Sn及Pb之一或其組合所組成的 晶體。該結晶區域的面向包括{100}、{110}&{U1}至少其 中兩個。 該絕緣基板最好是以玻璃做成,且該多結晶薄膜的厚度 最好是30 nm至300 nm。 此外,最好是,每個結晶區域至少有一薄膜電晶體其一
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=在一源極和一汲極之間,該等結晶區域中,薄膜電 :曰想:通道配置於兩個相差一角度的方向之一該角度為 30±5°、35.3±5。、45.“5。、54.8土5。、60± 5〇、70· 5 土 5。及 90 ± 5。之一。 根據本發明第三個特點為,一製造一薄膜電晶體裝置之 方法,該方法以-具有一長#的雷射束掃描結晶於一絕緣 基板上的半導體薄膜’纟中該雷射束長轴和與雷射掃描半 導體薄膜垂直的方向之間的角度(以下稱為「長㈣斜角」)為 〇 ± 5〇、30 ± 5〇、35. 3 ± 5〇、45. 0 ± 5〇、54. 8 ± 5〇 、60 ± 5。、70.5 ± 5〇、及 90 ± 5〇 之一 最好是,前述方法中,該半導體薄膜每次用雷射束掃描 ,使其結晶數次,兩連續雷射掃描方向之間的角度(以下稱為「掃描偏斜角」)為〇 土 5〇、30 ± 5〇、35 3 + 5〇、 45·0 土 5°、54·8 ± 5〇、60 土 5〇、70·5 ± 5° 及 90 ± 5〇 之 最好是,前述方法中,該半導體薄膜至少有一區域是利 用一對長轴偏斜角等於掃描偏斜角的雷射束使其結晶。 再最好是,前述方法中,該半導體薄膜有複數個區域是 以兩組長轴偏斜角和掃描偏斜角使其結晶。 前述方法中,可以用複數個定位標記在該絕緣基板或該 半導體薄膜上作記號,標示出絕對位置和絕對角度,以便 決定長轴偏斜角或掃描偏斜角。 圖式簡單說明 從以下詳細說明並參考附圖,將更能明暸本發明之前述 本紙張尺度適用中國國家標準(CNS) Α4規格(210X 297公釐)
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548727 A7 _________ B7 五、發明説明(8 ) 以下將參考附圖,詳細說明本發明之具體實施例。 在說明本發明之具體實施例之前,將先說明先前技藝的 問題及晶體成長速率與面向的相關性。面向(11〇)、(1〇1) 及(011)在結晶學上是等價的,本說明書中,集體用丨11〇} 表不,當然,每一面向皆適用。以下說明雖然是以矽晶體 為例,但亦適用任何IV-族元素晶體(c、Si、Ge、如及抑的 晶體或其混合晶體)。 圖1(a)及1(b)說明以雷射束進行結晶之先前技藝所遭遇 的問題。 如圖1(a)所示,非晶性矽以雷射束1掃描使之結晶,雷射 束1之長轴沿縱向配置,而且在垂直於長軸的方向或向右邊 作側向移動。與其它方法(例如,以固定雷射束對非晶性矽 進行結晶)比較,此法產生顆粒尺寸相當大的矽晶體。因此 ’有許多研究人員已著手研究改進此法。利用此方法所製 造之多晶矽的特點為,晶粒1〇1係沿著掃描方向2上形成。 石夕晶體的顆粒尺寸和面向隨著雷射束種類(例如準分子雷 射束、固態雷射束等)及非晶性矽薄膜的厚度而變化。例如 ’當一50 nm厚的非晶性矽膜以一固態雷射(YAG)使其結晶 時,會長出{100}面在成長方向上且{110}面在垂直於基板 方向上之最大尺寸為1〇 μπι或以上的晶粒。若電晶體的通道 是沿著掃描方向2配置,電子移動性由於顆粒邊界處的分散 情況減輕而增強,因此電晶體的性能獲得提昇。在實際形 成之多晶矽薄膜的掃描開始區域會發現有許多微晶體1 〇2 ,掃描時,顆粒邊界接缝103會發生在任何地方,且薄膜中 -11- 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 548727 A7
,在晶粒以外的位置,到處都可以 4# X 1 η 4 ^ Ά 4m ^ 大…、發生的顆粒裂 隙邊界104,这些都會降低多晶石夕 认< 、土々H 浔暝的σ口質。解決此問題 的方法之一疋在一基板上形成一多 夕日日取薄膜,並以一雷射 ::::膜進行兩次不同的掃描。例如,第二掃描的方向2 ,、第掃描垂直的方向進行,如圖一 ^ ^ 國Ub)所不。此方法相當 有效。然而,該第二掃描也會產生料曰 "田L腎座玍微日日體102、顆粒邊界接 缝103和顆粒裂隙邊界104,使效果不如預期。即使第二掃 描的方向2是以平行於第一掃描的方向進行,結果仍然相同 。因此,使用側向結晶的薄膜電晶體尚未被實際使用。基 本問題是,矽晶體的成長機制與雷射結晶技術未適當匹配。 圖2(a)至2(c)所不為矽晶格,圖2(a)為面{1〇〇丨平行於薄 板,圖2(b)為面{110}平行於薄板,圖2(c)為面丨m丨平行 於薄板。虛線表示與薄板垂直的其它面。在矽從液相變化 到固相的固化程序中,例如雷射結晶程序,視矽的面向而 定’固化速度(或晶體成長率)變化極大。定量地量測成長 率極為困難,不過,面{100}的成長率已知(雷射退火的情 況)大約為7 m/s。相反地,面{in}的成長率大約比面{1〇〇} 小一個階數(Laser Annealing of Semiconductors,J. μ Poate,Academic Press,New York,1982年)。此外,在 矽的側向結晶方面,面{111 }的成長一般而言是活躍的。石夕 晶體的原始結構以及雷射束的熱所造成的溫度梯度均為決 疋以上兩面之成長率的因素。因此,♦晶體在一薄膜表面 的成長機制具有很強烈的非等向性,這造成如圖1所示的許 多瑕疲。例如,當圖2(b)所示的晶粒沿著{100}的方向側向 •12· 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)
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548727 A7 B7 成長,另一面{111}可能由一相鄰的晶粒沿著與丨1〇〇丨方向 夾54. 8°的方向成長’而在它們間產生衝突,造成前述的瑕 疵。因此,為減少此等瑕疵,本發明提供一種不同於傳統 掃描方法且對溫度梯度加以控制的方法。根據本發明藉由 使雷射束掃描程序與該等結晶面之間的夹角能夠匹配而抑 制瑕疵的發生。以下參考圖2(b)的晶體結構說明本發明之 具體實施例。然而’應了解,本發明之具體實施例亦適用 於其它不同角度的晶體結構。 (具體實施例1 ) 圖3(a)為一根據本發明第一具體實施例之雷射結晶法。 當雷射束1施加於掃描方向2時,雷射束〗的長軸與一垂直於 掃描方向2之間的夾角係定義成為長軸偏斜角3。藉由使長 轴偏斜角3與圖2所示各個結晶成長面間的角度相配合,使 沿掃描方向2的晶體成長與根據長轴偏斜角3所造成之溫度 梯度的結晶成長分開,而降低瑕疵發生的機會。例如,長 轴偏斜角3可以是54.8。,使面U1U不受成長面{1〇〇}干擾 ,反之亦同,而改善各成長面的協調性。本具體實施 用了雷射束長轴的偏斜特性。可以利用,例如,一遮罩、 一雷射狹缝Gaser slit)等裝置,達成對雷射掃描作相同 的控制。 (具體實施例2) 圖3(b)為一根據本發明第二具體實施例之雷射結晶法。 此法中’結晶-矽薄膜之同一面以一雷射束照掃描兩次, 第二掃描方向2係相對於第-掃描方向偏斜_掃㈣斜角4
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548727 A7 _________B7____ 五、發明説明) 。藉由使此一掃描偏斜角4與圖2所示晶體成長面之間的角 度相配合,另一成長面上(不同於在第一掃描形成的晶體成 長面)的成長在第二掃描程序中達成。因此,可同時獲致降 低第一掃描所發生的瑕疵以及形成不同面向的晶粒之兩個 效果。此外,此情況下,可藉由適當選擇長轴偏斜角3以形 成品質良好的晶體。本具體實施例亦可藉由使用一遮罩、 一雷射狹缝等裝置來控制雷射掃描而達成。 圖4為一根據本發明第二具體實施例之特別的雷射結晶 法。一第一雷射束1沿掃描方向2移動。此時,長轴偏斜角3 為〇°°因此’可得到一包含具有一與掃描方向2正交的面 {100}及一與薄板平行的面丨11〇}之長條狀晶粒5的第一多 結晶區域6(圖4(a))。然後,在該第一多結晶區域6上,以 一長軸偏斜角3與一相對於第一雷射結晶之掃描偏斜角4進 行第二雷射結晶。此時,使長轴偏斜角3和掃描偏斜角4兩 者都是54· 8。,一從如圖4所示長條狀晶粒5所產生的第二多 結晶區域7成長進入面{in}的方向,成為無瑕疵的狀態 (圖 4(b)) 〇 圖5亦為一根據本發明第二具體實施例之特別的雷射結 晶法的例子。如同圖4(a)和圖4(b),在第一雷射結晶之後 ,以相對於第一雷射結晶之一掃描偏斜角4及一長轴偏斜角 3對第一多結晶區域6進行第二雷射結晶。此時,掃描偏斜 角4為54.8。,長轴偏斜角3為35· 3。。因此,從圖3(b)所示 ,面{111}之其餘成長,圖4(3)及4(1))並未顯示,係源自於 {111}的兩面。此情況下,整個第二多結晶區域並不變成一 -14- 本紙張尺度適财s s家標準(CNS) A4規格x 297公爱) ----- 548727 A7
548727 五、發明説明(13 晶之前,以照相機拍攝定位標記8,將其圖案儲存起來。根 據儲存的圖案计鼻基板的參考方向9,在掃描方向2上進行 $—雷射結晶,掃描方向2係藉由預先加上掃描偏斜角4所 得到此時長軸偏斜角3為〇。。因此,在基板上形成一第 一多結晶區域6,其面{100丨與掃描方向2垂直,面丨11〇}與 基板平行(圖7(a))。然後,從定位標記8的圖案預先計算出 第一多結晶區域6内要改善品質的部位。因此,利用計算出 來的位置與先前得到的參考方向g之間的關係,可決定第二 雷射結晶的掃描位置。第二掃描方向2係設為與參考方向9 平行,長轴偏斜角3設為54·8。。m式,形成與圖❿) 相似的第二結晶區域7(圖7(b))。利用定位標記8, 一源極 “及極、-通道、一閘極絕緣物及一閘極電極,一個接 :個地形成’使電晶體的通道重疊於形成的第二多結晶 用、一多薄膜電晶體1〇群組。因此,可得到一利 體陶^域(瑕範很少)作為通道的高機能薄膜電晶 圖8(a)至8(c)所不為另一應用一根 施例之雷射結晶法於一實^面杯的姓〜赞月第一具體實 至隨一 4 貫際面板的特別例子。如同圖7(a) == 行第一雷射結晶。此時,掃描偏斜角4 Γ:,「:偏斜角3為°。。因此,在基板上形 多結晶區域6内,=(;)』::下來,預先計算出在第- 位’並在該部位進行第二雷涛膜電-體的部 由射m曰日。第二掃描方向2和參考 標準(CNS) A4 顧 548727 A7
長軸的偏斜角為35· 3。。以此方 方向9之間的夾角為54, 式’可選擇性地形成如圖5之第二多結晶區域。 當使電晶體的圖案偏斜以使其電流通道與形成於第二多結 晶區域7上的晶體成長方向平行時,一源極、一汲極、一通 道、、-閘極絕緣物及一閘極電極會一個接著一個地形成而 形成每個該等薄膜電晶體1〇。在其它區域,係形成一傳統 的薄膜電晶體H,其具有一與參考方向9平行的電流通道。 因此★,可選擇性地形成一具有與傳統薄膜電晶體u不同面 向的薄膜電晶體10群組。整體特徵係分別藉由分配電子型 式及電洞型式之載體來改進。 圖9所示之一週邊電路的例子為,其所具有之應用如圖 Ka)至7(c)及圖8(a)至8(c)所示之第二多結晶區域?的薄 膜電sa體1〇與傳統薄膜電晶體η係分別被分配在面板上不 同的區域。整個週邊電路中的特定區域12係利用定位標記 預先決定。在這些特定區域12中,一薄膜電晶體1〇群組之 一面向一電流通道的方向相同。其上只進行一雷射結晶, 與运些特定區域12形成對比之一傳統區域13亦被適當地阻 隔(block)及配置。此方式可提高雷射結晶的掃描效率,並 降低製造成本。該等特定區域可以選擇性地用不同的载體 型式來代表’亦即,電子型式或電洞型式。 圖10所示為一使用本發明所述薄膜電晶之影像顯示器的 例子。一石夕薄膜形成於一絕緣基板14上,一週邊電路區域 15與其結合’它們集合起來構成一具有像素16的影像顯示 面板。由於電路上不同的電晶體需要有不同性能,因此該 -17- 本紙張尺度適财 X 297公釐) 548727 A7 B7 五、發明説明(15 ) 等薄膜電晶體係以類似於圖9的組合選擇性地結合起來。此 一構造中,主要電路可結合於一大面積的玻璃基板上,而 形成一幾乎結合了所有傳統週邊電路的影像顯示器。此外 ,該裝置可以使用低成本的玻璃基板,以更少的程序製造 。在該影像顯示面板上,一液晶層17、一共用電極及一 保護膜19依序重疊於其上面,它們夾在一上部極板2〇與一 下部極板21之間形成三明治結構。該影像顯示面板係藉由 把上述組件形成於一導光板22上成為一件所做成。 因此’可降低一結晶薄膜在形成一薄膜電晶體時發生瑕 疵的機會,且薄膜電晶體係選擇性地形成於具有高品質多 結晶的部位,因此可得到高性能的薄膜電晶體裝置。此外 ,有可能在同一玻璃基板上密集地形成像素部份及一週邊 電路,因此可得到一大型(大於15吋)影像顯示器。 本發明的原理、較佳具體實施例和操作模式已於前述說 明詳細描述。然而,本發明所被保護的並不僅限於所揭示 特定的具體實施例。本文所描述之具體實施例係用於說明 ,而非限制。其他人可做各種變化及改變,及採行同等作 法,並不背離本發明的精神。因此,在此表明,所有在申 請專利範圍中所定義之在本發明精神及範圍内之該等變化 、改變及同等作法皆囊括於本發明之申請專利範圍内。 -18- 本紙張尺度冢標準(⑽)A:規格(摩撕公爱)
Claims (1)
- 修正 A BCD 4358號專利申請案 +^申謂j專利範圍替換本(92年6月) 申請專利範圍 1 · 一種薄膜電晶體裝置,其包含: 一絕緣基板; 每個該等薄膜電晶體具有一源極 閘極 一多結晶薄膜,其係形成於該絕緣基板上者;及 複數個薄膜電晶體,其係形成於該多結晶薄膜上者 沒極、一通道及 其中該多結晶薄膜具有複數個包含C、Si、Ge、Sn j Pb之IV族元素至少其中之一的晶體之結晶區域,且 該結晶區域的面向為{100}、{11〇}及{111}至少其今 兩個,係在針對每個該等面向個別進行雷射掃描的階召 形成。 2. 如申請專利範圍第1項之薄膜電晶體裝置,其中該絕驾 基板係以玻璃做成且該多結晶薄膜的厚度為 300 nm 〇 3. 如申請專利範圍第丨項之薄膜電晶體裝置,其中每個全 結晶區域具有至少一薄膜電晶體,其具有一通道位於;; 源極及一汲極之間,在該結晶區域中之該薄膜電晶體起 道係排列於互相夾〇 ± 5〇、30 ± 5〇、35 3 + 5。 45·〇 土 5°、54.8±5°、6〇±5°、7〇.5±519〇±H 之一的兩方向之一。 4. 如申請專利範圍第3項之薄膜電晶體裝置,其中該等g 向亦根據通道中的載體型式做選擇。 ~ 5 · —種影像顯示器,其包含: 複數個薄膜電晶體裝置,合併形成於一 ' ^ 基板上每個薄膜電晶體裝置包括·· 一絕緣基板, 一多結晶薄膜,其係形成於該絕緣基板上者,及 複數個薄膜電晶體,其係形成於該多結晶薄膜上者, 每個該等薄膜電晶體具有一源極、一汲極、一通道及一 閘極, 其中孩多結晶薄膜具有複數個包含C、Si、Ge、以及 Pb足IV族7C素至少其中之一的晶體之結晶區域,且 M等結晶區域的面向為,{100}、{110}及{11 ”至少 其中兩個,係在針對每個該等面向個別進行雷射掃描的 階段形成;及 一像素驅動電路、一週邊控制電路及一邏輯電路至少 其中之一。 6· 7. 如申請專利範11第5項之影像顯示器,其中該絕緣基板係 以玻璃做成,且該多結晶薄膜的厚度為3〇11111至3〇()1^^。 如申請專利範圍第5項之影像顯示器,其中每個該等結 晶區域具有至少一薄膜電晶體,其具有一通道位於一源^ 極及一汲極之間,在該等結晶區域中之該薄膜電晶體通 道係排列於互相夾〇 土 50、30 土 50、35·3 土 5〇、45.0 ± 5〇 、 54.8 士 5°、60 ± 5° 向之一。 7〇·5 士 5。及 90 土 5°角度之一的兩方 8·如申請專利範圍第7項之影像顯示器,其中該等面向亦 根據通道中的載體型式做選擇。 9· 一種薄膜電晶體裝置之製造方法,其藉由具有一長轴之 548727田射束使半導體薄膜結晶於一緣絕基板上,其中該雷射 束的長軸與和該半導體薄膜之雷射掃描的垂直方向之 門的角度係定義為長軸偏斜角,其為〇 土 5〇、 30土5〇 35.3 ± 5°、45.0 土 5〇、54·8 土 5〇、60 ± 5°、70.5 ± 50 及90 ± 5。角度之一。 10·如申請專利範圍第9項之薄膜電晶體裝置之製造方法, /、中β半導體之薄膜每次以雷射束掃描進行結晶數次 ,任何兩連續雷射掃描方向之間的角度係定義為「掃描 偏斜角」,為 〇 ± 5。、30 ± 5。、35.3 土 5。、45.0 土 5。、 54,8 ± 5。、60 ± 5。、70.5 ± 50。及 90 ± 5。角度之一。 U·如申請專利範圍第10項之薄膜電晶體裝置之製造方法 三其中該半導體薄膜至少有一區域係以一對長軸偏斜角 等於掃描偏斜角的雷射束加以結晶。 12·如申請專利範圍第u項之薄膜電晶體裝置之製造方法 ,其中該半導體薄膜有複數個區域係以至少兩組長軸偏 斜角及兩組掃描偏斜角在結晶區域中加以結晶。 13·如申請專利範圍第9項之薄膜電晶體裝置之製造方法, 其中該絕緣基板或該半導體薄膜具有複數個定位標記 用於提供絕對位置及絕對角度的指標以便決定長軸或 掃描偏斜角。 14·如申請專利範圍第9項之薄膜電晶體裝置之製造方法, 其中該薄膜電晶體裝置至少有一薄膜電晶體,其具有— 通道位於一源極及一汲極之間,該薄膜電晶體通道排列 於互相夾 0 ± 5。、30 士 5。、35.3 ± 5。、45 〇 ± 5〇、 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 548727申請專利範圍 54.8 ± 5〇、60 ± 5〇、70 S + ^ 向之一。 7〇.5 士 5。及90 土 5。角度之一的兩方 15.如:請專利範圍第10項之薄膜電晶體裝置之製造方法 ,其中該薄膜雷曰触發苗π ^ H长 日日置至少有-薄膜電晶體,其具有 通迢位於一源極及一 兮落_ A ^^^^7 及扛又間,该潯膜電晶體通道排 〜 可兩連續雷射掃描方向的-第二掃描方向 上0 16·如申請專利範圍第10項之薄膜電晶體裝置之製造方法 ’其中該雷射掃描方向亦根據通道中的載體型式作選擇。 磺申叫專利範圍第9項之薄膜電晶體裝置之製造方法, 八中Θ田射束心長軸方向係利用一雷射投影裝置、一遮 罩或一雷射狹縫加以控制。 、 8·如申清專利範圍第1〇項之薄膜電晶體裝置之製造方法 ,其中該長軸偏斜角為35.3 ± 5。,該掃 為 54.8 ± 5°。 β 月為 9·如申凊專利範圍第1〇項之薄膜電晶體裝置之製造方法,其 中該長軸偏斜角為54.8土5。,該掃描偏斜角為〇±5。。… -4-
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JP2007080853A (ja) * | 2005-09-09 | 2007-03-29 | Toshiba Corp | 素子形成基板、アクティブマトリクス基板及びその製造方法 |
KR20070094527A (ko) * | 2006-03-17 | 2007-09-20 | 가부시키가이샤 에키쇼센탄 기쥬쓰 가이하쓰센타 | 결정화방법, 박막트랜지스터의 제조방법, 박막 트랜지스터,표시장치, 반도체장치 |
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US8048773B2 (en) | 2009-03-24 | 2011-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
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DE3779672T2 (de) * | 1986-03-07 | 1993-01-28 | Iizuka Kozo | Verfahren zum herstellen einer monokristallinen halbleiterschicht. |
JPH03285351A (ja) * | 1990-04-02 | 1991-12-16 | Oki Electric Ind Co Ltd | Cmis型半導体装置およびその製造方法 |
JPH04233758A (ja) * | 1990-12-28 | 1992-08-21 | Ricoh Co Ltd | 半導体装置とその製造方法 |
JP2791858B2 (ja) * | 1993-06-25 | 1998-08-27 | 株式会社半導体エネルギー研究所 | 半導体装置作製方法 |
US5895933A (en) * | 1993-06-25 | 1999-04-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for its preparation |
JP3054310B2 (ja) * | 1994-03-09 | 2000-06-19 | 株式会社半導体エネルギー研究所 | 半導体デバイスのレーザー処理方法 |
JP3294439B2 (ja) * | 1994-08-17 | 2002-06-24 | 沖電気工業株式会社 | 多結晶シリコン薄膜の形成方法 |
US5808318A (en) * | 1996-03-03 | 1998-09-15 | Ag Technology Co., Ltd. | Polycrystalline semiconductor thin film for semiconductor TFT on a substrate having a mobility in a longitudinal direction greater than in a width direction |
JP4026191B2 (ja) * | 1996-05-22 | 2007-12-26 | ソニー株式会社 | シリコン単結晶粒子群の形成方法及びフラッシュメモリセルの製造方法 |
JPH10199808A (ja) * | 1997-01-09 | 1998-07-31 | Sony Corp | シリコン膜の結晶化方法 |
US5976959A (en) * | 1997-05-01 | 1999-11-02 | Industrial Technology Research Institute | Method for forming large area or selective area SOI |
JPH11345783A (ja) * | 1998-06-01 | 1999-12-14 | Matsushita Electric Ind Co Ltd | 非単結晶薄膜のレーザー結晶化方法 |
JP2000349024A (ja) * | 1999-06-04 | 2000-12-15 | Sharp Corp | 半導体装置の製造方法 |
JP4732599B2 (ja) * | 2001-01-26 | 2011-07-27 | 株式会社日立製作所 | 薄膜トランジスタ装置 |
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2002
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- 2002-07-08 KR KR1020020039258A patent/KR20030030840A/ko not_active Application Discontinuation
- 2002-07-09 US US10/190,670 patent/US6903368B2/en not_active Expired - Fee Related
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JP2003124230A (ja) | 2003-04-25 |
KR20030030840A (ko) | 2003-04-18 |
US6903368B2 (en) | 2005-06-07 |
US20030089907A1 (en) | 2003-05-15 |
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