TW546694B - Semiconductor device and method of manufacturing the same - Google Patents
Semiconductor device and method of manufacturing the same Download PDFInfo
- Publication number
- TW546694B TW546694B TW091113931A TW91113931A TW546694B TW 546694 B TW546694 B TW 546694B TW 091113931 A TW091113931 A TW 091113931A TW 91113931 A TW91113931 A TW 91113931A TW 546694 B TW546694 B TW 546694B
- Authority
- TW
- Taiwan
- Prior art keywords
- insulating layer
- layer
- barrier
- semiconductor device
- nitrogen
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title claims description 28
- 230000004888 barrier function Effects 0.000 claims abstract description 217
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 97
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 90
- 229910052802 copper Inorganic materials 0.000 claims abstract description 84
- 239000010949 copper Substances 0.000 claims abstract description 84
- 239000001301 oxygen Substances 0.000 claims abstract description 46
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 46
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 43
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 40
- 239000010703 silicon Substances 0.000 claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 40
- 239000001257 hydrogen Substances 0.000 claims abstract description 34
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 34
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 25
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 20
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract 15
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 126
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 claims description 83
- 239000007789 gas Substances 0.000 claims description 76
- 238000009413 insulation Methods 0.000 claims description 62
- 238000000034 method Methods 0.000 claims description 41
- 239000000758 substrate Substances 0.000 claims description 41
- 229910021529 ammonia Inorganic materials 0.000 claims description 38
- 238000006243 chemical reaction Methods 0.000 claims description 15
- 150000002431 hydrogen Chemical class 0.000 claims description 14
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 claims description 14
- 239000000126 substance Substances 0.000 claims description 13
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 13
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 11
- 239000010409 thin film Substances 0.000 claims description 11
- WZJUBBHODHNQPW-UHFFFAOYSA-N 2,4,6,8-tetramethyl-1,3,5,7,2$l^{3},4$l^{3},6$l^{3},8$l^{3}-tetraoxatetrasilocane Chemical compound C[Si]1O[Si](C)O[Si](C)O[Si](C)O1 WZJUBBHODHNQPW-UHFFFAOYSA-N 0.000 claims description 10
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 claims description 10
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 9
- UQEAIHBTYFGYIE-UHFFFAOYSA-N hexamethyldisiloxane Chemical group C[Si](C)(C)O[Si](C)(C)C UQEAIHBTYFGYIE-UHFFFAOYSA-N 0.000 claims description 9
- 239000004575 stone Substances 0.000 claims description 9
- HMMGMWAXVFQUOA-UHFFFAOYSA-N octamethylcyclotetrasiloxane Chemical compound C[Si]1(C)O[Si](C)(C)O[Si](C)(C)O[Si](C)(C)O1 HMMGMWAXVFQUOA-UHFFFAOYSA-N 0.000 claims description 7
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 6
- 239000010408 film Substances 0.000 claims description 6
- 229910000831 Steel Inorganic materials 0.000 claims description 5
- 239000001569 carbon dioxide Substances 0.000 claims description 5
- 229910000077 silane Inorganic materials 0.000 claims description 5
- 239000010959 steel Substances 0.000 claims description 5
- 229910003828 SiH3 Inorganic materials 0.000 claims description 4
- 229910052735 hafnium Inorganic materials 0.000 claims description 4
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 4
- OLRJXMHANKMLTD-UHFFFAOYSA-N silyl Chemical compound [SiH3] OLRJXMHANKMLTD-UHFFFAOYSA-N 0.000 claims description 4
- XMIJDTGORVPYLW-UHFFFAOYSA-N [SiH2] Chemical compound [SiH2] XMIJDTGORVPYLW-UHFFFAOYSA-N 0.000 claims description 3
- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 claims description 3
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims 3
- UBHZUDXTHNMNLD-UHFFFAOYSA-N dimethylsilane Chemical compound C[SiH2]C UBHZUDXTHNMNLD-UHFFFAOYSA-N 0.000 claims 2
- 229910000069 nitrogen hydride Inorganic materials 0.000 claims 2
- 229940094989 trimethylsilane Drugs 0.000 claims 2
- QWHHCXBEVNXOFY-UHFFFAOYSA-N CC1(OC(C(OC1)(C)C)(C)C)C.C[Si](O[Si](C)(C)C)(C)C Chemical compound CC1(OC(C(OC1)(C)C)(C)C)C.C[Si](O[Si](C)(C)C)(C)C QWHHCXBEVNXOFY-UHFFFAOYSA-N 0.000 claims 1
- 229910052778 Plutonium Inorganic materials 0.000 claims 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 claims 1
- OYEHPCDNVJXUIW-UHFFFAOYSA-N plutonium atom Chemical compound [Pu] OYEHPCDNVJXUIW-UHFFFAOYSA-N 0.000 claims 1
- 238000012360 testing method Methods 0.000 description 41
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 32
- 238000009792 diffusion process Methods 0.000 description 30
- 230000015572 biosynthetic process Effects 0.000 description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 230000005684 electric field Effects 0.000 description 17
- 238000005229 chemical vapour deposition Methods 0.000 description 12
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 12
- 229910052753 mercury Inorganic materials 0.000 description 12
- 238000012545 processing Methods 0.000 description 11
- 238000005259 measurement Methods 0.000 description 8
- 235000012239 silicon dioxide Nutrition 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- MDBCDXQNSQPIMD-UHFFFAOYSA-N C1(=CC=CC=2C3=CC=CC=C3CC12)[Si](O[Si](C1=CC=CC=2C3=CC=CC=C3CC12)(C1=CC=CC=2C3=CC=CC=C3CC12)C1=CC=CC=2C3=CC=CC=C3CC12)(C1=CC=CC=2C3=CC=CC=C3CC12)C1=CC=CC=2C3=CC=CC=C3CC12 Chemical compound C1(=CC=CC=2C3=CC=CC=C3CC12)[Si](O[Si](C1=CC=CC=2C3=CC=CC=C3CC12)(C1=CC=CC=2C3=CC=CC=C3CC12)C1=CC=CC=2C3=CC=CC=C3CC12)(C1=CC=CC=2C3=CC=CC=C3CC12)C1=CC=CC=2C3=CC=CC=C3CC12 MDBCDXQNSQPIMD-UHFFFAOYSA-N 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- UOTBHSCPQOFPDJ-UHFFFAOYSA-N [Hf]=O Chemical compound [Hf]=O UOTBHSCPQOFPDJ-UHFFFAOYSA-N 0.000 description 2
- AIRRSBIRSIPRGM-UHFFFAOYSA-N [N].[Hf] Chemical compound [N].[Hf] AIRRSBIRSIPRGM-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 238000001994 activation Methods 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000691 measurement method Methods 0.000 description 2
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- -1 siloxanes Chemical class 0.000 description 2
- JPVQCHVLFHXNKB-UHFFFAOYSA-N 1,2,3,4,5,6-hexamethyldisiline Chemical compound CC1=C(C)[Si](C)=[Si](C)C(C)=C1C JPVQCHVLFHXNKB-UHFFFAOYSA-N 0.000 description 1
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical class [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- XFXPMWWXUTWYJX-UHFFFAOYSA-N Cyanide Chemical compound N#[C-] XFXPMWWXUTWYJX-UHFFFAOYSA-N 0.000 description 1
- 101100450085 Silene latifolia SlH4 gene Proteins 0.000 description 1
- RGSCXUOGQGNWFC-UHFFFAOYSA-N [Hf].[C] Chemical compound [Hf].[C] RGSCXUOGQGNWFC-UHFFFAOYSA-N 0.000 description 1
- WLYASUUWHLJRIL-UHFFFAOYSA-N [N].[N].[N] Chemical compound [N].[N].[N] WLYASUUWHLJRIL-UHFFFAOYSA-N 0.000 description 1
- 239000003570 air Substances 0.000 description 1
- 235000013405 beer Nutrition 0.000 description 1
- 229910002090 carbon oxide Inorganic materials 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 235000011389 fruit/vegetable juice Nutrition 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- CPBQJMYROZQQJC-UHFFFAOYSA-N helium neon Chemical compound [He].[Ne] CPBQJMYROZQQJC-UHFFFAOYSA-N 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 238000005065 mining Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- VGJSWXPSRKFUCJ-UHFFFAOYSA-N octadecyl(silyloxysilyloxysilyloxy)silane Chemical compound C(CCCCCCCCCCCCCCCCC)[SiH2]O[SiH2]O[SiH2]O[SiH3] VGJSWXPSRKFUCJ-UHFFFAOYSA-N 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
546694 五、發明說明(1) 發明領域: ^發明係有關於一種半導體裝置及其製造方法用於製 造覆蓋於銅導線上或設置有銅層之基板上的阻障絕緣層。 發明背景: 近年來’不但要求更高度整合之半導體積體電路,而 且也要求更高的資料傳輸率,因此,需要阻障絕緣層蓋於 銅導線上或設置有銅層之基板上來提供銅擴散阻障能力及 低導電係數。 此*阻障絕 (CVD)法製成 (tet r araethy 1 矽層由電漿化 然而,問 電係數但卻包 情況,再者, 下章程中,將 鋼擴散阻障能 發明相^述: 因此,本 障絕緣層覆蓋 小,擴散阻障 一"絕緣層
緣層,其氧化矽層係由電漿化學氣相沉積 ’其製成氣體中包含四甲基石夕燒 silane (SiH (CH3)4))及甲烷(Ch4),其氮化 學氣相沉積(CVD)法製成。 以往的氧化石夕層,具有低 各了卉夕石反,因此很難充分的壓制住’ 氧化矽層的銅擴散阻障能力並不充足,'合 討論根據以下氮化矽層的特性,其漏電在C 力大’但其相關導電係數大。 小’ _ 發明提供一半導體裝置及其製造方 於銅導線或由銅層形成之基板上,其ς有陆 以及相關導電係數小的特性:電量 具有鬲密度石夕、& 546694 五、發明言兒明(2) 化學氣相沉積(CVD)法萝忐之一答儿r以C.A、β # ^ ^ ^ u ti ^ ^如l成之一乳化矽(Si〇2)層其絕緣層 & f j率大。在此,-絕緣層具有矽、氧、及氫或 矽、氧、氫、及碳’其相關導電係數低 對的較低,因此漏電量大。再者,此絕 的銅擴散阻障能力。 …泛從供充分 在本發明中,覆蓋於銅導線或設置 阻=緣層具有雙層或多層之構造且至少“一 絕緣層及一帛二阻障絕緣層,第一阻障絕緣層包含石夕、 mi矽、氧、氮、氫及碳,第二阻障絕緣層包含 阻障絕緣層中至少會有一層與銅導線或設之t 相接觸。 丞扳 再者,為了不影響低漏電、高銅擴散阻障能 能,第一阻障絕緣層的厚度將被降低,因為其導= 其厚度成正比’而第二阻障絕緣層具有低相關導電係: 以其厚度被提高且佔有整個阻障絕緣層大部份声 此,一阻障絕緣層具有至少一第一阻障絕緣屌 ς:因 障絕緣層具低相關導電係數,漏電量小,銅‘ :: 大的特性。 5欣I且卩早犯力 上述之第一阻障絕緣層為一絕緣層,含有矽、 - 及氫,此第一阻障絕緣層可經由電漿法形成,筮二、氮 層开> 成氣體包含石夕烧(s i 1 a n e ( S i扎)),至少一氧 、邑咏 或水(札〇),及至少一氮(n2)或氨(Nh3)以產生匕氮(化〇) 上逃之第-阻障絕緣層為-絕緣層,含有石夕、氧、氮、氣
546694 五、發明說明(3) — 及碳’此第一阻障絕緣層可經由電漿法形成,此第_絕緣 層形成氣體包含至少一矽氧烷(sil oxane)或甲基矽垸 (methylsiUne (SiHn(CH3)4_n:n = 〇,i,2,3)),至少一氧化 氮(n2o)、水(h2o)及氮(n2),及至少一氮(n2)或氨(關3)以 產生反應。 上述之第二阻障絕緣層為一絕緣層,含有石夕、氧及 氫’此第二阻障絕緣層可經由電漿法形成,此第二絕緣層 形成氣體包含矽烷(si lane),至少一氧化氮(AO)或水9 (ΙΟ)以產生反應。又,上述之第二阻障絕緣層為一絕緣 層’含有矽、氧、氫及碳,此第二阻障絕緣層可經由電漿 法形成’此第二絕緣層形成氣體包含至少一石 夕氧烧 (siloxane)及甲基矽烷(methylsilane (siHn(CH3)4_n : n = 〇, 1,2, 3)),至少一氧化氮(ν2〇)、水(H2〇)及二氧化 (C02)以產生反應。 此外 低導電係數之絕緣層亦可形成於上述之阻障 、、:層之上此時’阻P早絕緣層及絕緣層具有低導電係數 了菖做中間絕緣層,使一新的具銅層之導線或主要由銅層 所構成之基板可形成在一具低導電係數之絕緣層上。 為使本發明之上述及其他目的、特徵和優點能更明顯 易懂,下文特舉數個具體之較佳實施例,益配合所式_ 做詳細說明。 實施例詳細說明: 對本發明揭示之各形態内容加 以下以具體之實施例 以詳細說明。
546694 五、發明說明(4) (第一實施例) 第1圖係顯示本發明之半導體裝置及其製造方法實施 例中平行板式電漿加強薄膜形成儀器1 〇 1的側視構造。 此電漿加強薄膜形成儀器1 〇 1包含一薄膜形成部 101A,此為在一基板21上經電漿氣體形成絕緣層之空間, 與具有數個提供薄膜形成氣體源之氣體供應部1 〇 1B所組 成。
如第1圖所示,薄膜形成部101A為一可降壓之反應室 1 ’此反應室1經由一排氣管4與排氣裝置6相連,一開關閥 5置於排氣管4中用來控制反應室1與排氣裝置6的相通或不 相通,反應室1具有測量壓力的功能可由真空壓力計或螢 幕顯示。 在反應室1中設置有相對之一對上電極2及一對下電極 3 ’ 一高頻電源(RF電源)7提供13· 56MHz的高頻電源並與上 電極2相連,一低頻電源8提供380kHz的低頻電源並與下電 極3相連’絕緣層形成氣體則由電源7、8經上電極2及下電 極3來達到電漿化氣體的目的。 上電極2亦做為分配絕緣層形成氣體之用,上電極2之 上具有複數個礼洞,與下電極3對應之孔洞開放部份則做 為形成氣體之發射端(導入端),形成氣體之發射端與薄膜 形成氣體供應部1 01 B經由管路9a相連,再者,在此實施例 中有時上電極2亦提供一加熱器(圖中並無顯示),這是因 為如果上電極2在薄膜形成時被加熱至丨〇 〇以上的溫度 時,可以避免含薄膜形成氣體之反應產物的顆粒覆著於上
546694 五、發明說明(5) 電極2 。 下電極3亦做為基板2 1的承载架,並安裝一加熱器j 2 來加熱承載架上的基板21。 ' 一石夕軋院(siloxane)提供源,一甲基石夕烧 (methylsilane 提二源,一矽 烷(silane(SiH4))提供源,一氧化氮(仏〇)、水(Η”)或二 氧化碳(ecu提供源具有氧氣,一氨(關3)提供源,一氮 (%)提供源,連接於氣體供應部1〇1β之上做為絕緣層形成 氣體之提供源。 這些氣體經由分支管9b到9g適當地注入反應室1之 中,其中分支管9b到9g由分支管9a相連,流量調整裝置 11 到1 1 f及分支管9b到9g上的開關裝置1 〇b到1 〇 m則控制分 支=9b到9g的通與不通,分支管9a上的開關1〇&則控制分 支管分支管9 a的開與關。 為了用氮(% )來清除分支管9b到9g中的殘留氣體,開 關裝置10η、l〇p至10s控制分支管9g,其連接至氮氣⑹ 供應源,以及分支管⑽到“的通與不通,在此,氮(N 用來清除分支管9a、反應室}、及分支管⑽到“中的^留 氣體,再者&亦做為稀釋氣體之用。 •根據上述之電漿加強薄膜形成儀器丨〇 1具有矽氧院 二0Π:基碎烧(methylsilane) ’ 及妙燒(siiane) 以氣體提供源’氨或氣氣提供源’亦提供電衆 座玍装置Ζ、3、7、8所需氣體,用以電漿法形成薄膜。 因此,如實施例中所示,第一阻障絕緣層具有低導電 第10頁 2060-4958-PF(N).ptd 546694 五、發明說明(6) 係數,第二阻障絕緣層具有銅擴散阻障能 的特性並可纟電漿化學氣相沉積(CVD)法漏電^小 絕緣層含有石夕(Si)、氧⑻及氫(H)或石夕( ^阻& (H)及碳⑹,第二阻障絕緣層包含石夕(Si) 及氮⑻或石夕(Si)、氧⑻、氫⑻、氮⑻及碳((c〇;。鼠(Η) 又’在電I產生裝置中,是利用平行板式 及下電極3來做為電聚產生裝置,例如,高頻電源7 =於 上電極2,低頻電源8連接於下電極3,因此,電於 上電極2及下電極3上各自的高低頻電源而產生,特 =方法下產生的阻障絕緣層具有高密度及低導電係數^特 上電極2及下電極3上所提供的電源組合將在以下提过 討論。
第一,上電極2提供一頻率大κ1ΜΗζ的電源,下電極丨 提供一頻率大於100kHz但小於1 MHz的電源,第二,下電和 3不提供低頻電源,而上電極2提供一頻率大於1]〇2的電J 源,第三,上電極2不提供高頻電源,而下電極3提供一北 頻電源。 ” 接著’本發明中以矽氧烷(sil oxane)、曱基石夕院
(methylsilane)、含氧氣體做為絕緣層之形成氣體,以下 可以做為一典型的例子。 (i)碎氧烷(Siloxane) 六甲基二矽氡院(1^又&11^1:1^1(11311〇又3116(1{1^80:((:113) 3Si-0-Si(CH3)3))
546694 五、發明說明(7) 八甲基四石夕氧院(八員環, octamethylcyclotetrasiloxane (OMCTS ·· ((CH3)2)4Si4 04 ) (化學方程式7) ch3 ch3
I I CH3 — Si — O — Si — CH3
I I 0 o
1 I CH3 — Si — O — Si — CH3
I I ch3 ch3 四甲基環四石夕氧烧(tetramethylcyclotetrasiloxane (TMCTS:(CH3H)4Si4 04 ) (化學方程式8 ) Η Η
I I CH3— Si — ο —Si — CH3
— ο I —ο — CH3 — Si — 〇 — Si — CH3 Η Η (ii)曱基矽烷(11161±7 1311&1^(311111((:113)4_11:11=0,1,2,3)) 單甲基矽淀(m〇nomethylsilane(SiH3(CH3))) 一甲基石夕烷(dimethylsilane(SiH2(CH3)2))
第12頁 546694 五、發明說明(8) 三甲基石夕烷(trimethylsilane (SiH(CH3)3)) 四甲基石夕烷(tetramethylsilane (SiH (CH3)4)) (i i i )含氧氣體 一氧化氮(N20) 水(h2o) 二氧化碳(C02) 接著,由發明者所做之實驗將於以下說明。 實驗例子具有絕緣層電漿加強表面,絕緣層形成’及 絕緣層形成之後續處理之步驟,絕緣層表面電漿化’絕緣 層形成,及絕緣層形成之後續處理之狀態則如下所述。 根據絕緣層形成狀態1,1 a之敘述如下,第一阻障絕 緣層含有矽(Si)、氧(〇)、氫(H)、碳(C)形成於矽基板 上,以及銅層以電漿化學氣相沉積法(PECVD法)形成,並 且,根據絕緣層形成狀態2如下所述,第二阻障絕緣層含 有矽(Si)、氡(〇)、氫(H)、氮(N)、碳(C)形成於矽基板 上,以及銅層以電漿化學氣相沉積法(PECVD法)形成。 在此,在絕緣層形成起始過程中,電漿形成氣體導入 反應室中的時間(安定時間)需設為1分3 0秒,再者,為了 避免再生物覆著於上電極2,上電極2在此時間内亦加熱至 1 0 0 °C以上之溫度。 第一’根據測試例子,第一阻障絕緣層(測試阻障絕 緣層)將於以下解釋。 (i )電漿加強表面處理狀態: (a )處理氣體
2060-4958-PF(N).ptd 546694 五、發明說明(9) N H3 流量:4 0 0 s c c m 氣體壓力(參數)·· 4Torr (b )電f激活狀態
下電極:低頻電源(頻率= 380kHz) = 0W 上電極:高頻電源(頻率= 13· 56MHz) = 400W(0· 963W/cm 2) (c )基板加熱狀態:3 7 5 °C - (i i ) 絕緣層形成狀態1 : (a )第-絕緣層形成氣體 六曱基二矽氧烷(HMDSO)流量:50sccm · 一氧化氮(N20)流量:200sccm 氨(NH3)流量(參數):〇、50、100、200、400、600、 750sccm 氣體壓力(參數):ITorr (b )電聚激活狀態 下電極:低頻電源(頻率=3801^2) = 150评(0.3 6?/〇112) 上電極:高頻電源(頻率= l3.56MHz>〇W (c )基板加熱狀態:3 7 5 °C (i i i )後續處理狀態 (a )基板加熱狀態:4 5 0 °C _ (b )時間:4小時 (a)測試阻障絕緣層的相關導電係數及折射率 第2圖係顯示導電係數、第一阻障絕緣層行成 (NH3)、與折射率之間的關係,其中,左縱座標為測試^且
546694 五、發明說明(ίο) 障絕緣層的相關導電係數並為線性刻度,橫座標為第—p 障絕緣層的形成氣體氨(N H3)之流量並為線性刻度。 測试阻障絕緣層形成於矽基板上,第一層形成氣體以 7種不同的氨(NH3)流量分別為〇、5〇、1〇〇、2〇〇、4〇〇、 600、7 5〇SCCm,且於絕緣層形成狀態i中上電極無提供高 頻電源’其相關導電係數之測量方法如下,意即,將乘1菜 測計裝置於測試阻障絕緣層表面,則在汞探測計與矽基^ 之間會產生一 DC電壓差,而頻率丨从“之單電壓會重疊,戶= 以C_V測量可以使用,在圖2中測出的相關導電係數以鲁护 示,再者,折射率以6338埃波長之氦-氖雷射儀來測量,* 在圖2中測出的折射率以〇標示。 、根據第2圖,相關導電係數隨著氨(NH3)流量的增加而 增加,當氨(NH3 )流量為〇sccin時,相關導電係數約為 4· 2,當氨(NH3)流量增加為75〇sccm時,相關導電係數 為5· 2 ,該相關導電係數比後述第7圖不含氮之測試阻障 緣層還高。 由率隨著氨(NH3)流量的增加而逐漸增加,當氨 ?HlVfn量為QSCCm時’折射率約為L67,當氨(NH3)流量你 加為75〇SCCm時,折射率約為172,該折射率比後述θ =含氮之折射率還高(與該例中氨(NH。流量為時相0 同)’、在此,折射率的大小與密度有直接的關連性。 (b )測試阻障絕緣層的漏電量 β第3圖係顯示測試阻障絕緣層在處理前與處理後复雷 場與漏電密度的關係,縱座標為測試阻障絕緣層的漏電密
546694 五、發明說明(11) 度(A / cm2)並為 為線性刻度, 200、600seem 測試阻障 程後瞬間接地 測計裝置於測 供汞探測計一 計的面積經計 所產生之電場 電場。 線性刻度, 第一阻障絕 做為設定之 絕緣層於銅 但不包括處 試阻障絕緣 負電壓而測 算得知,橫 大小,一負 +黃座標為電場大小(MV/cm)並 緣層形成氣體氨(NH3)流量0、 參數。 層上形成,銅層在絕緣層形成過 理過程前及處理過程後,且汞探 層表面,接著,漏電量可經由提 得’而漏電密度就可由供汞探測 座標上的電場大小是由該負電壓 符就象徵銅層至采探測計之間的
根據第3圖,漏電密度與氨(〇3)流量的相關性不大, 除了第一阻p早絕緣層的氨(ΝΗ3)流量為6〇〇sccm時,其他狀 態下,漏電密度的增加與氨(Νη3)流量為6〇〇3(:(:111時大不相 同’而電場則以負方向增加並為1〇~6至丨〇_5 A/ cm2在一5 MV/cm條件下,此漏電密度比後述之第5圖中的含氮測試阻 障絕緣層或第8圖中的不含氮測試阻障絕緣層還小。
在此’當氨(N H3)流量為6 0 0 s c c m時,漏電密度的突增 發生在電場為—5 MV/cm時,這表示阻障絕緣層的導電破 損’然而’雖然第3圖中其他例子亦須考慮導電破損的特 性’但卻很難分辨此導電破損是因為銅擴散阻障能力或是 阻障絕緣層的缺陷所引起。 (c)測試阻障絕緣層的銅擴散阻障能力 第4圖係顯示測試阻障絕緣層的銅擴散阻障能力的測 試結果’第一阻障絕緣層的形成氣體氨(NH3)流量分別為
2060-4958-PF(N).ptd 第16頁 546694 五、發明說明(12) 0、50 、100、2〇0、400、600sccm以做為參數,其中縱座 標為銅密度(cnr3)並為線性刻度,橫座標為測試阻障絕緣 層表面至銅層的測量距離d (n m)並為線性刻度。 該測試阻障絕緣層在銅層上形成,在圖4中以虛線表 示表面邊界,測試阻障絕緣層的銅擴散阻障能力係測量經 處理後之測試阻障絕緣層上的銅密度而得。 才艮據第4圖’沒有例子是將銅分散於測試阻障絕緣層 上的,因此我們發現測試阻障絕緣層的銅擴散阻障能力與 銅有密切的關係。
接著’另一種第一阻障絕緣層(測試阻障絕緣層)依下 面的實驗例子將於以下提出討論,絕緣層表面電漿化,及 絕緣層形成之後續處理之狀態設定如上所述,在此章程的 絕緣層形成狀態中,絕緣層形成氣體不加入一氧化氮 (M) 〇 絕緣層形成狀態1 a : (a )第一絕緣層形成氣體 六曱基一珍氧烧(HMDSO)流量·· 50sccm 氨(NH3)流量(參數):〇、5〇、1〇〇、200、400、 600sccm 氣體壓力(參數):1 Torr (b )電漿激活狀態 下電極:低頻電源(頻率 = 380kHz) = 150W(0·3 6W/cm2) 上電極:高頻電源(頻率= 13.56MHz) = 〇W (c )基板加熱狀態:3 7 5 t:
2060 - 4958-PF(N).ptd
第17頁 546694 五、發明說明(13) U)測試阻障繞蝝層的漏電量 第5圖係顯+、、a!、 九 場與漏電密度的關、| /式阻p早、、邑緣層在處理前與處理後其電 度(A/ cm2)並係;;縱座標為測試阻障絕緣層的漏電密 為線性刻度,繁刻度,^座標為電場大小(MV/cm)並 述做為設定之參數阻障絕緣層形成氣體氨⑽3)流量如上 程後=々==工=在絕緣層形成過 ^ 1一不包祜慝理過私前及處理過程後,且汞探 測汁^置於測试阻障絕緣層表面,接著,漏電量可經由提 供汞探測計一負電壓而測得,而漏電密度就可由供汞探測 計的面積經^算得知,橫座標上的電場大小是由該負電壓 所產生之電場大小,一負符號象徵銅層至汞探測計之間的 電場。 根據第5圖,該例在第一絕緣層形成氣體氨(NH3)流量 為Osccm時產生導電破損,也許是因銅散佈而造成導電破 損’因此使用絕緣層形成氣體氨(N札)來形成阻障絕緣層 並不會造成導電破損。
在此’漏電量與氨(NH3)流量並無直接關係,漏電密 度與電場在負方向的增加成正比,且在1 〇_4至1 〇-2在一 5 MV/cm條件下,此漏電密度幾乎與後述不含氮之第二阻障 絕緣層相同。 (b)測試阻障絕緣層的銅擴散阻障能力 第6圖係顯示測試阻障絕緣層的銅擴散阻障能力的測 試結果,第一阻障絕緣層的形成氣體氨(關3)流量如上所
2060-4958-PF(N).ptd 第18頁 546694 五、發明說明(14) 述以做為參數,其中縱座標為銅密度(cm_3 )並為線性刻 度,橫座標為測試阻障絕緣層表面至銅層的測量距離 d(nm) 並為線性刻度。 該測試阻障絕緣層在銅層上形成,在圖6中,以一垂 直之虛線描繪邊界,所顯示之銅擴散阻障能力為測量經上 述後續處理後之阻障絕緣層的銅擴散阻障能力。 根據第6圖,發現當氨(NH3)流量為〇SCCm或氨(NH3)不 加入時,銅不會散佈於阻障絕緣層之上。
接著,第二阻障絕緣層(測試阻障絕緣層)依下面的實 驗例子將於以下提出討論,絕緣層表面電漿化,及絕緣層 形成之後續處理之狀態設定如上所述,在此章程的絕緣層 形成狀態中設定如下。 絕緣層形成狀態2 (a )第二絕緣層形成氣體 六曱基二矽氧烷(HMDS0)流量:50sccm 一氧化氮(N20)流量(參數):〇、50、200、400、 8 0 0 s c cm 氣體壓力(參數):lTorr (b)電漿激活狀態 下電極:低頻電源(頻率=38(^1^) = 150?(0.3 61/〇112) 上電極··高頻電源(頻率= 13.56MHz) = 〇W (c )基板加熱狀態·· 3 7 5 (a) 測試阻障絕緣層的相關導電係數及折射率 第2圖係顯示導電係數、第二阻障絕緣層行成氣體一氧
2060-4958<PF(N).ptd 第19頁 546694 ^-—_ 五、發明言兒明(15) 化氮(N2 〇)、與才斤射 〆 試阻障絕緣層的相、間的關係,其中,左縱座標為測 一阻障絕緣層的形 電係數並為線性刻度,橫座標為第 刻度。 氣體一氧化氮(化0)之流量並為線性 測試阻障絕緣屑 流量再生,分別為〇" 種不同的形成氣體一氡化氮(n20) 層形成狀態2中上雷托上、20 0、40 0、80 0sccm,且於絕緣 之測量方法如下,/“、、提供高頻電源,其相關導電係數 層表面,則在汞探,將汞探測計裝置於測試阻障絕緣 而頻率1MHz之單電壓^與矽基板之間會產生一 Dc電壓差, 圖7中測出的相關導電你重且^^以〇”測量可以使用,在 6338埃波長之氦〜氮射標示’再者,折射率以 以〇標示。 雷射儀來測量,在圖7中測出的折射率 根據第7圖,相關導雷筏 ★ 增加而增加,當一氧匕:氧化_〇)流量的 係數約為3.9,當—氧化H'i為0scci^,相關導電 相關導電係數約為4」(2〇) &量增加為8〇〇SCCm時’ # 氧化氮(〜〇)流量的增加而逐漸減少’ 虽一,化氮流量為〇s⑽時,折射率約為工?6 ’當— ^匕流量增加為8o〇sccm0f,折射率約為168,如 同刖述之第一阻障絕緣層具有更高的密度。 (b ) 測試阻障絕緣層的漏電量 第8圖係顯示測試阻障絕緣層在處理前與處理後其電 場與漏電密度的關係,縱座標為測試阻障絕緣層的漏電密 2060-4958-PF(N).ptd 第20頁 546694 五、發明說明(16) 度(A/ cm2)並為線性刻度,橫座標為電場大小(MV/cm)並 ,線性刻度,第一阻障絕緣層形成氣體一氧化氮(n2〇)流 量〇、2 00、80 0 seem做為設定之參數。 口 ^測試阻障絕緣層於鋼層上形成,銅層在絕緣層形成過 程後瞬間接地但不包括處理過程前及處理過程後,且汞探 /貝J。十裝置於測試阻障絕緣層表面,接著,漏電量可經由提 ^采探測計一負電壓而測得,而漏電密度就可由供汞探測 计的面積經計算得知,橫座標上的電場大小是由該負電壓
所產生之電場大小,一負符號象徵銅層至汞探測計之間的 電場。 ^ 根據第8圖,當一氧化氮(N20)流量為Oseem時,漏電 密度的途增發生在低電場狀態下,這表示阻障絕緣層的導 電破損,然而,雖然其他例子亦須考慮導電破損的特性, 但確很難得知此導電破損是因為銅擴散阻障能力或是阻障 絕緣層的缺陷所引起。
在此’漏電密度與一氧化氮(N2 〇)流量的相關性不 大’除了第一阻障絕緣層的一氧化氮(N2〇)流量為〇sccm 時’其他狀態下,漏電密度的增加與一氧化氮(% 〇)流量 為0 s c c m時大不相同,而電場則以負方向增加並為1 至 1〇4 A/cm2在-5 MV/cm條件下,此漏電密度比前述之第3圖 中的含氮測試阻障絕緣層還大。 (c) 測試阻障絕緣層的銅擴散阻障能力 第9圖係顯示測試阻障絕緣層的銅擴散阻障能力的測 試結果,第一阻障絕緣層的形成氣體一氧化氮(n2〇)流量
2060-4958-PF(N).ptd 第21頁 546694 五、發明說明(17) 如上所述t做^參數,其中縱座標為銅密度(^^3)並為對 數J度彳’、座‘為測試阻障絕緣層表面至銅層的測量距離 d(nm)並為線性刻度。 雕 該測試阻障絕緣層在銅層上形成,在圖9中以虛線表 示表面邊界,、剛試阻障絕緣層的銅擴散阻障能力係測量經 處理後之測試卩且障絕緣層上的銅密度而得。 一根據第9圖,發現當一氧化氮(N2〇)流量為〇sccin或一 氧化氮(%0)不加入時,則銅會散佈到阻障絕緣層上,在 此’銅的散佈與一氧化氮(仏〇)有相當的關係。
如上所述’根據本發明的第一實施例,發現一阻障絕 緣層含有碎(Si)、氧⑻、氫⑻、氮⑻及碳(c)並為高密 度且其相關導電係數高因為此絕緣層含氮,此絕緣層漏電 量小。 再者’ 一阻障絕緣層含有矽(Si)、氧(〇)、氫(H)及 碳(C)具有低相關導電係數,其密度則相對的小,漏 貝I丨相Μ的大。 以上=種阻障絕緣層用第一絕緣層形成氣體1 a或1製 絕緣層用第二絕緣層形成氣M2包含—氧化氮
(2〇)製w者具有絕佳的銅擴散阻障能力,因此,因此其 相異處不大。 ' 根據1體的評價’—阻障絕緣層含有石夕(si)、氧 展/ϋ 1 ^Ν)及碳(c)有絕佳的密度,也因此該絕 (si广二二阻障、絕緣層,一阻障絕緣層含有石夕 、氩(H)及碳(c)很適合做為第二阻障絕轉
546694 五、發明說明(18) 層。 如上所述,雙層或多層之基板至少由一第一阻障絕緣 層及第二阻障絕緣層做為其阻障絕緣層,再者,為了不影 響漏電量小、鋼擴散阻障能力大的功效,其第一阻障絕緣 層的厚度設計較薄因其相關導電係數與厚度成正比,而 二阻障絕緣層的厚度設計較厚因其相關導電係數與厚度成 反比,其厚度佔整個阻障絕緣層的大部份,因此,整^阻 障絕緣層具有漏電量小、銅擴散阻障能力大的特性。 本發明對上述之第一實施例有詳盡的討論,但本發明
的靶圍並不只限於上述之實施例,各種與本發明的要點及 精神相符之實施例都包含在内。 · ' Αt,第一阻障絕緣層的形 氣體包含石夕(SO、氧⑻、氮⑻、氮、 二矽氧烷(HMDSO) + —盞仆备“τ Λ、 τ 石夕氧烷⑽DS0) +氨(1^化人亂;1〇)辨+氨(叫)或六甲基二 (〇卡的其他種類之矽氧烷(si 牛在表 (0MCTS)或四曱基環四矽氧烷(τ 义氧义 列舉在表⑴)中的其他種 代再者,可 取代矽氧院(sil0xane),=甲基石夕燒(methyisilane)
氧化碳(叫)列舉在表(iii)^卜用—3,氣體如水(h2c〇、二 氮氣體氮(N2)可用氨(NH3)來 ^化氮(M)來代替, 成氣體具有多種組合包含:忍即,第一絕緣層之 氣體或是含矽氣體及含氮氣體。氣體、含氧氣體、及含 再者,第二阻障絕緣層之形成氣體具有(Si)、氧
546694
五、發明說明(19) (0)、氫(H)、碳(C)、六曱基二矽氧烷(HMDSO) + —氧化 氮(N2 0 ),含矽氣體中,可用列舉在表(丨)中的其他種類之 矽氧烧(siloxane)如八曱基四矽氧烷(0MCTS)或四甲基環 四矽氧烷(TMCTS)來替代六曱基二矽氧烷(HMDS0),再者' 可用列舉在表(i i)中的其他種類之甲基矽烷 (methyl silane)來取代矽氧烷(si l〇xane),此外,含氧氣 體如水(HJ)、二氧化碳(C〇2)列舉在表(iii)可用一氧化氮 (& 0 )來代替,因此,第二阻障絕緣層之形成氣體具有多: 種組合包含了含矽氣體及含氧氣體。 '
此外’具有矽(Si)、氧(〇)、氫(H)、氮(N)、碳(c)之 絕緣層被視為第一阻障絕緣層,並具有其特質,再者,具 有矽(Si)、氧(〇)、氫(H)、氮(n)之絕緣層亦具有其特 質,在此,矽烷(silanKSiH4))可替代六甲基二矽氧烷 (HMDS0),一氧化氮(化0)或水(HJ)其一可做為含氧氣體, 氮(Nz)或氨(NH3)其一可做為含氮氣體。 、"ΪΓ具有矽(Si)、氧⑻、氫(H)、碳(c)之絕緣層 被視為第二阻障絕緣層,並具有其特質’再者,具 r(Sli 之絕緣層亦具有其特質,在此,石夕烧
(S:lane(SlH4))可替代六甲基二石夕氧烧(hmds〇),一氧化 氮(N20)或水(h2〇)其一可傲&八条a 其-可做為含氮氣體。為…體,氬⑷或氨⑽3) 第10A圖為本發明之楚_ 第一實施例之半導體裝製及制早 方法之侧視圖,第丨⑽圖為 體裝裟及I早 在第10A圖與第i〇B圖中 ° 甲,本發明之製造方法形成一覆
第24頁 546694
蓋於由銅層形成之基板上的阻障絕緣層34a,整個内阻障 絕,層包含了阻障絕緣層34a、34c,而阻障絕緣層38&則 覆蓋於由銅層形成之基板的外側。 •弟一,一甴二氧化矽(Si Ο?)或摻碳氫之二氧化矽材料 (SiOCH)在半導體基板31上形成之埋線(wiring — 絕緣層32其厚度約1 # m,在此,摻碳氫之二氧化矽材料 (SiOCH)層為絕緣層含有矽(Si)、氧(〇)、氫(H)、碳(c)。
接著’在埋線(wi ring-l3Urying)絕緣層經由蝕刻法形 成基板凹槽,在基板凹槽内面形成一氮化钽層33a做為阻 斷銅散層’接著,以爆裂法在氮化钽層表面上形成一銅根 層(圖中無顯示),接著銅層以電鍍法燒除,接著研磨銅層 及氮化鈕層3 3 a而得到最後的表面,利用化學機械研磨 (CMP )法使兩者皆突出於基板,於是,銅層及氮化鈕層33a 形成於下基板上,上述元件接於基板2丨之上。 接著,絕緣層34的内層阻障絕緣層34a利用電漿化學 氣相沉積法(C V D)在銅層3 3 B上形成,其細節將於下解釋。 第一,基板21在阻障絕緣層34a形成前經由電漿化處 理’處理氣體狀態之設定如第一實施例中所述。
再者’基板21移入薄膜製造裝置1〇ι的反應室1中並固 定於基板支架3上,接著將基板21加熱至375乞並維持該溫 度’接著’處理氣體導入反應室1中並維持ITorr的壓力, 接著,400W(0· 963W/ cm2)的高頻電源輸入上電極中,下電 極則不提供低頻電源’因此,處理氣體會電漿化,在此狀 態下銅層上的自然氧化層在一定時間内會被移除。
2060-4958-PF(N).ptd 第25頁 546694 五、發明說明(21) -- 。2著’為了形成阻障絕緣層34a,基板溫度加熱至375 C :六甲基二矽氧烧(HMDSO),一氧化氮(N20),氨(NH3)導 入第一圖中之製造裝置101的反應室1中並各以50 seem、 2〇〇SCCm、50scci«之流量及ITorr的壓力進入。 接著’低頻電源約1 5 〇 W ( 0 · 3 6 W / cm2 )提供至下電極3之 上其頻率= 380 kHz,此時上電極2不提供電源。
因此,六甲基二矽氧烷(HMDS0),一氧化氮(N20),氨 (NH3)將,電漿化,此過程持續1〇秒,這將會形成一由電 漿化學氣相沉積(pE-CVD)二氧化矽(以〇2)膜構成之阻障絕 緣層32aa’並含有矽(Si)、氧(〇)、氫(H)、氮(N)、碳(c) 且其厚度為20nm。 接者’當基板溫度保持3 7 5 °C,六甲基二石夕氧烧 (HMDS0)及一氧化氮(化0)以5〇sccm、2〇〇sccm的流量導入 並維持ITorr的壓力。 接著,低頻電源約150W(0· 36W / cm2)提供至下電極3之 上其頻率= 380 kHz,此時上電極2不提供電源。
因此,六甲基二矽氧烷(HMDS0),一氧化氮(n2〇),氨 (N札)將會電漿化,此過程持續1 〇秒,這將會形成一由電 漿化學氣相沉積(PE-CVD)二氧化矽(以〇2)膜構成之阻障絕 緣層32ab’並含有矽(Si)、氧(〇)、氫(JJ)、氮(n)、碳(〇 且其厚度為20nm。 最後,經上述處理後形成一阻障絕緣層34a包含了第 一阻障絕緣層34aa及第二阻障絕緣層34ab。 接著’繼續在阻障絕緣層34a上利用我們以熟知的方
546694 五、發明說明(22) 法形成内絕緣層34中的阻障絕緣層34b及阻障絕緣層34(:並 具有低導電係數的特性。 接著一埋線絕源層3 5,以二氧化石夕(s i 〇2)或摻碳氫 之二氧化矽材料(Si0CH)製成並具有i 的厚度,其形成 法與利用一氧化石夕(S i 〇2 )或摻碳氫之二氧化石夕材料 (SiOCH)製成内絕緣層34的方法相同。 接著,一主要由銅形成之連接構造36與一主要由銅形 成之上基板37經由熟知的雙紋法形成,在第1〇A及第1〇β圖 中,編=36a、3 7a、氮化鈕層、36b、371)為銅層。 接著,一阻障絕緣層38a包含第一阻障絕緣層38aa及 第二阻障絕緣層礼在整個表面上形成,其形成方法與狀態 和形成阻障絕緣層34aa及阻障絕緣層34ab之方法相同,最 後,整個半導體裝置完成。 如上所述,根據第二實施例,形成氣體氨(Μ%)在過 程中段導入並於後段停止,這步驟可以更容易形成 造的阻障絕緣層34a、38a,整體而言,具有低漏電量、足 夠的阻銅括散能力及低相關導電係數。 2結,當阻障絕緣層34a、383被插入在銅基板33 絕緣時’可使得半導體裝置達到高傳輸率及 ^發明肖上述之第二實施例有詳盡的討論,但本發明 的犯圍並不只限於上述之實施例,各種 精神相符之實施例都包含在内。 知月幻要點及 例如,在第二實施例中,障絕緣層34a、·具有雙層 第27頁 2060-4958-PF(N).ptd 546694 五、發明說明(23) 構造,其中第一阻障絕緣層34aa、38aa含有氮,第二阻障 絕緣層34ab、3 8ab則不含氮,然而,這也可以包含三層或 多層之構造,但最少具有第一阻障絕緣層34aa、38aa含有 氮及第二阻障絕緣層34ab、38ab不含氮。 再者,含氮之第一阻障絕緣層34aa、38aa與銅基板相 連,而不含氮之第二阻障絕緣層34ab、38ab則覆蓋於第一 阻障絕緣層34aa、38aa之上,在此,相反的狀況亦可包括 在内。 然而,雖然阻障絕緣層34c形成於阻障絕緣層34b之 上,但阻障絕緣層34c在銅層形成之基板37或設置有銅層 之基板37b與阻障絕緣層34b相連具低導電係數是可被忽略 如上所述,本發明提出 一含氮之第一阻障絕緣層, 障能力,因為此層具有高密 數,以及-不含氮之第二阻 能力,但此層具有低密度、 層覆蓋於銅層之上。 雙層或多層之構造但至少具有 此構造可提供足夠的銅擴散阻 度但相關性高之相關導電係 P手絕緣層,具有低銅擴散阻障 低相關導電係數,此阻障絕緣 根據此雙層構造 體而言,此阻障絕缘芦二=啤絕緣層可以互換而製,就3 銅擴散阻障能力I:::有低相關導電係數、漏電量小 時入銅基板間做為内阻障絕緣/ 雖然本發明已:數個二輸效率及更可靠的特性 数個較佳貫施例揭露如上,然其並与
546694 五、發明說明(24) 用以限定本發明,任何熟習此項技藝者,在不脫離本發明 之精神和範圍内,仍可作些許的更動與潤飾,因此本發明 之保護範圍當視後附之申請專利範圍所界定者為準。
2060-4958-PF(N).ptd 第29頁 546694 圖式簡單說明 第1圖係顯示本發明實施例中之半導體裝置製造方法 電漿層製造儀器的側視構造。 第2圖係顯示本發明之第一實施例中第一阻障絕緣層 其相關導電係數與氨(NH3 )流量之關係圖。 第3圖係顯示本發明之第一實施例中第一阻障絕緣層 其漏電密度之圖示。 第4圖係顯示本發明之第一實施例中第一阻障絕緣層 其銅擴散阻障能力之圖示。 第5圖係顯示本發明之第一實施例中另一第一阻障絕 緣層其漏電密度之圖示。 第6圖係顯示本發明之第一實施例中另一第一阻障絕 緣層其銅擴散阻障能力之圖示。 第7圖係顯示本發明之第一實施例中第二阻障絕緣層 其相關導電係數與一氧化氮(N20)流量之關係圖。 第8圖係顯示本發明之第一實施例中第二阻障絕緣層 其漏電密度之圖示。 第9圖係顯示本發明之第一實施例中第二阻障絕緣層 其銅擴散阻障能力之圖示。 第10A及10B圖係顯示本發明之第二實施例中半導體裝 置及其製造方法之剖面圖。 符號說明: , 1〜反應室 101B〜氣體供應部 2〜上電極
2060-4958-PF(N).ptd 第30頁 546694 圖式簡單說明 3〜下電極 7 、8〜電源 9 a〜管路 1 Oa〜開關 1 2〜加熱器 2 1〜基板
1BB 2060-4958-PF(N).ptd 第31頁
Claims (1)
- 546694 六、申請專利範圍 1 · 一種半導體裝置,具有卩旦障絕緣層,用以覆蓋鋼導 線及設置有銅層的基板,該卩旦障絕緣層包含: 一雙層構造或多層的構造,具有至少一第一阻障絕緣 層包含矽,氧,氮及氫或是包含矽,氡,氮,氫及碳,$ 及一第二阻障絕緣層包含石夕,氧,氫或是包含石夕,氡,氣 及碳。 ‘ 2·如申請專利範圍第1項所述之半導體裝置,更包含 一絕緣層在該阻障絕緣層之上,具有低導電系數。 3·如申請專利範圍第2項所述之半導體裝置,其中, 該阻障絕緣層與該絕緣層具有低導電系數並構成一内層絕 緣層,且在該絕緣層上形成之銅導線及包含銅層之導線亦 具有低導電系數。 ’> 4· 一種半導體裝置製造方法,包含下列步驟: 製作一第一阻障絕緣層包含矽,氧,及氫或是包含 矽,氧及碳,經由電漿法反應形成第一層薄膜; 以及製作第二阻障絕緣層具有具有矽,氧,氮及氣或 是具有矽,氧,氮,氫及碳,經由電漿法反應形成第二層 薄膜,再製作阻障絕緣層具有雙層構造或多層的構造, 其中至少具有一第一阻障絕緣層及一第二阻障絕緣層 覆蓋於銅導線或設置有銅層之基板上。 曰 5·如申請專利範圍第4項所述之半導體裝置製造方 法,其中,該第一阻障絕緣層為一層絕緣層且包含矽, 氧,氮及氫,並由矽烷(si lane(Si Hj),以及至少具有_ 氧化氮(%0)或水(HJ)及氮(N2)或氨(Nh3)的氣體所形成。2060-4958-PF(N).ptd 第32頁 546694 六、申請專利範圍 6 ·如申請專利範圍第4項所述之半導體裝置製造方 法,其中,該第一阻障絕緣層為一層絕緣層且包含矽, 氧,氮,氫及碳,且該第一層組成氣體包含了矽氧烷 (siloxane)或甲基矽烷(methylsilane (SiHn(CH3)4_n:n = 0, 1,2,3)) ’以及一氧化氮(N20),水(H20)或二氧化碳 (C02),以及氮(N2)或氨(NH3)。 7 ·如申請專利範圍第6項所述之半導體裝置製造方 法,其中, 石夕烷(si loxane)由六甲基二矽氧烷 (hexamethyldisiloxane (HMDSO : (CH3)3Si-0-Si(CH3) 3)), 或八甲基四石夕氧烧(octamethylcyclotetrasiloxane (OMCTS:((CH3)2)4Si4 04 )(化學公式1))或 四曱基環四矽氧烧(tetramethylcyclotetrasiloxane (TMCTS: (CH3H)4Si4 04 (化學公式2)))其中之一所製成。 8·如申請專利範圍第6項所述之半導體裝置製造方 法,其中,甲基矽烷(1^1:1^13:113116(81扎((:113)4_11:11 = 0,1, 2,3))由單甲基矽烷(monomethylsilane(SiH3(CH3))), 二甲基矽烷(dimethylsilaneCSiH^Ci^D:), 三甲基矽烷(tri me thy 1 si lane (Si H (CH3 )3))或 四甲基矽烷(七6 1:^11^1:[^1311&1^(3111((:113)4))所製成。 9·如申請專利範圍第4項所述之半導體裝置製造方 法,其中,該第一阻障絕緣層為一層絕緣層且包含矽, 氧,氮,氫及破,且該第一層組成氣體包含了石夕氧烷2060-4958-PF(N).ptd 546694 六、申請專利範圍 (s i 1 ο X ane)或 F 基石夕垸(me t hy 1 s i 1 ane (S i Hn (CH3 )4_n : η = 0, 1,2,3)) ’ 以及氮(N2)或氨(NH3)。 1 〇 ·如申請專利範圍第9項所述之半導體裝置製造方 法,其中,矽氧烷(siloxane)由六甲基二矽氧烷 (hexanmethy Id i si l〇xane(HMDS0: (CH3)3Si-〇-Si (CH3)3)), 或八曱基四石夕氧炫octamethylcyclotetrasiloxane (OMCTS : ((CH3)2 )4Si4 04 (化學公式3)) 或四甲基環四石夕氧烧(tetramethylcyclotetrasi loxane (以(:丁3:((:1131〇4314 04 (化學公式4)))其中之一所製成。 11.如申請專利範圍第9項所述之半導體裝置製造方 法,其中,甲基石夕烧(methylsilane (SiHn(CH3 )4_n: n = 0,1, 2, 3))由單曱基石夕烧(monomethylsi lane(SiH3(CH3))), 二甲基矽烷(dimethylsilane(SiH2(CH3)2)), 三甲基石夕院trimethylsilane (SiH(CH3)3)或 四甲基石夕院(七61:厂311161:1171511&116(8111((]113)4))所製成。 12·如申請專利範圍第4項所述之半導體裝置製造方 法,其中,該第二阻障絕緣層為一層絕緣層且包含矽’ 氧,氫及碳,且該第二層組成氣體包含矽烷 (silane(SiH4)),以及一氧化氮(N2〇)或水(H20)。 13·如申請專利範圍第4項所述之半導體裝置製造方 法,其中,該第二阻障絕緣層為一層絕緣層且包含矽’ 氧,氫及碳,且第二層組成氣體包含矽氧烷(si loxane)或 曱基妙烷(methylsilane (SiHn(CH3 )4_n :n = 0,l,2,3)) ’ 以 及一氧化氮(N20),水(H20)或二氧化碳(C02)。2060-4958-PF(N).ptd 第34頁 546694 六、申請專利範圍 14.如申請專利範圍第13項所述之半導體裝置製造方 法,其中,石夕氧烧(siloxane)由六甲基二石夕氧烧 (hexanmethyldisiloxane(HMDSO:(CH3)3Si - 〇-Si(CH3)3)), 或八曱基四矽氣烷octamethylcyclotetrasiloxane (0MCTS:((CH3)2)4Si4 04 (化學公式5)) 或四曱基環四石夕氧烧(tetramethylcyclotetrasiloxane (TMCTS : (CH3H)4Si4 04 (化學公式6)))其中之一所製成。 15·如申請專利範圍第13項所述之半導體裝置製造方 法,其中,甲基矽烷(„161:1^1以13116(3 4((:113)4_11:11二0,1, 2,3))由單甲基石夕烷(monomethy lsi lane(SiH3(CH3))),二 T*^^(dimethylsilane(SiH2(CH3)2)),Sf*^^ trimethylsi lane (SiH(CH3)3)或四甲基矽烷 (tetramethylsilane (SiH (CH3)4))所製成。 16·如申請專利範圍第4項所述之半導體裝置製造方 法,在該阻障絕緣層形成前具有將銅層表面曝露於氨 (ΝΗ3)電漿氣體中以除去銅層表面的氧化膜的步驟。 1 7 ·如申請專利範圍第4項所述之半導體裝置製造方 法,在該阻障絕緣層上具有形成低導電係數薄膜的步驟。 18·如申請專利範圍第π項所述之半導體裝置製造方 法,其中由鋼層製成之導線或主要由銅層製成之基板具有 低導電係數。2060-4958-PF(N).ptd 第35頁
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001247936A JP3745257B2 (ja) | 2001-08-17 | 2001-08-17 | 半導体装置及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW546694B true TW546694B (en) | 2003-08-11 |
Family
ID=19077174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW091113931A TW546694B (en) | 2001-08-17 | 2002-06-25 | Semiconductor device and method of manufacturing the same |
Country Status (5)
Country | Link |
---|---|
US (1) | US6815824B2 (zh) |
EP (1) | EP1284500A3 (zh) |
JP (1) | JP3745257B2 (zh) |
KR (1) | KR100484322B1 (zh) |
TW (1) | TW546694B (zh) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100352036C (zh) | 2002-10-17 | 2007-11-28 | 株式会社瑞萨科技 | 半导体器件及其制造方法 |
AU2003291348A1 (en) * | 2002-10-31 | 2004-05-25 | Advanced Micro Devices, Inc. | An improved barrier layer for a copper metallization layer including a low k dielectric |
DE10250889B4 (de) | 2002-10-31 | 2006-12-07 | Advanced Micro Devices, Inc., Sunnyvale | Verbesserte SiC-Barrierenschicht für eine Kupfermetallisierungsschicht mit einem Dielektrikum mit kleinem ε und Verfahren zur Herstellung derselben |
JP4034197B2 (ja) * | 2003-01-31 | 2008-01-16 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP4454242B2 (ja) | 2003-03-25 | 2010-04-21 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
US7276441B1 (en) * | 2003-04-15 | 2007-10-02 | Lsi Logic Corporation | Dielectric barrier layer for increasing electromigration lifetimes in copper interconnect structures |
US7081673B2 (en) * | 2003-04-17 | 2006-07-25 | International Business Machines Corporation | Multilayered cap barrier in microelectronic interconnect structures |
JPWO2005013356A1 (ja) * | 2003-07-18 | 2007-09-27 | 日本電気株式会社 | 溝配線を有する半導体装置および半導体装置の製造方法 |
JP4938222B2 (ja) * | 2004-02-03 | 2012-05-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2005294333A (ja) * | 2004-03-31 | 2005-10-20 | Semiconductor Process Laboratory Co Ltd | 成膜方法及び半導体装置 |
US7285842B2 (en) * | 2004-04-27 | 2007-10-23 | Polyset Company, Inc. | Siloxane epoxy polymers as metal diffusion barriers to reduce electromigration |
JP5096669B2 (ja) | 2005-07-06 | 2012-12-12 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
DE102005035740A1 (de) * | 2005-07-29 | 2007-02-08 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer isolierenden Barrierenschicht für eine Kupfermetallisierungsschicht |
JP4521349B2 (ja) * | 2005-10-13 | 2010-08-11 | 富士通セミコンダクター株式会社 | 半導体集積回路装置 |
JP4535505B2 (ja) * | 2006-02-10 | 2010-09-01 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP5196467B2 (ja) * | 2007-05-30 | 2013-05-15 | 東京エレクトロン株式会社 | 半導体装置の製造方法、半導体製造装置及び記憶媒体 |
FR2926294B1 (fr) * | 2008-01-16 | 2010-08-13 | Commissariat Energie Atomique | Procede de realisation de cavites d'air dans des microstructures |
FR2926397B1 (fr) * | 2008-01-16 | 2010-02-12 | Commissariat Energie Atomique | Procede de fabrication de films dielectriques permeables |
JP4423379B2 (ja) * | 2008-03-25 | 2010-03-03 | 合同会社先端配線材料研究所 | 銅配線、半導体装置および銅配線の形成方法 |
JP5554951B2 (ja) | 2008-09-11 | 2014-07-23 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US10147747B2 (en) * | 2014-08-21 | 2018-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method thereof, and electronic device |
KR102399345B1 (ko) | 2014-11-12 | 2022-05-19 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
US10546826B2 (en) * | 2018-07-02 | 2020-01-28 | Intel IP Corporation | Device containing and method of providing carbon covered copper layer |
JP6807420B2 (ja) * | 2019-02-21 | 2021-01-06 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置およびプログラム |
JP2020155591A (ja) | 2019-03-20 | 2020-09-24 | 株式会社東芝 | 半導体装置 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5040046A (en) | 1990-10-09 | 1991-08-13 | Micron Technology, Inc. | Process for forming highly conformal dielectric coatings in the manufacture of integrated circuits and product produced thereby |
EP0519079B1 (en) | 1991-01-08 | 1999-03-03 | Fujitsu Limited | Process for forming silicon oxide film |
JP2684942B2 (ja) | 1992-11-30 | 1997-12-03 | 日本電気株式会社 | 化学気相成長法と化学気相成長装置および多層配線の製造方法 |
JP2912174B2 (ja) | 1994-12-27 | 1999-06-28 | 日本電気株式会社 | ライブラリ群及びそれを用いた半導体集積回路 |
EP0720223B1 (en) | 1994-12-30 | 2003-03-26 | STMicroelectronics S.r.l. | Process for the production of a semiconductor device having better interface adhesion between dielectric layers |
US5942328A (en) * | 1996-02-29 | 1999-08-24 | International Business Machines Corporation | Low dielectric constant amorphous fluorinated carbon and method of preparation |
US6287990B1 (en) | 1998-02-11 | 2001-09-11 | Applied Materials, Inc. | CVD plasma assisted low dielectric constant films |
US6159871A (en) | 1998-05-29 | 2000-12-12 | Dow Corning Corporation | Method for producing hydrogenated silicon oxycarbide films having low dielectric constant |
US6147009A (en) * | 1998-06-29 | 2000-11-14 | International Business Machines Corporation | Hydrogenated oxidized silicon carbon material |
JP3365554B2 (ja) | 2000-02-07 | 2003-01-14 | キヤノン販売株式会社 | 半導体装置の製造方法 |
US6417092B1 (en) * | 2000-04-05 | 2002-07-09 | Novellus Systems, Inc. | Low dielectric constant etch stop films |
JP3532830B2 (ja) | 2000-05-24 | 2004-05-31 | キヤノン販売株式会社 | 半導体装置及びその製造方法 |
US6726996B2 (en) * | 2001-05-16 | 2004-04-27 | International Business Machines Corporation | Laminated diffusion barrier |
-
2001
- 2001-08-17 JP JP2001247936A patent/JP3745257B2/ja not_active Expired - Lifetime
-
2002
- 2002-06-24 US US10/176,588 patent/US6815824B2/en not_active Expired - Lifetime
- 2002-06-25 TW TW091113931A patent/TW546694B/zh not_active IP Right Cessation
- 2002-07-01 EP EP02014072A patent/EP1284500A3/en not_active Withdrawn
- 2002-07-12 KR KR10-2002-0040664A patent/KR100484322B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20030042613A1 (en) | 2003-03-06 |
EP1284500A2 (en) | 2003-02-19 |
JP2003059923A (ja) | 2003-02-28 |
EP1284500A3 (en) | 2004-02-04 |
KR20030015838A (ko) | 2003-02-25 |
JP3745257B2 (ja) | 2006-02-15 |
US6815824B2 (en) | 2004-11-09 |
KR100484322B1 (ko) | 2005-04-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW546694B (en) | Semiconductor device and method of manufacturing the same | |
TW493244B (en) | Semiconductor device and method of manufacturing the same | |
TW544919B (en) | Manufacturing method of semiconductor device | |
JP5567588B2 (ja) | 酸素含有前駆体を用いる誘電体バリアの堆積 | |
JP3545364B2 (ja) | 半導体装置及びその製造方法 | |
TW200809971A (en) | Methods to form SiCOH or SiCNH dielectrics and structures including the same | |
TW200537644A (en) | Deposition method and semiconductor device | |
TW498504B (en) | Semiconductor device and method of manufacturing the same | |
TW200300965A (en) | Semiconductor device and method of manufacturing the same | |
TW502405B (en) | Semiconductor device and semiconductor device manufacturing method | |
TW531835B (en) | Film forming method, semiconductor device and manufacturing method of the same | |
JP3934343B2 (ja) | 半導体装置及びその製造方法 | |
TW503514B (en) | Film forming method, semiconductor device and semiconductor device manufacturing method | |
TWI294147B (en) | Deposition method, method of manufacturing semiconductor device, and semiconductor device | |
JP2004523889A (ja) | 金属イオン拡散バリア層 | |
TW531802B (en) | Semiconductor device and semiconductor device manufacturing method | |
TWI234843B (en) | Semiconductor manufacturing device and the manufacturing method for the same | |
TW200913067A (en) | Improved low k porous SiCOH dielectric and integration with post film formation treatment | |
JP3559026B2 (ja) | 半導体装置の製造方法 | |
JP5710606B2 (ja) | アモルファスカーボンのドーピングによるフルオロカーボン(CFx)の接合の改善 | |
KR20100042022A (ko) | 저유전 상수를 갖는 절연막 및 이를 이용한 에어갭 제조 방법 | |
JP2005045058A (ja) | 銅拡散バリア性絶縁膜の形成方法およびその絶縁膜 | |
JP2004015034A (ja) | 成膜方法、成膜装置及び成膜装置のクリーニング方法 | |
TW201019398A (en) | Method for manufacturing semiconductor device | |
JP2004200713A (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MM4A | Annulment or lapse of patent due to non-payment of fees |