TW543007B - Laminated chip-card and its production method - Google Patents
Laminated chip-card and its production method Download PDFInfo
- Publication number
- TW543007B TW543007B TW090107980A TW90107980A TW543007B TW 543007 B TW543007 B TW 543007B TW 090107980 A TW090107980 A TW 090107980A TW 90107980 A TW90107980 A TW 90107980A TW 543007 B TW543007 B TW 543007B
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- carrier material
- contact area
- chip
- chip card
- terminal contact
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S174/00—Electricity: conductors and insulators
- Y10S174/34—PCB in box or housing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
Description
543007 五、發明説明(1 ) 本發明涉及一種由紙或箔所積層之晶片卡用之成本特別 有利之製造方法。 晶片卡當時亦用在許多應用中,其只限於固定之時間或 其中晶片卡只能使用幾次而已。此種例子包括由電話卡, 其中晶片儲存某種數量之電話單位以供使用。由於各別之 晶片卡在此種應用中不是獨立地使用且只具有較小値之記 憶內容,則由於經濟上之原因此晶片卡本身在須保持很小 之購買價格中只能達成價格中很小之一部份。因此須探討 卡材料,卡構造及製造方法,藉此可以儘可能低之成本來 製成晶片卡。 在WO 95/2 1423中已知一種可由紙所製成之晶片卡,其 中晶片卡模組積層成多個紙層。晶片卡模組包含至少一個 半導體晶片(其上具有積體電路及其依據晶片卡規則所形 成之電性接點)。在非接觸式操作之晶片卡中,在晶片卡 模組中安裝一些作爲天線用之導電軌,各導電軌在電性上 是與半導體晶片相連。此種薄片(或積層)之製造是使用一 .般之製紙技術。不同之層是黏合在一起且一起擠壓;在紙 中衝製或銑切一些凹口,以便接納此晶片卡模組。晶片卡 模組(其包括各接點接觸區及半導體晶片用之載體元件)之 製造可獨立於紙層之積層來進行。 在WO 97/1 853 1中描述一種晶片卡,其中一種塑膠層是 與一個積層於其中之1C晶片(其具有一種在雙面上以導體 壓製之隔離用之層而用作基板)相連,使1C晶片之各接點 導電性地與該隔離用之層上之相面對之各導體相連。 543007 五、發明説明(2 ) 在EP 0 706 1 52 A2中描述一種晶片卡及其製法,其中 該晶片在不必製造一'種模組之情況下以覆晶(F1 i p - C h i p)技 術安裝在導體上且背面是積層在一種核心箔以及外部之箔 中。在箔中存在一些庄外部接觸區之穿孔。 在WO 97/27564中描述一種具有積層式晶片模組之晶片 卡’其藉由可加熱之積層滾筒對(pair)來製成。 本發明之目的是提供一種製造方法,藉此可以大量之件 數以成本有利之方式製成晶片卡。 此目的是以申請專利範圍第1項之方法來達成。其它方 式描述在申請專利範圍各附屬項中。 本發明所製成之晶片卡是由至少二種薄載體材料(例如 ,紙或箔)之層所積層而成,其中一層承載晶片卡上所設 置之半導體晶片且第二層具有各接點接觸區及導電軌或外 部連接面(其用來傳送信號及能量)。半導體晶片須安裝在 一層中,使其接觸區面向另一層。這些層須互相連接,使 半導體晶片之各接觸區在電性上與另一層之終端接觸區相 連。在晶片卡設有一種外部連接面時,則半導體晶片接觸 用之各終端接觸區反外部之連接面配置在一層之二個互相 面對之側面上,其間之導電性連接是藉由此種層之載體材 料中之凹或缺口來達成。此晶片卡因此不需使用晶片卡模 組即可製成,特別是載體材料可由滾筒捲繞條或軌且傳送 至一種在製紙原理上已爲人所知之裝置以製成積層。 以下將依據第1及第2圖來描述本發明之製造方法。圖 式簡單說明: -4 - 543007 五、發明説明(3 ) 第1圖一種具有外部連接面之晶片卡製造時所用之配置。 第2圖非接觸式晶片卡製造用之配置。 第1圖是晶片卡製造用之配置中至少二個現有之層所需 之載體材料1,2之側視圖。半導體晶片6用在第一載體 材料1(其用於晶片卡之第一中)中。在較佳之製法中,由 載體材料之條片或軌道而製成許多晶片卡,其只有在載體 材料1 ’ 2接合之後才切割。爲了簡化之故第i圖中之配 置只顯示第一載體材料1中之一種半導體晶片6。在此半 導體晶片6上可想像在左方或右方且亦可能在此圖面中鄰 接著其它半導體晶片,其分別用於其它之晶片卡。每一半 導體晶片6配置在第一載體材料1中,較佳是插入缺口中 ’此種缺口可完全使薄的載體材料1中斷;或此半導體晶 片只存在於一個凹口中,此凹口使第一載體材料1之反面 之上側1 1未受損。也可在此反面之上側1 1上施加其它層 使半導體晶片由反面所覆蓋或亦可在最後之步驟中施加其 它層。 半導體晶片6之各接觸區在製造該積層時經由導電性之 各連接區7(例如,所謂凸塊(Bumps),其由軟焊劑(例如, (NiAu)所構成)而與終端接觸區3相連。終端接觸區3施 加在第二載體材料2之面向半導體晶片6之此側中。在第 1圖之實施例中,各連接面4(其作爲晶片卡之外部接觸用 ’晶片卡例如設有終端機之終端接觸區)位於第二載體材 料2之與半導體晶片6相遠離之外部上側i 1上。導電性 材料位於缺口中以形成一種導電性連接區5,各缺口可在 543007 五'發明説明(4 ) 施加各終端接觸區3及連接面4所需之導電性材料之前形 成於第二載體材料2中。在晶片卡切割之後,第一載體材 料1形成第一層(其具有形成於其中之半導體晶片6),且 第二載體材料2形成第二層2,其具有:電性接點所用之 終端接觸區3 ;設置在缺口中之導電性連接區5 ;及外部 連接面4。面 載體材料1,2在第1圖所示之配置中由滾筒1i所捲繞 ’其就像在製紙或製造紙板時以所謂循環式滾筒來進行之 情況一樣。相連之載體材料之繼續輸送在第1圖中以軋輥 機1 3來表示,軋輥1 3在輸送時壓緊此種由各層所構成之 積層且在此種裝置中沿著載體材料之軌道而配置在不同之 位置。這些滾筒可設有加熱元件,其對載體材料進行加熱 ’使載體材料之間所施加之黏合層達到一種較佳之黏合性 。就半導體晶片6之接觸區)和終端接觸區3之間的導電 性連接區7之製造而言,可經由一種由外部所擠壓之加熱 組件(較佳是一種具有滾動性之加熱滾筒)來進行加熱。 本發明所製之晶片卡因此由至少二種層所組成,當然層 數較多之情況亦屬本發明之範圍。重要的是:半導體晶片 直接積體化於一層中而成爲1C晶片。接點用之電性導體 設置在另一層中(或此層上)。循環式滴筒形之紙或箔特別 是適合用作載體材料。設置在第二層上之終端接觸區及/ 或各連接面較佳是可以一種循環式之綠網印刷法製成,藉 此可使一種導電性之糊(paste)施加在一種薄層中且被結構 化。此1C之各接觸區連接至第二層之終端接觸區以類似 543007 五、發明説明(5 ) 於半導體晶片在覆晶(Flip-Chip)安裝時之習知方法來進行。 爲了改良這些以接觸面或軟焊劑凸塊(bumps)所製成之 導電性連接區7,則可在半導體晶片6和由第二載體材料 2所形成之第二層之間設置一種塡料(underfill),其較佳是 由一種異向性(anisotropic)導電材料所形成。此種材料須 對準,以便在所設置之導電性連接區7之方向中有最大之 導電性,而垂直於此方向(β卩,在各載體材料1,2之連接 區之平面中)之導電性則須儘可能小,以便在不同之接觸 區之間防止短路之發生。亦可使用等向性導電塡料或絕絕A 用之塡料8,此時在下述情況是有利的:在施加載體材料 1,2且完成連結之後這些塡料至少受到一種極小之收縮作 用,使導電性連接區7壓緊在半導體晶片6之接觸區及第 二層2之終端接觸區3上且以此種方式製成一種以足夠大 之力來鎖定(locking)之導電性連接區7。 以類似於此實施例之方式,則在本發明中亦可製成一種 非接觸式之晶片卡。此時在第二載體材料2上未施加各連 接面4,而是在設有終端接觸區3之內表面上施加一種導 電軌1 〇(第2圖)且使之結構化。此種導電軌1 〇可以是螺 旋式線圈,其作爲信號傳送及能量傳送用之天線。第2圖 中其餘之各組件及該晶片卡之製法是與先前第1圖所示之 晶片卡者相同。第二載體材料2較佳是只在面向半導體晶 片6之此側上設有一種導電性結構。積層可像先前所述之 實施例一樣由多於二個層所構成。但第1,2圖之構造亦 可互相組合,若期望一種既適合可由外部作電性接觸又可 543007 五、發明説明(6 ) 作非接觸式之應用之晶片卡時。 符號之說明 1,2 載體材料 3 終端接觸區 4 連接面 6 半導體晶片 5,7 導電性連接區 8 塡料 10 導電軌 11 第二載體材料之外部上側 12 滾筒 13 軋輥機
Claims (1)
- 543007 六、申請專利範圍 第90 1 07980號「薄板式晶片卡之製造方法」專利案 (9 2年1月修正) 申請專利範圍·· 1. 一種晶片卡之製造方法,在第一步驟中第一載體材 料(1 )設有至少一種用於各別晶片卡之半導體晶片(6 ) ,其含有一種積體電路及至少一個接觸區,第二載 體材料(2 )設有至少一個用於各別晶片卡之終端接觸 區(3 ), 其特徵爲··使用此種由紙或箔所構成之條片或軌 道作爲載體材料,其用於多個晶片卡中, 第二步驟中各載體材料(1,2)藉由壓緊及/或黏合 而持續地互相連接,半導體晶片之接觸區是與終端 接觸區導電性地相連, 第三步驟中藉由切割或衝壓使各別之晶片卡分開。 2. 如申請專利範圍第1項之方法,其中各載體材料是 藉由滾筒(1 2 )或軋輥機(1 3 )來製備及輸送。 3. 如申請專利範圍第1或第2項之方法,其中 在第一步驟之前第二載體材料(2)設有缺口, 第一步驟中第二載體材料(2 )在一預設之結構中在 二側塗佈一種導電性材料以形成至少一個用於各別 晶片卡之終端接觸區(3 )及至少一個配置在第二載體 材料之相對側上之連接面(4 ),其中在各缺口中在各 別之終端接觸區(3 )和各別之連接面(4 )之間形成一 543007 六、申請專利範圍 種導電性連接區(5 )。 4.如申請專利範圍第1 項之方法,其中在第一步驟中 第二載體材料(2 )在一預設之結構中塗佈一種導電性 材料以形成至少一個用於各別晶片卡之終端接觸區 (3 )及至少一個與此終端接觸區(3 )相連之導電軌(1 〇 ) 〇 5·如申請專利範圔第3項之方法,其中在第一步驟中 第=載體材料(2 )在一預設之結構中塗佈一種導電性 材料以形成至少一個用於各別晶片卡之終端接觸區 (3 )及至少一個與此終端接觸區(3 )相連之導電軌(1 0 )
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DE10016715A DE10016715C1 (de) | 2000-04-04 | 2000-04-04 | Herstellungsverfahren für laminierte Chipkarten |
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TW543007B true TW543007B (en) | 2003-07-21 |
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TW090107980A TW543007B (en) | 2000-04-04 | 2001-04-17 | Laminated chip-card and its production method |
Country Status (8)
Country | Link |
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US (1) | US7069652B2 (zh) |
EP (1) | EP1269411A1 (zh) |
JP (1) | JP2003529856A (zh) |
CN (1) | CN1184595C (zh) |
DE (1) | DE10016715C1 (zh) |
RU (1) | RU2230362C1 (zh) |
TW (1) | TW543007B (zh) |
WO (1) | WO2001075788A1 (zh) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2743649B1 (fr) * | 1996-01-17 | 1998-04-03 | Gemplus Card Int | Module electronique sans contact, carte etiquette electronique l'incorporant, et leurs procedes de fabrication |
US6586078B2 (en) * | 2001-07-05 | 2003-07-01 | Soundcraft, Inc. | High pressure lamination of electronic cards |
US6945790B2 (en) | 2002-01-15 | 2005-09-20 | Tribotek, Inc. | Multiple-contact cable connector assemblies |
US7077662B2 (en) | 2002-01-15 | 2006-07-18 | Tribotek, Inc. | Contact woven connectors |
US7056139B2 (en) | 2002-01-15 | 2006-06-06 | Tribotek, Inc. | Electrical connector |
DE60208580T2 (de) | 2002-01-15 | 2006-11-09 | Tribotek, Inc., Burlington | Gewebter mehrfachkontaktsteckverbinder |
US7083427B2 (en) | 2002-01-15 | 2006-08-01 | Tribotek, Inc. | Woven multiple-contact connectors |
JP2007529089A (ja) | 2003-07-11 | 2007-10-18 | トライボテック,インコーポレイテッド | 多接点織成電気スイッチ |
US7097495B2 (en) | 2003-07-14 | 2006-08-29 | Tribotek, Inc. | System and methods for connecting electrical components |
EP1544786B1 (de) * | 2003-12-17 | 2007-10-03 | ASSA ABLOY Identification Technologies Austria GmbH | Datenträger und Verfahren zur Herstellung desselben |
DE502004009172D1 (de) * | 2004-01-31 | 2009-04-30 | Atlantic Zeiser Gmbh | Verfahren zur Herstellung von kontaklosen Chip-Karten |
DE102004006457A1 (de) * | 2004-02-04 | 2005-08-25 | Bielomatik Leuze Gmbh + Co Kg | Verfahren und Vorrichtung zum kontinuierlichen Herstellen elektronischer Folienbauteile |
US8119458B2 (en) * | 2005-02-01 | 2012-02-21 | Nagraid S.A. | Placement method of an electronic module on a substrate |
EP1686512A1 (fr) * | 2005-02-01 | 2006-08-02 | NagraID S.A. | Procédé de placement d'un ensemble électronique sur un substrat et dispositif de placement d'un tel ensemble |
US7785932B2 (en) * | 2005-02-01 | 2010-08-31 | Nagraid S.A. | Placement method of an electronic module on a substrate and device produced by said method |
US7293355B2 (en) * | 2005-04-21 | 2007-11-13 | Endicott Interconnect Technologies, Inc. | Apparatus and method for making circuitized substrates in a continuous manner |
TWI258207B (en) * | 2005-06-07 | 2006-07-11 | Powerchip Semiconductor Corp | Flash memory and manufacturing method thereof |
US7214106B2 (en) | 2005-07-18 | 2007-05-08 | Tribotek, Inc. | Electrical connector |
US20090222367A1 (en) * | 2008-02-28 | 2009-09-03 | Capital One Financial Corporation | System and Method for the Activation and Use of a Temporary Financial Card |
DE102008019571A1 (de) * | 2008-04-18 | 2009-10-22 | Giesecke & Devrient Gmbh | Chipkarte und Verfahren zu deren Herstellung |
DE102009023405A1 (de) * | 2009-05-29 | 2010-12-02 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung tragbarer Datenträger |
EP2463809A1 (fr) * | 2010-12-07 | 2012-06-13 | NagraID S.A. | Carte électronique à contact électrique comprenant une unité électronique et/ou une antenne |
FR2974925B1 (fr) | 2011-05-02 | 2013-06-14 | Oberthur Technologies | Procede de preparation d'un support de carte a base de cellulose pour minicarte |
DE102012018928A1 (de) * | 2012-09-25 | 2014-03-27 | Infineon Technologies Ag | Halbleitergehäuse für Chipkarten |
CN104102941B (zh) * | 2013-04-11 | 2023-10-13 | 德昌电机(深圳)有限公司 | 智能卡、身份识别卡、银行卡、智能卡触板及表面抗氧化方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH074995B2 (ja) * | 1986-05-20 | 1995-01-25 | 株式会社東芝 | Icカ−ド及びその製造方法 |
NL8601404A (nl) * | 1986-05-30 | 1987-12-16 | Papier Plastic Coating Groning | Gegevensdragende kaart, werkwijze voor het vervaardigen van een dergelijke kaart en inrichting voor het uitvoeren van deze werkwijze. |
DE4403513A1 (de) * | 1994-02-04 | 1995-08-10 | Giesecke & Devrient Gmbh | Chipkarte mit einem elektronischen Modul und Verfahren zur Herstellung einer solchen Chipkarte |
DE59502482D1 (de) * | 1994-11-03 | 1998-07-16 | Fela Holding Ag | Basis Folie für Chip Karte |
FR2741009B1 (fr) * | 1995-11-15 | 1997-12-12 | Solaic Sa | Carte a circuit integre et module a circuit integre |
DE19602821C1 (de) * | 1996-01-26 | 1997-06-26 | Siemens Ag | Verfahren zur Herstellung einer Datenkarte |
JPH10166770A (ja) * | 1996-12-17 | 1998-06-23 | Rohm Co Ltd | 非接触型icカード及びその製造方法 |
US5976391A (en) * | 1998-01-13 | 1999-11-02 | Ford Motor Company | Continuous Flexible chemically-milled circuit assembly with multiple conductor layers and method of making same |
FR2775810B1 (fr) * | 1998-03-09 | 2000-04-28 | Gemplus Card Int | Procede de fabrication de cartes sans contact |
US6271469B1 (en) * | 1999-11-12 | 2001-08-07 | Intel Corporation | Direct build-up layer on an encapsulated die package |
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2000
- 2000-04-04 DE DE10016715A patent/DE10016715C1/de not_active Expired - Fee Related
-
2001
- 2001-04-04 WO PCT/DE2001/001332 patent/WO2001075788A1/de not_active Application Discontinuation
- 2001-04-04 JP JP2001573390A patent/JP2003529856A/ja not_active Withdrawn
- 2001-04-04 CN CNB018078133A patent/CN1184595C/zh not_active Expired - Fee Related
- 2001-04-04 EP EP01931412A patent/EP1269411A1/de not_active Withdrawn
- 2001-04-04 RU RU2002129296/09A patent/RU2230362C1/ru not_active IP Right Cessation
- 2001-04-17 TW TW090107980A patent/TW543007B/zh active
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Also Published As
Publication number | Publication date |
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RU2230362C1 (ru) | 2004-06-10 |
EP1269411A1 (de) | 2003-01-02 |
US20030064544A1 (en) | 2003-04-03 |
WO2001075788A1 (de) | 2001-10-11 |
CN1184595C (zh) | 2005-01-12 |
US7069652B2 (en) | 2006-07-04 |
CN1422413A (zh) | 2003-06-04 |
JP2003529856A (ja) | 2003-10-07 |
DE10016715C1 (de) | 2001-09-06 |
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