TW508785B - Method and device for alignment - Google Patents

Method and device for alignment Download PDF

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Publication number
TW508785B
TW508785B TW090122331A TW90122331A TW508785B TW 508785 B TW508785 B TW 508785B TW 090122331 A TW090122331 A TW 090122331A TW 90122331 A TW90122331 A TW 90122331A TW 508785 B TW508785 B TW 508785B
Authority
TW
Taiwan
Prior art keywords
alignment
overlapped
mark
scope
patent application
Prior art date
Application number
TW090122331A
Other languages
English (en)
Chinese (zh)
Inventor
Akira Yamauchi
Takashi Uenishi
Original Assignee
Toray Eng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Eng Co Ltd filed Critical Toray Eng Co Ltd
Application granted granted Critical
Publication of TW508785B publication Critical patent/TW508785B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Details Of Measuring And Other Instruments (AREA)
TW090122331A 2000-11-22 2001-09-10 Method and device for alignment TW508785B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000356277A JP2002162206A (ja) 2000-11-22 2000-11-22 アライメント方法および装置

Publications (1)

Publication Number Publication Date
TW508785B true TW508785B (en) 2002-11-01

Family

ID=18828556

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090122331A TW508785B (en) 2000-11-22 2001-09-10 Method and device for alignment

Country Status (5)

Country Link
JP (1) JP2002162206A (ja)
KR (1) KR100819571B1 (ja)
CN (1) CN1258809C (ja)
TW (1) TW508785B (ja)
WO (1) WO2002043138A1 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1349114A3 (en) 2002-03-19 2011-06-15 Canon Kabushiki Kaisha Sensor calibration apparatus, sensor calibration method, program, storage medium, information processing method, and information processing apparatus
JP2005166859A (ja) * 2003-12-02 2005-06-23 Athlete Fa Kk ボール搭載装置
CN100406846C (zh) * 2006-03-20 2008-07-30 友达光电股份有限公司 对准检测装置及对准偏移量的检测方法
CN102856239B (zh) * 2006-07-31 2018-03-30 温泰克工业有限公司 将预定元件置于目标平台的装置和方法
CN101188247B (zh) * 2007-08-16 2010-11-10 清华大学 一种有机电致发光显示器及其制备方法
KR100890757B1 (ko) * 2007-12-05 2009-03-26 주식회사 나래나노텍 노즐 디스펜서의 노즐 오프셋 보정 장치 및 방법
KR100975647B1 (ko) * 2008-10-09 2010-08-17 주식회사 나래나노텍 잉크젯 헤드의 얼라인 장치, 액적 실시간 검사 장치, 및 잉크젯 헤드의 얼라인 및 액적 실시간 검사 장치
JP5342210B2 (ja) 2008-10-30 2013-11-13 三菱重工業株式会社 アライメント装置制御装置およびアライメント方法
KR101132842B1 (ko) * 2009-10-22 2012-04-02 세크론 주식회사 다이본딩장치의 오프셋입력방법
US8102064B2 (en) * 2010-04-08 2012-01-24 Nanya Technology Corp. Electrical alignment mark set and method for aligning wafer stack
JP6305887B2 (ja) * 2014-09-16 2018-04-04 東芝メモリ株式会社 半導体装置の製造方法及び半導体製造装置
CN105413769A (zh) * 2015-12-22 2016-03-23 苏州汶颢芯片科技有限公司 微流控芯片对准键合装置
JP7496506B2 (ja) 2020-12-02 2024-06-07 パナソニックIpマネジメント株式会社 部品圧着装置および部品圧着方法
KR102633129B1 (ko) * 2021-09-29 2024-02-06 한국생산기술연구원 다이 웨이퍼 간 본딩 시 정렬방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04302445A (ja) * 1991-03-29 1992-10-26 Toshiba Corp 半導体素子の実装構造
JPH07283272A (ja) * 1994-04-15 1995-10-27 Citizen Watch Co Ltd 電子部品搭載装置
JPH08162503A (ja) * 1994-11-30 1996-06-21 Casio Comput Co Ltd 電子部品の位置合わせ方法及びその装置
US5764366A (en) * 1995-11-30 1998-06-09 Lucent Technologies Inc. Method and apparatus for alignment and bonding

Also Published As

Publication number Publication date
WO2002043138A1 (fr) 2002-05-30
CN1486507A (zh) 2004-03-31
KR20030055315A (ko) 2003-07-02
KR100819571B1 (ko) 2008-04-04
CN1258809C (zh) 2006-06-07
JP2002162206A (ja) 2002-06-07

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