TW409256B - Synchronous semiconductor memory device - Google Patents
Synchronous semiconductor memory device Download PDFInfo
- Publication number
- TW409256B TW409256B TW087107443A TW87107443A TW409256B TW 409256 B TW409256 B TW 409256B TW 087107443 A TW087107443 A TW 087107443A TW 87107443 A TW87107443 A TW 87107443A TW 409256 B TW409256 B TW 409256B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- output
- circuit
- test
- command
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 108
- 230000001360 synchronised effect Effects 0.000 title claims abstract description 106
- 238000012360 testing method Methods 0.000 claims abstract description 210
- 230000003111 delayed effect Effects 0.000 claims abstract description 9
- 230000000875 corresponding effect Effects 0.000 claims description 85
- 230000002079 cooperative effect Effects 0.000 claims description 32
- 230000004913 activation Effects 0.000 claims description 27
- 230000004044 response Effects 0.000 claims description 25
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- YZCKVEUIGOORGS-NJFSPNSNSA-N Tritium Chemical compound [3H] YZCKVEUIGOORGS-NJFSPNSNSA-N 0.000 claims 1
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- 229910052722 tritium Inorganic materials 0.000 claims 1
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- 238000010586 diagram Methods 0.000 description 27
- 102100040862 Dual specificity protein kinase CLK1 Human genes 0.000 description 15
- 230000005540 biological transmission Effects 0.000 description 15
- 101100308578 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) RSF2 gene Proteins 0.000 description 8
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- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 4
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 4
- MVSBXGNECVFSOD-AWEZNQCLSA-N (2r)-2-[3-(4-azido-3-iodophenyl)propanoylamino]-3-(pyridin-2-yldisulfanyl)propanoic acid Chemical compound C([C@@H](C(=O)O)NC(=O)CCC=1C=C(I)C(N=[N+]=[N-])=CC=1)SSC1=CC=CC=N1 MVSBXGNECVFSOD-AWEZNQCLSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 102100040856 Dual specificity protein kinase CLK3 Human genes 0.000 description 2
- 101000749294 Homo sapiens Dual specificity protein kinase CLK1 Proteins 0.000 description 2
- 101000749304 Homo sapiens Dual specificity protein kinase CLK3 Proteins 0.000 description 2
- 101150015939 Parva gene Proteins 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000001934 delay Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000013100 final test Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
- PTHLSIBOMNYSIS-UHFFFAOYSA-N 5-(4-aminophenyl)-8-chloro-3-methyl-1,2,4,5-tetrahydro-3-benzazepin-7-ol Chemical compound C1N(C)CCC2=CC(Cl)=C(O)C=C2C1C1=CC=C(N)C=C1 PTHLSIBOMNYSIS-UHFFFAOYSA-N 0.000 description 1
- 101710177204 Atrochrysone carboxyl ACP thioesterase Proteins 0.000 description 1
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9312355A JPH11144497A (ja) | 1997-11-13 | 1997-11-13 | 同期型半導体記憶装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW409256B true TW409256B (en) | 2000-10-21 |
Family
ID=18028256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW087107443A TW409256B (en) | 1997-11-13 | 1998-05-14 | Synchronous semiconductor memory device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5973990A (https=) |
| JP (1) | JPH11144497A (https=) |
| CN (1) | CN1119816C (https=) |
| TW (1) | TW409256B (https=) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4531892B2 (ja) * | 1999-10-29 | 2010-08-25 | 富士通セミコンダクター株式会社 | 半導体集積回路、半導体集積回路の制御方法、および可変遅延回路 |
| JP4712183B2 (ja) * | 2000-11-30 | 2011-06-29 | 富士通セミコンダクター株式会社 | 同期型半導体装置、及び試験システム |
| JP2004046927A (ja) | 2002-07-09 | 2004-02-12 | Elpida Memory Inc | 半導体記憶装置 |
| JP2004063023A (ja) | 2002-07-30 | 2004-02-26 | Renesas Technology Corp | 半導体記憶装置 |
| JP3949081B2 (ja) * | 2003-06-09 | 2007-07-25 | 株式会社東芝 | サンプリング周波数変換装置 |
| US7321991B2 (en) * | 2004-01-10 | 2008-01-22 | Hynix Semiconductor Inc. | Semiconductor memory device having advanced test mode |
| JP2006331511A (ja) * | 2005-05-25 | 2006-12-07 | Matsushita Electric Ind Co Ltd | 半導体記憶装置およびその検査手法 |
| KR100695512B1 (ko) * | 2005-06-30 | 2007-03-15 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
| EP1990805B1 (en) | 2006-02-28 | 2010-06-30 | Fujitsu Ltd. | Ram macro and timing generating circuit for same |
| KR100894487B1 (ko) | 2007-06-08 | 2009-04-22 | 주식회사 하이닉스반도체 | 워드라인 구동회로, 이를 포함하는 반도체 메모리장치 및그 테스트방법 |
| KR100885485B1 (ko) * | 2007-09-03 | 2009-02-24 | 주식회사 하이닉스반도체 | 반도체 메모리장치 |
| JP2010027155A (ja) * | 2008-07-22 | 2010-02-04 | Sanyo Electric Co Ltd | 半導体記憶装置 |
| KR101188261B1 (ko) * | 2010-07-30 | 2012-10-05 | 에스케이하이닉스 주식회사 | 멀티 비트 테스트 회로 |
| KR101198139B1 (ko) * | 2010-11-23 | 2012-11-12 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치의 프리차지 신호 발생 회로 |
| JP2012203970A (ja) | 2011-03-28 | 2012-10-22 | Elpida Memory Inc | 半導体装置及び半導体装置の制御方法 |
| US9674086B2 (en) * | 2013-11-05 | 2017-06-06 | Cisco Technology, Inc. | Work conserving schedular based on ranking |
| KR102471500B1 (ko) * | 2018-03-12 | 2022-11-28 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이를 포함하는 테스트 시스템 |
| WO2020063413A1 (en) | 2018-09-28 | 2020-04-02 | Changxin Memory Technologies, Inc. | Chip and chip test system |
| CN109164374B (zh) * | 2018-09-28 | 2024-03-29 | 长鑫存储技术有限公司 | 芯片与芯片测试系统 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR960016807B1 (ko) * | 1994-06-30 | 1996-12-21 | 삼성전자 주식회사 | 반도체 메모리 장치의 리던던시 회로 |
| JP2629645B2 (ja) * | 1995-04-20 | 1997-07-09 | 日本電気株式会社 | 半導体記憶装置 |
| US5621690A (en) * | 1995-04-28 | 1997-04-15 | Intel Corporation | Nonvolatile memory blocking architecture and redundancy |
| KR100392687B1 (ko) * | 1995-10-31 | 2003-11-28 | 마츠시타 덴끼 산교 가부시키가이샤 | 반도체 기억장치 |
| KR0172423B1 (ko) * | 1995-11-16 | 1999-03-30 | 김광호 | 고주파수 동작을 하는 반도체 메모리 장치의 테스트회로 및 테스트 방법 |
| KR0170271B1 (ko) * | 1995-12-30 | 1999-03-30 | 김광호 | 리던던트셀 테스트 제어회로를 구비하는 반도체 메모리장치 |
| JP3223817B2 (ja) * | 1996-11-08 | 2001-10-29 | 日本電気株式会社 | 半導体メモリ装置及びその駆動方法 |
-
1997
- 1997-11-13 JP JP9312355A patent/JPH11144497A/ja active Pending
-
1998
- 1998-04-15 US US09/060,311 patent/US5973990A/en not_active Expired - Fee Related
- 1998-05-14 TW TW087107443A patent/TW409256B/zh not_active IP Right Cessation
- 1998-07-13 CN CN98116008A patent/CN1119816C/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN1119816C (zh) | 2003-08-27 |
| CN1217546A (zh) | 1999-05-26 |
| US5973990A (en) | 1999-10-26 |
| JPH11144497A (ja) | 1999-05-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |