TW404026B - Semiconductor-memory device and its production method - Google Patents
Semiconductor-memory device and its production method Download PDFInfo
- Publication number
- TW404026B TW404026B TW088105428A TW88105428A TW404026B TW 404026 B TW404026 B TW 404026B TW 088105428 A TW088105428 A TW 088105428A TW 88105428 A TW88105428 A TW 88105428A TW 404026 B TW404026 B TW 404026B
- Authority
- TW
- Taiwan
- Prior art keywords
- area
- semiconductor memory
- contact
- region
- base
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000011159 matrix material Substances 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims description 49
- 238000000034 method Methods 0.000 claims description 18
- 238000002513 implantation Methods 0.000 claims description 17
- 230000002079 cooperative effect Effects 0.000 claims description 9
- 238000002955 isolation Methods 0.000 claims description 8
- 238000004364 calculation method Methods 0.000 claims description 5
- 239000002019 doping agent Substances 0.000 claims description 5
- 239000007943 implant Substances 0.000 claims description 3
- 230000000875 corresponding effect Effects 0.000 claims description 2
- 238000009792 diffusion process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 210000003128 head Anatomy 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 241000282376 Panthera tigris Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004513 sizing Methods 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19815874A DE19815874C2 (de) | 1998-04-08 | 1998-04-08 | ROM-Halbleiter-Speichervorrichtung mit Implantationsbereichen zur Einstellung eines Kontaktwiderstandes und Verfahren zu deren Herstellung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW404026B true TW404026B (en) | 2000-09-01 |
Family
ID=7864069
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW088105428A TW404026B (en) | 1998-04-08 | 1999-04-08 | Semiconductor-memory device and its production method |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7230877B1 (enExample) |
| EP (1) | EP1070352B1 (enExample) |
| JP (1) | JP2002511655A (enExample) |
| KR (1) | KR100408944B1 (enExample) |
| DE (2) | DE19815874C2 (enExample) |
| TW (1) | TW404026B (enExample) |
| WO (1) | WO1999053546A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100666174B1 (ko) | 2005-04-27 | 2007-01-09 | 삼성전자주식회사 | 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법 |
| KR101391881B1 (ko) | 2007-10-23 | 2014-05-07 | 삼성전자주식회사 | 멀티-비트 플래시 메모리 장치 및 그것의 프로그램 및 읽기방법 |
| CN102456693A (zh) * | 2010-10-27 | 2012-05-16 | 上海华虹Nec电子有限公司 | 掩膜型rom器件的单元结构 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5967666A (ja) * | 1982-10-09 | 1984-04-17 | Mitsubishi Electric Corp | Ｒｏｍ |
| JP2508247B2 (ja) * | 1989-03-20 | 1996-06-19 | 三菱電機株式会社 | マスクｒｏｍの製造方法 |
| US5526306A (en) * | 1994-02-10 | 1996-06-11 | Mega Chips Corporation | Semiconductor memory device and method of fabricating the same |
| JPH0837164A (ja) * | 1994-07-21 | 1996-02-06 | Nec Corp | 半導体装置の製造方法 |
| TW287313B (enExample) * | 1995-02-20 | 1996-10-01 | Matsushita Electric Industrial Co Ltd | |
| JP3586332B2 (ja) * | 1995-02-28 | 2004-11-10 | 新日本製鐵株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
| US5563098A (en) * | 1995-04-10 | 1996-10-08 | Taiwan Semiconductor Manufacturing Company | Buried contact oxide etch with poly mask procedure |
| JP3185862B2 (ja) * | 1997-09-10 | 2001-07-11 | 日本電気株式会社 | マスク型半導体装置の製造方法 |
| US6030871A (en) * | 1998-05-05 | 2000-02-29 | Saifun Semiconductors Ltd. | Process for producing two bit ROM cell utilizing angled implant |
| US6200861B1 (en) * | 1999-03-26 | 2001-03-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of fabricating high density multiple states mask ROM cells |
-
1998
- 1998-04-08 DE DE19815874A patent/DE19815874C2/de not_active Expired - Fee Related
-
1999
- 1999-03-25 JP JP2000544011A patent/JP2002511655A/ja not_active Ceased
- 1999-03-25 DE DE59914831T patent/DE59914831D1/de not_active Expired - Lifetime
- 1999-03-25 KR KR10-2000-7011234A patent/KR100408944B1/ko not_active Expired - Fee Related
- 1999-03-25 EP EP99924679A patent/EP1070352B1/de not_active Expired - Lifetime
- 1999-03-25 WO PCT/DE1999/000901 patent/WO1999053546A1/de not_active Ceased
- 1999-04-08 TW TW088105428A patent/TW404026B/zh not_active IP Right Cessation
-
2000
- 2000-10-10 US US09/685,361 patent/US7230877B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE19815874C2 (de) | 2002-06-13 |
| KR100408944B1 (ko) | 2003-12-11 |
| US7230877B1 (en) | 2007-06-12 |
| EP1070352B1 (de) | 2008-08-13 |
| DE59914831D1 (de) | 2008-09-25 |
| DE19815874A1 (de) | 1999-10-14 |
| WO1999053546A1 (de) | 1999-10-21 |
| JP2002511655A (ja) | 2002-04-16 |
| EP1070352A1 (de) | 2001-01-24 |
| KR20010042569A (ko) | 2001-05-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |