TW374929B - Integrated circuit having a function of testing memory using stress voltage and method of testing memory of the same - Google Patents

Integrated circuit having a function of testing memory using stress voltage and method of testing memory of the same

Info

Publication number
TW374929B
TW374929B TW087109386A TW87109386A TW374929B TW 374929 B TW374929 B TW 374929B TW 087109386 A TW087109386 A TW 087109386A TW 87109386 A TW87109386 A TW 87109386A TW 374929 B TW374929 B TW 374929B
Authority
TW
Taiwan
Prior art keywords
semiconductor memory
stress
bist
test
integrated circuit
Prior art date
Application number
TW087109386A
Other languages
English (en)
Inventor
Cheol-Ha Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW374929B publication Critical patent/TW374929B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
TW087109386A 1998-01-16 1998-06-12 Integrated circuit having a function of testing memory using stress voltage and method of testing memory of the same TW374929B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980001199A KR100269322B1 (ko) 1998-01-16 1998-01-16 스트레스용전압을이용하여메모리를테스팅하는기능을갖는집적회로및그의메모리테스트방법

Publications (1)

Publication Number Publication Date
TW374929B true TW374929B (en) 1999-11-21

Family

ID=19531635

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087109386A TW374929B (en) 1998-01-16 1998-06-12 Integrated circuit having a function of testing memory using stress voltage and method of testing memory of the same

Country Status (4)

Country Link
US (1) US6226764B1 (zh)
JP (1) JP3804733B2 (zh)
KR (1) KR100269322B1 (zh)
TW (1) TW374929B (zh)

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US6119252A (en) * 1998-02-10 2000-09-12 Micron Technology Integrated circuit test mode with externally forced reference voltage
JPH11353900A (ja) * 1998-06-11 1999-12-24 Mitsubishi Electric Corp 半導体装置
JP2001167600A (ja) * 1999-12-07 2001-06-22 Nec Corp 半導体集積回路、半導体集積回路の製造方法および半導体集積回路の試験方法
US6925467B2 (en) * 2002-05-13 2005-08-02 Innopath Software, Inc. Byte-level file differencing and updating algorithms
EP1408516B1 (en) * 2002-10-07 2006-06-21 Infineon Technologies AG A fuse blowing interface for a memory chip
US20040095799A1 (en) * 2002-11-20 2004-05-20 Michael Jacob 2T2C signal margin test mode using different pre-charge levels for BL and/BL
US7275188B1 (en) 2003-10-10 2007-09-25 Integrated Device Technology, Inc. Method and apparatus for burn-in of semiconductor devices
US7434151B2 (en) * 2004-09-30 2008-10-07 Hewlett-Packard Development Company, L.P. Read control systems and methods
KR100702300B1 (ko) * 2005-05-30 2007-03-30 주식회사 하이닉스반도체 테스트 제어 회로를 갖는 반도체 메모리 장치
TWI268514B (en) * 2005-09-09 2006-12-11 Ali Corp Operation oriented power saving device for embedded memory capable of saving power consumption by selectively activating the embedded memory
US7502267B2 (en) * 2006-09-22 2009-03-10 Winbond Electronics Corporation Clock frequency doubler method and apparatus for serial flash testing
US8028211B1 (en) 2007-03-29 2011-09-27 Integrated Device Technology, Inc. Look-ahead built-in self tests with temperature elevation of functional elements
US7877657B1 (en) 2007-03-29 2011-01-25 Integrated Device Technology, Inc. Look-ahead built-in self tests
KR100904962B1 (ko) * 2007-05-31 2009-06-26 삼성전자주식회사 스트레스 검출 회로, 이를 포함하는 반도체 칩 및 스트레스검출 방법
JP5145844B2 (ja) * 2007-09-26 2013-02-20 富士通セミコンダクター株式会社 半導体装置及びメモリシステム
KR100913960B1 (ko) * 2007-12-14 2009-08-26 주식회사 하이닉스반도체 빌트인 셀프 스트레스 제어 퓨즈장치 및 그 제어방법
KR101903520B1 (ko) * 2012-01-06 2018-10-04 에스케이하이닉스 주식회사 반도체 장치
US9116876B2 (en) * 2012-12-18 2015-08-25 Qualcomm Incorporated Programmable built-in-self tester (BIST) in memory controller
KR102551551B1 (ko) 2018-08-28 2023-07-05 삼성전자주식회사 이미지 센서의 구동 방법 및 이를 수행하는 이미지 센서

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JPH0770620B2 (ja) * 1990-12-26 1995-07-31 株式会社東芝 半導体記憶装置
KR960007478B1 (ko) * 1990-12-27 1996-06-03 가부시키가이샤 도시바 반도체장치 및 반도체장치의 제조방법
US5315598A (en) * 1991-04-04 1994-05-24 Texas Instruments Incorporated Method to reduce burn-in time and inducing infant failure
JP2793427B2 (ja) * 1992-04-08 1998-09-03 株式会社東芝 半導体装置
KR950014099B1 (ko) * 1992-06-12 1995-11-21 가부시기가이샤 도시바 반도체 기억장치
US5424988A (en) * 1992-09-30 1995-06-13 Sgs-Thomson Microelectronics, Inc. Stress test for memory arrays in integrated circuits
KR0122100B1 (ko) * 1994-03-10 1997-11-26 김광호 스트레스회로를 가지는 반도체집적회로 및 그 스트레스전압공급방법
KR0135108B1 (ko) * 1994-12-13 1998-04-25 김광호 스트레스 테스트 회로를 포함하는 반도체 메모리 장치
KR0145225B1 (ko) * 1995-04-27 1998-08-17 김광호 블럭 단위로 스트레스 가능한 회로
US5825785A (en) * 1996-05-24 1998-10-20 Internaitonal Business Machines Corporation Serial input shift register built-in self test circuit for embedded circuits
KR19980034731A (ko) * 1996-11-08 1998-08-05 김영환 반도체 메모리 소자의 스트레스 테스트 장치 및 그 방법
US6031773A (en) * 1998-12-18 2000-02-29 Stmicroelectronics, Inc. Method for stress testing the memory cell oxide of a DRAM capacitor

Also Published As

Publication number Publication date
KR19990065765A (ko) 1999-08-05
JP2000187999A (ja) 2000-07-04
JP3804733B2 (ja) 2006-08-02
KR100269322B1 (ko) 2000-10-16
US6226764B1 (en) 2001-05-01

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MM4A Annulment or lapse of patent due to non-payment of fees