TW365701B - Integrated circuits having fusible metallic fuse links and manufacturing process of the same - Google Patents

Integrated circuits having fusible metallic fuse links and manufacturing process of the same

Info

Publication number
TW365701B
TW365701B TW086116826A TW86116826A TW365701B TW 365701 B TW365701 B TW 365701B TW 086116826 A TW086116826 A TW 086116826A TW 86116826 A TW86116826 A TW 86116826A TW 365701 B TW365701 B TW 365701B
Authority
TW
Taiwan
Prior art keywords
laser beam
same
manufacturing process
integrated circuits
wiring layers
Prior art date
Application number
TW086116826A
Other languages
English (en)
Inventor
Yong Park
Soo-Cheol Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW365701B publication Critical patent/TW365701B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW086116826A 1997-06-23 1997-11-11 Integrated circuits having fusible metallic fuse links and manufacturing process of the same TW365701B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019970026418A KR100228533B1 (ko) 1997-06-23 1997-06-23 반도체 집적회로의 용단가능한 퓨즈 및 그 제조방법

Publications (1)

Publication Number Publication Date
TW365701B true TW365701B (en) 1999-08-01

Family

ID=19510624

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086116826A TW365701B (en) 1997-06-23 1997-11-11 Integrated circuits having fusible metallic fuse links and manufacturing process of the same

Country Status (5)

Country Link
US (1) US5936296A (zh)
EP (1) EP0887859A3 (zh)
JP (1) JPH1117011A (zh)
KR (1) KR100228533B1 (zh)
TW (1) TW365701B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI808663B (zh) * 2021-06-17 2023-07-11 台灣積體電路製造股份有限公司 半導體結構及其形成方法

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US6222244B1 (en) * 1998-06-08 2001-04-24 International Business Machines Corporation Electrically blowable fuse with reduced cross-sectional area
US6259146B1 (en) 1998-07-17 2001-07-10 Lsi Logic Corporation Self-aligned fuse structure and method with heat sink
US6413848B1 (en) 1998-07-17 2002-07-02 Lsi Logic Corporation Self-aligned fuse structure and method with dual-thickness dielectric
KR100294346B1 (ko) * 1998-11-07 2001-07-12 허인구 제거가능한 토목용 앵커
US6518140B2 (en) * 1998-11-07 2003-02-11 Samsung Electronics Co., Ltd. Manufacturing methods for defect removable semiconductor devices
TW399264B (en) * 1998-11-27 2000-07-21 United Microelectronics Corp Method for reducing the fluorine content on metal pad surface
US6300590B1 (en) * 1998-12-16 2001-10-09 General Scanning, Inc. Laser processing
US6429132B1 (en) * 1998-12-23 2002-08-06 Aurora Systems, Inc. Combination CMP-etch method for forming a thin planar layer over the surface of a device
US20070190751A1 (en) * 1999-03-29 2007-08-16 Marr Kenneth W Semiconductor fuses and methods for fabricating and programming the same
US6562674B1 (en) 1999-07-06 2003-05-13 Matsushita Electronics Corporation Semiconductor integrated circuit device and method of producing the same
US6650519B1 (en) 1999-08-17 2003-11-18 Seagate Technology Llc ESD protection by a high-to-low resistance shunt
KR100340906B1 (ko) * 1999-08-23 2002-06-20 박종섭 반도체 장치의 퓨즈 구조
US6323111B1 (en) 1999-10-28 2001-11-27 Agere Systems Guardian Corp Preweakened on chip metal fuse using dielectric trenches for barrier layer isolation
KR100314133B1 (ko) 1999-11-26 2001-11-15 윤종용 가장자리에 흡습방지막이 형성된 반도체 칩 및 이흡습방지막의 형성방법
JP3907911B2 (ja) 2000-03-30 2007-04-18 Ｎｅｃエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
JP2002190582A (ja) * 2000-12-21 2002-07-05 Mitsubishi Electric Corp 半導体メモリ及びその製造方法
US6777645B2 (en) * 2001-03-29 2004-08-17 Gsi Lumonics Corporation High-speed, precision, laser-based method and system for processing material of one or more targets within a field
US20070173075A1 (en) * 2001-03-29 2007-07-26 Joohan Lee Laser-based method and system for processing a multi-material device having conductive link structures
JP2003017570A (ja) * 2001-07-02 2003-01-17 Fujitsu Ltd 半導体装置及びその製造方法
US6707129B2 (en) * 2001-12-18 2004-03-16 United Microelectronics Corp. Fuse structure integrated wire bonding on the low k interconnect and method for making the same
US6579795B1 (en) * 2002-04-02 2003-06-17 Intel Corporation Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
KR100831973B1 (ko) * 2002-04-27 2008-05-26 주식회사 하이닉스반도체 퓨즈의 전기화학적 소실 방지를 위한 반도체 장치
KR100819667B1 (ko) * 2002-07-18 2008-04-04 주식회사 하이닉스반도체 반도체 소자의 퓨즈 형성 방법
US20040038458A1 (en) * 2002-08-23 2004-02-26 Marr Kenneth W. Semiconductor fuses, semiconductor devices containing the same, and methods of making and using the same
US6753210B2 (en) * 2002-09-17 2004-06-22 Taiwan Semiconductor Manufacturing Company Metal fuse for semiconductor devices
DE102005014929B4 (de) * 2005-04-01 2008-04-17 Newlogic Technologies Gmbh Integrierte Spule und integrierter Transformator
US20070029576A1 (en) * 2005-08-03 2007-02-08 International Business Machines Corporation Programmable semiconductor device containing a vertically notched fusible link region and methods of making and using same
US20100213569A1 (en) * 2009-02-20 2010-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits having fuses and systems thereof
US9892221B2 (en) 2009-02-20 2018-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method and system of generating a layout including a fuse layout pattern
KR101095770B1 (ko) * 2009-03-09 2011-12-21 주식회사 하이닉스반도체 반도체 소자 및 그 형성 방법
US9087841B2 (en) * 2013-10-29 2015-07-21 International Business Machines Corporation Self-correcting power grid for semiconductor structures method

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JPS59214239A (ja) * 1983-05-16 1984-12-04 Fujitsu Ltd 半導体装置の製造方法
KR890001847B1 (ko) * 1986-05-07 1989-05-25 삼성전자 주식회사 반도체 메모리 장치의 리던던시 회로
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US4935801A (en) * 1987-01-27 1990-06-19 Inmos Corporation Metallic fuse with optically absorptive layer
US4849363A (en) * 1988-03-18 1989-07-18 Digital Equipment Corporation Integrated circuit having laser-alterable metallization layer
US5070392A (en) * 1988-03-18 1991-12-03 Digital Equipment Corporation Integrated circuit having laser-alterable metallization layer
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US5025300A (en) * 1989-06-30 1991-06-18 At&T Bell Laboratories Integrated circuits having improved fusible links
US5185291A (en) * 1989-06-30 1993-02-09 At&T Bell Laboratories Method of making severable conductive path in an integrated-circuit device
US5241212A (en) * 1990-05-01 1993-08-31 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a redundant circuit portion and a manufacturing method of the same
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US5672905A (en) * 1992-08-26 1997-09-30 At&T Global Information Solutions Company Semiconductor fuse and method
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI808663B (zh) * 2021-06-17 2023-07-11 台灣積體電路製造股份有限公司 半導體結構及其形成方法
US11908708B2 (en) 2021-06-17 2024-02-20 Taiwan Semiconductor Manufacturing Co., Ltd. Laser de-bonding carriers and composite carriers thereof

Also Published As

Publication number Publication date
JPH1117011A (ja) 1999-01-22
KR19990002715A (ko) 1999-01-15
US5936296A (en) 1999-08-10
EP0887859A2 (en) 1998-12-30
KR100228533B1 (ko) 1999-11-01
EP0887859A3 (en) 2004-06-23

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MM4A Annulment or lapse of patent due to non-payment of fees