TW359936B - Clock generator - Google Patents

Clock generator

Info

Publication number
TW359936B
TW359936B TW086113006A TW86113006A TW359936B TW 359936 B TW359936 B TW 359936B TW 086113006 A TW086113006 A TW 086113006A TW 86113006 A TW86113006 A TW 86113006A TW 359936 B TW359936 B TW 359936B
Authority
TW
Taiwan
Prior art keywords
clock signal
frequency doubling
circuit
delay
output
Prior art date
Application number
TW086113006A
Other languages
English (en)
Inventor
Kouichi Ishimi
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW359936B publication Critical patent/TW359936B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Networks Using Active Elements (AREA)
TW086113006A 1997-05-23 1997-09-09 Clock generator TW359936B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13418897 1997-05-23

Publications (1)

Publication Number Publication Date
TW359936B true TW359936B (en) 1999-06-01

Family

ID=15122500

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086113006A TW359936B (en) 1997-05-23 1997-09-09 Clock generator

Country Status (4)

Country Link
JP (1) JP4700755B2 (zh)
KR (1) KR100262722B1 (zh)
CN (1) CN1144116C (zh)
TW (1) TW359936B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024693B2 (en) 2013-06-06 2015-05-05 Industrial Technology Research Institute Crystal-less clock generator and operation method thereof
US10778196B2 (en) 2018-08-24 2020-09-15 Groq, Inc. Reducing power consumption in a processor circuit

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4520380B2 (ja) * 2005-08-09 2010-08-04 株式会社リコー クロック生成回路
KR100911190B1 (ko) 2007-06-11 2009-08-06 주식회사 하이닉스반도체 내부 클럭 드라이버 회로
CN102073033B (zh) * 2009-11-25 2013-03-20 中国科学院电子学研究所 可动态校准的高精度步进延迟产生方法
CN102109875B (zh) * 2009-12-28 2015-05-20 北京普源精电科技有限公司 具有脉冲信号产生功能的信号发生器和脉冲信号产生方法
US10056899B1 (en) * 2017-06-21 2018-08-21 Silicon Laboratories Inc. Signal gating circuit for use in digital circuits and method therefor
CN111865300B (zh) * 2020-07-08 2022-05-17 福州大学 应用于双环路延迟锁相环的可编程数字控制延迟线

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6277770A (ja) * 1985-10-01 1987-04-09 Seiko Instr & Electronics Ltd ビデオ信号のサンプリングクロツク発生回路
JPH05199498A (ja) * 1992-01-21 1993-08-06 Sony Corp クロツク発生回路
JPH08274600A (ja) * 1995-03-30 1996-10-18 Toshiba Corp Ｃｍｏｓ型可変遅延回路
JP3561792B2 (ja) * 1995-09-06 2004-09-02 株式会社ルネサステクノロジ クロック発生回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024693B2 (en) 2013-06-06 2015-05-05 Industrial Technology Research Institute Crystal-less clock generator and operation method thereof
US10778196B2 (en) 2018-08-24 2020-09-15 Groq, Inc. Reducing power consumption in a processor circuit
TWI709910B (zh) * 2018-08-24 2020-11-11 美商葛如克公司 處理資料之處理器及方法

Also Published As

Publication number Publication date
CN1200504A (zh) 1998-12-02
KR19980086387A (ko) 1998-12-05
JP2010233226A (ja) 2010-10-14
KR100262722B1 (ko) 2000-08-01
JP4700755B2 (ja) 2011-06-15
CN1144116C (zh) 2004-03-31

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees