JPS6416013A - Clock distribution circuit - Google Patents

Clock distribution circuit

Info

Publication number
JPS6416013A
JPS6416013A JP62172127A JP17212787A JPS6416013A JP S6416013 A JPS6416013 A JP S6416013A JP 62172127 A JP62172127 A JP 62172127A JP 17212787 A JP17212787 A JP 17212787A JP S6416013 A JPS6416013 A JP S6416013A
Authority
JP
Japan
Prior art keywords
output
phase
clock
gate
ffs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62172127A
Other languages
Japanese (ja)
Other versions
JP2646561B2 (en
Inventor
Haruo Yano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62172127A priority Critical patent/JP2646561B2/en
Publication of JPS6416013A publication Critical patent/JPS6416013A/en
Application granted granted Critical
Publication of JP2646561B2 publication Critical patent/JP2646561B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
  • Pulse Circuits (AREA)

Abstract

PURPOSE:To set selectively the phase of each distribution output by an initial setting data by outputting a clock inputted as it is or while its phase is retarded in response to the output of a phase selection flip-flop (FF). CONSTITUTION:A NAND gate 7 has a switching function to output a signal with slightly retarded phase or a fixed level 1 and an output of a gate 3 corresponding to the output of the gate 7 is given to a gate 10, from which clock outputs C1-C16 are given. 16-Set of FFs 20 output a clock of a normal phase as clocks C1-C16 or output a clock retarded by a phase corresponding to one stage of gate. The FFs 20 are controlled by a clock input C and the shift mode input (m) and its setting is implemented as part of the initial value setting. Thus, even when the delay time excess is caused, the phase of each clock is adjusted by changing the setting of the output of the phase selection FFs 20.
JP62172127A 1987-07-09 1987-07-09 Clock distribution circuit Expired - Lifetime JP2646561B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62172127A JP2646561B2 (en) 1987-07-09 1987-07-09 Clock distribution circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62172127A JP2646561B2 (en) 1987-07-09 1987-07-09 Clock distribution circuit

Publications (2)

Publication Number Publication Date
JPS6416013A true JPS6416013A (en) 1989-01-19
JP2646561B2 JP2646561B2 (en) 1997-08-27

Family

ID=15936061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62172127A Expired - Lifetime JP2646561B2 (en) 1987-07-09 1987-07-09 Clock distribution circuit

Country Status (1)

Country Link
JP (1) JP2646561B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330852A (en) * 1987-01-28 1994-07-19 U.S. Philips Corporation Magneto-optical memory and method of producing such a memory
DE19733417B4 (en) * 1996-08-02 2004-07-22 Mitsubishi Fuso Truck And Bus Corp. Safety device for underfloor vehicle

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330852A (en) * 1987-01-28 1994-07-19 U.S. Philips Corporation Magneto-optical memory and method of producing such a memory
DE19733417B4 (en) * 1996-08-02 2004-07-22 Mitsubishi Fuso Truck And Bus Corp. Safety device for underfloor vehicle

Also Published As

Publication number Publication date
JP2646561B2 (en) 1997-08-27

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