JPS5758213A - Phase controlling circuit - Google Patents
Phase controlling circuitInfo
- Publication number
- JPS5758213A JPS5758213A JP55132525A JP13252580A JPS5758213A JP S5758213 A JPS5758213 A JP S5758213A JP 55132525 A JP55132525 A JP 55132525A JP 13252580 A JP13252580 A JP 13252580A JP S5758213 A JPS5758213 A JP S5758213A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- delay
- constitution
- sampling
- delay device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/09—Digital recording
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE:To obtain a proper phase sampling clock by a simple constitution, by supplying a count value output of an up-down counter to a multiplexer, and selectively controlling the clock by the count value and the extent of delay from a clock delay device. CONSTITUTION:A clock CK0 from an AFC circuit 10 is supplied to a delay device 22 through an input terminal 21, from which plural, for instance, seven clocks CK1-CK7 which have been delayed in order by prescribed minutes each are obtained. In this case, the extent of delay of the clock CK7 which is delayed most against the clock CK0 is selected shorter than 1 bit period of a reproducing data, that is to say, 1 period of the clock CK0. As for the clocks CK1-CK7 from said delay device 22, and the clock CK0, a clock of phase suitable for sampling a data is selected by a multiplexer 23, and is used as a data sampling clock. According to such a constitution, a proper phase sampling clock is obtained exactly.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55132525A JPS5758213A (en) | 1980-09-24 | 1980-09-24 | Phase controlling circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55132525A JPS5758213A (en) | 1980-09-24 | 1980-09-24 | Phase controlling circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5758213A true JPS5758213A (en) | 1982-04-07 |
Family
ID=15083331
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55132525A Pending JPS5758213A (en) | 1980-09-24 | 1980-09-24 | Phase controlling circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5758213A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60227541A (en) * | 1983-11-09 | 1985-11-12 | ナシヨナル・セミコンダクタ−・コ−ポレ−シヨン | Digital phase locked loop type decoder |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5129068A (en) * | 1974-09-05 | 1976-03-11 | Nippon Telegraph & Telephone | |
JPS5538710A (en) * | 1978-09-11 | 1980-03-18 | Hitachi Ltd | Phase lock loop circuit |
-
1980
- 1980-09-24 JP JP55132525A patent/JPS5758213A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5129068A (en) * | 1974-09-05 | 1976-03-11 | Nippon Telegraph & Telephone | |
JPS5538710A (en) * | 1978-09-11 | 1980-03-18 | Hitachi Ltd | Phase lock loop circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60227541A (en) * | 1983-11-09 | 1985-11-12 | ナシヨナル・セミコンダクタ−・コ−ポレ−シヨン | Digital phase locked loop type decoder |
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