JPS5685127A - Digital signal processor - Google Patents

Digital signal processor

Info

Publication number
JPS5685127A
JPS5685127A JP16075279A JP16075279A JPS5685127A JP S5685127 A JPS5685127 A JP S5685127A JP 16075279 A JP16075279 A JP 16075279A JP 16075279 A JP16075279 A JP 16075279A JP S5685127 A JPS5685127 A JP S5685127A
Authority
JP
Japan
Prior art keywords
clock
delay
units
signal processor
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16075279A
Other languages
Japanese (ja)
Other versions
JPS624024B2 (en
Inventor
Kengo Fujita
Kiichi Matsuda
Toshihiro Honma
Yutaka Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16075279A priority Critical patent/JPS5685127A/en
Publication of JPS5685127A publication Critical patent/JPS5685127A/en
Publication of JPS624024B2 publication Critical patent/JPS624024B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To eliminate the control of clock although the return mode varies, by adding the clock delay circuit having the same delay time as the processed data output with every several function block units.
CONSTITUTION: The input data Din to receive a signal process is processed successively and serially through several function block units 11-1W11-3 of a signal processor. The clock delay circuits 41-1W41-3 are provided with every units 11-1W 11-3 to be connected serially. And at the same time, the first stage is connected to the clock source 14 for data process. Then the delay time is given from the delay circuits 41-1W41-3 each so that each clock output has the same delay amount as the processed data output supplied from each of the corresponding units 11-1W11-3.
COPYRIGHT: (C)1981,JPO&Japio
JP16075279A 1979-12-13 1979-12-13 Digital signal processor Granted JPS5685127A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16075279A JPS5685127A (en) 1979-12-13 1979-12-13 Digital signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16075279A JPS5685127A (en) 1979-12-13 1979-12-13 Digital signal processor

Publications (2)

Publication Number Publication Date
JPS5685127A true JPS5685127A (en) 1981-07-11
JPS624024B2 JPS624024B2 (en) 1987-01-28

Family

ID=15721688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16075279A Granted JPS5685127A (en) 1979-12-13 1979-12-13 Digital signal processor

Country Status (1)

Country Link
JP (1) JPS5685127A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821954A (en) * 1981-08-03 1983-02-09 Iwatsu Electric Co Ltd Receiving system for key telephone device
JPS61139139A (en) * 1984-12-11 1986-06-26 Toshiba Corp Semiconductor device synchronizing method and semiconductor device used for this method
JPS62276935A (en) * 1986-01-07 1987-12-01 Fujitsu Ltd Multiplexer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4838004A (en) * 1971-09-08 1973-06-05
JPS5040204A (en) * 1973-08-15 1975-04-12

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4838004A (en) * 1971-09-08 1973-06-05
JPS5040204A (en) * 1973-08-15 1975-04-12

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821954A (en) * 1981-08-03 1983-02-09 Iwatsu Electric Co Ltd Receiving system for key telephone device
JPH037170B2 (en) * 1981-08-03 1991-01-31 Iwatsu Electric Co Ltd
JPS61139139A (en) * 1984-12-11 1986-06-26 Toshiba Corp Semiconductor device synchronizing method and semiconductor device used for this method
JPS62276935A (en) * 1986-01-07 1987-12-01 Fujitsu Ltd Multiplexer

Also Published As

Publication number Publication date
JPS624024B2 (en) 1987-01-28

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